CX74005 VGA + I/Q Demodulator Rx ASIC for Portable Phone Applications Features The CX74005 Application-Specific Integrated Circuit (ASIC) is a Variable Gain Amplifier (VGA) and I/Q demodulator, intended for use in Code Division Multiple Access (CDMA) portable phones in both cellular and Personal Communications System (PCS) bands. As a trimode IC, it can be used in CDMA mode or Advanced Mobile Phone System (AMPS) mode. • Supports CDMA/AMPS/PCS1900 modes • Three battery cell operation (2.7 V < VCC < 3.3 V). • IF inputs and I/Q outputs • On-chip 100 to 640 MHz oscillators • Low power operation: <25 mA • 32-pin Land Grid Array (LGA) 5 x 5 mm package The device incorporates a VGA and the In-Phase and Quadrature (I/Q) demodulator stages. The intermediate frequencies (IF) are combined through separate buffers at the input of the VGA depending on the selected mode. The VGA has a gain control range greater than 90 dB. Applications There are two Very High Frequency (VHF) oscillators that operate with external tank circuits. They provide signals to the Local Oscillator (LO) for the I/Q demodulator in the cellular and PCS bands. • Tri-mode handsets • CDMA and AMPS modes in the cellular band: − AMPS − CDMA-US − CDMA-Japan • CDMA mode in the PCS band: − PCS-US − PCS-Korea The noise figure, gain, and third order Input Intercept Point (IIP3) of the CX74005 are optimized to meet the system requirements for AMPS and CDMA modes as per TIA/EIA-98-B, ANSI J-STD-018 (PCS), CDMA2000. Employing silicon bipolar technology, the ASIC is designed for high performance, a high level of integration and low cost. GND SIF I+ I- Q+ Q- GND 32 31 30 29 28 27 26 The device package and pinout are shown in Figure 1. A block diagram of the CX74005 is shown in Figure 2. GND 1 25 GND FM/CDMA 2 24 VGA_AMPS CELL/PCS 3 23 NC VCO_VCC 4 22 VGA_PCS_IN+ SLEEP VGA_GC 16 17 15 9 IF_GND PCS_TANK- 14 IF_VCC GND VGA_CDMA_IN- 18 13 19 8 PLL- 7 NC 12 CELL_TANK1+ PLL+ VGA_CDMA_IN+ 11 VGA_PCS_IN- 20 DIV2/DIV4 21 6 10 5 PCS_TANK+ VCO_GND CELL_TANK1- CNXT044 Figure 1. Rx ASIC Pinout – 32-Pin LGA Package (Top View) Data Sheet Conexant - Preliminary Proprietary Information and Specifications Are Subject to Change Doc. No. 101252A March 13, 2001 CX74005 Rx ASIC 2 6,7 CX74005 Rx ASIC 19,20 VGA_CDMA 2 VGA_PCS 29 I 30 21,22 VGA_AMPS 11 ÷ 2,4 2 24 DIV2/DIV4 27 Q 28 16 2 3 17 9,10 12,13 2 VGA_GC CELL/PCS FM/CDMA SLEEP 2 PLL C1431 Figure 2. CX74005 Rx ASIC Block Diagram Technical Description Variable Gain Amplifier (VGA). The high dynamic range required by CDMA handsets is achieved by the VGA, which is common to all modes. The VGA has a minimum dynamic range of 90 dB with a control voltage of 0.5 to 2.5 volts. The appropriate signal path is switched internal to the device. This eliminates off-chip switching needed to operate this common VGA in cellular AMPS, CDMA, and PCS modes. I/Q Demodulator. The local oscillator signals are generated onchip. The I/Q demodulator is internally connected to the VGA output. It is designed to have a very low amplitude and phase imbalance. The I and Q outputs are differential. The DC offsets between the differential outputs and between I and Q channels are designed to be extremely low to facilitate compatibility with baseband interfaces. VHF Oscillators. There are two on-chip oscillators, one for the cellular and one for the PCS bands. These Voltage Controlled Oscillators (VCOs) work with external tank circuits and varactor diodes. The outputs of the differential oscillators are buffered and the output is used to drive the prescaler of an external Phase Locked Loop (PLL). The VCOs typically operate at twice the IF frequency and can operate at up to four times the IF frequency. 2 The local oscillators for the I/Q demodulators are derived by an on-chip frequency divider. The logic signal to select the divider ratio (2 or 4) is available on Pin 11 (DIV2/DIV4). Mode Control. The operation of the chip is controlled by signals at Pin 3 (CELL/PCS), Pin 2 (FM/CDMA), Pin 16 (SLEEP), and the DIV2/DIV4 select commands at Pin 11. All the switching is done internally. The supply voltage should be present at all the VCC pins for normal operation. The signals needed to select each mode is shown in Table 1. Electrical and Mechanical Specifications Signal pin assignments and functional pin descriptions are described in Table 2. The absolute maximum ratings of the CX74005 are provided in Table 3. The recommended operating conditions are specified in Table 4. Electrical specifications are provided in Table 5. Typical performance characteristics are illustrated in Figures 3 through 32. Figure 33 provides the package dimensions for the 32-pin LGA and tape and reel dimensions are shown in Figure 34. Conexant - Preliminary Proprietary Information and Specifications Are Subject to Change 101252A March 13, 2001 Rx ASIC CX74005 • • ESD Sensitivity The CX74005 is a Class 1 device. The following extreme Electrostatic Discharge (ESD) precautions are required according to the Human Body Model (HBM): • • Transport device in ESD shielded containers. Monitor and test all ESD protection equipment. The HBM ESD withstand threshold value, with respect to ground, is ±1.5 kV. The HBM ESD withstand threshold value, with respect to VDD (the positive power supply terminal) is also ±1.5 kV. Protective outer garments. Handle device in ESD safeguarded work area. Table 1. Mode Control Select Signal Switching Pin AMPS CDMA PCS 3 (CELL/PCS) 0 0 1 2 (FM/CDMA) 0 1 x 16 (SLEEP) 1 1 1 Key: 0 = Low 1 = High x = N/A Note: DIV 2 is used in the evaluation board. 101252A March 13, 2001 Conexant - Preliminary Proprietary Information and Specifications Are Subject to Change 3 CX74005 Rx ASIC Table 2. CX74005 Pin Assignments and Signal Descriptions Pin # 4 Name Description 1 GND Ground 2 FM/CDMA Cellular band mode select: 0 = AMPS, 1 = CDMA 3 CELL/PCS Band select: 0 = Cellular; 1 = PCS 4 VCO_VCC Voltage supply pin to the VCO buffers. A bypass capacitor should be placed close to the device from pin 4 to pin 5. The trace should be short and connected immediately to the ground plane for best performance. 5 VCO_GND Ground return from the VCO buffers. 6 CELL_TANK1– Differential tank connection for the cellular band VCO. Care should be taken during the layout of the external tank circuit to prevent parasitic oscillations. 7 CELL_TANK_1+ Differential tank connection for the cellular band VCO. Care should be taken during the layout of the external tank circuit to prevent parasitic oscillations. 8 NC No connection 9 PCS_TANK– Differential tank connection for the PCS band VCO. Care should be taken during the layout of the external tank circuit to prevent parasitic oscillations. 10 PCS_TANK+ Differential tank connection for the PCS band VCO. Care should be taken during the layout of the external tank circuit to prevent parasitic oscillations. 11 DIV2/DIV4 Selects the divide ratio of the VCO to the LO port of the I/Q demodulator: 0 = divide by 2, 1 = divide by 4. 12 PLL+ Differential buffered VCO output 13 PLL– Differential buffered VCO output 14 GND Ground 15 IF_GND Ground 16 SLEEP Activates sleep mode: 0 = Sleep, 1 = Enable 17 VGA_GC The VGA gain control signal. A DC control voltage should be applied to this pin to vary the gain of the VGA. 18 IF_VCC Voltage supply to VGA and I/Q demodulator stages. Supply should be well regulated and bypassed to prevent modulation of the signal by the supply ripple. 19 VGA_CDMA_IN– CDMA differential VGA input 20 VGA_CDMA_IN+ CDMA differential VGA input 21 VGA_PCS_IN- PCS differential VGA input. 22 VGA_PCS_IN+ PCS differential VGA input. 23 GND Ground 24 VGA_AMPS AMPS VGA input 25 GND Ground 26 GND Ground 27 Q– Q channel differential output 28 Q+ Q channel differential output 29 I– I channel differential output 30 I+ I channel differential output 31 GND Ground 32 GND Ground Conexant - Preliminary Proprietary Information and Specifications Are Subject to Change 101252A March 13, 2001 Rx ASIC CX74005 Table 3. Absolute Maximum Ratings Parameter Minimum Maximum Units Supply voltage (VCC) –0.3 +5.5 V Input voltage range –0.3 VCC V 600 mW Power dissipation Ambient operating temperature –30 +80 °C Storage temperature –40 +125 °C Table 4. Recommended Operating Conditions Parameter Minimum Typical Maximum Units Supply voltage (VCC) 2.7 3.0 3.3 V Operating temperature –30 +25 +80 °C Impedance of logic inputs 50 kΩ Logic 0 0.0 0.5 V Logic 1 VCC – 0.5 VCC V Table 5. CX74005 Rx ASIC Electrical Specifications (1 of 2) (TA = 25°° C, VCC = 3.0 V) Parameter Test Condition Min Typical Max Units 300 MHz Rx VGA - I/Q Demodulator Frequency range 50 Input impedance: AMPS input (single ended) CDMA input (differential) PCS input (differential) Voltage gain: Maximum (AMPS) Minimum (AMPS) Maximum (CDMA) Minimum (CDMA) Maximum (PCS) Minimum (PCS) VGA_GC (V) 2.5 0.5 2.5 0.5 2.5 0.5 Voltage gain slope Voltage gain slope linearity (over any 6 dB segment) VGA + I/Q IIP3: @ Maximum voltage gain (AMPS) @ Maximum voltage gain (CDMA) @ Maximum voltage gain (PCS) 1000 1000 1000 Ω Ω Ω 55 –45 52.5 –46 50 –46 dB dB dB dB dB dB 49 dB/V –3 VGA_GC (V) 2.5 2.5 2.5 +3 –50.5 –48.5 –47 dB dBm dBm dBm Input 1 dB compression @ minimum gain –10 dBm VGA + I/Q noise figure: @ Maximum gain (AMPS) @ Maximum gain (CDMA) @ Maximum gain (PCS) @ Minimum gain 8 5.5 5.5 –50 dB dB dB dB 101252A March 13, 2001 Conexant - Preliminary Proprietary Information and Specifications Are Subject to Change 5 CX74005 Rx ASIC Table 5. CX74005 Rx ASIC Electrical Specifications (2 of 2) (TA = 25°° C, VCC = 3.0 V) Parameter Test Condition Min Typical Max Units Rx VGA - I/Q Demodulator (continued) Output level: AMPS CDMA PCS 2.75 2.50 2.50 Maximum output level mVrms mVrms mVrms 1.4 Gain variation over frequency: AMPS (0.1-12.2 kHz) CDMA (1-630 kHz) PCS (1-630 kHz) I+, I–, and Q+, Q– DC offset I/Q gain mismatch I/Q phase mismatch Output load impedance (differential) 10 Output impedance (differential) 500 Total supply current (includes I/Q mixers, LO buffers, and dividers) Vp-p 0.1 0.1 0.1 0.3 0.3 0.3 dB dB dB 1 6 mVrms 0.2 0.3 dB 2 4 deg kΩ Ω 15 mA Oscillator Frequency range 6 100 640 MHz Phase noise (fc = 200 MHz, unloaded Q = 20) @ 100 kHz offset –117 Second harmonic distortion (application dependent) –30 Output level to PLL (differential) 300 mVp-p Output impedance to PLL (differential) 300 Ω Total supply current (including external tank circuits) 10 mA Conexant - Preliminary Proprietary Information and Specifications Are Subject to Change dBc/Hz –26 dBc 101252A March 13, 2001 Rx ASIC CX74005 10 60 50 0 40 30 IIP3 (dBm) IIP3-3.0V OIP3-3.0V -20 IIP3-2.7V OIP3-2.7V -30 IIP3-3.3V OIP3-3.3V Voltage Gain (dB) -10 -40 20 2.7V 10 3.0V 0 3.3V -10 -20 -30 -50 -40 -50 -60 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 Control Voltage (Volts) Control Voltage (Volts) Figure 4. AMPS VGA vs. Control Voltage @ 25 ˚C Figure 3. AMPS IIP3 and OIP3 vs. Control Voltage @ 25 C 65 10 55 0 45 35 IIP3-2.7V OIP3-2.7V -20 IIP3-3.0V OIP3-3.0V -30 IIP3-3.3V Voltage Gain (dB) IIP3 (dBm) -10 OIP3-3.3V -40 25 2.7V 15 3.0V 3.3V 5 -5 -15 -50 -25 -35 -60 0 0.5 1 1.5 2 2.5 0 3 0.5 1.5 2 2.5 3 Figure 6. AMPS VGA vs. Control Voltage @ –30 ˚C Figure 5. AMPS IIP3 and OIP3 @ –30 ˚C 10 70 5 60 0 50 -5 IIP3-2.7V -15 OIP3-2.7V -20 IIP3-3.0V -25 OIP3-3.0V -30 IIP3-3.3V Voltage Gain (dB) 40 -10 IIP3 (dBm) 1 Control Voltage (Volts) Control Voltage (Volts) 30 20 2.7V 10 3.0V 0 3.3V -10 -35 -20 -40 -30 -45 -40 -50 -50 -55 0 0.5 1 1.5 2 2.5 0 3 Figure 7. AMPS IIP3 and OIP3 vs. Control Voltage @ 85 C 101252A March 13, 2001 0.5 1 1.5 2 2.5 3 Control Votlage (Volts) Control Voltage (Volts) Figure 8. AMPS VGA vs. Control Voltage @ 85 °C Conexant - Preliminary Proprietary Information and Specifications Are Subject to Change 7 CX74005 Rx ASIC 12 60 55 11 50 10 2. 7V NF (dB) 2.7V 3. 0V 45 3.0V 3. 3V 3.3V 9 40 8 35 30 7 2 2.1 2.2 2.3 2.4 2.5 2 2.6 2. 1 Control Voltage (Volts) Figure 9. AMPS Noise Figure vs. Control Voltage @ 25 °C 2. 3 2. 4 2. 5 2. 6 Figure 10. AMPS Gain Noise Figure vs. Control Voltage @ 25 °C 11 60 10.5 55 10 50 Voltage Gain (dB) NF (dB) 2. 2 C ont r ol V ol t a ge ( V ol t s ) 9.5 9 45 40 35 8.5 30 8 2 2.1 2.2 2.3 2.4 2.5 2 2.6 2.1 2.2 2.3 2.4 2.5 2.6 Control Voltage (Volts) Control Voltage (Volts) Figure 12. AMPS VGA vs. Control Voltage @ 85 °C Figure 11. AMPS VGA Noise Figure vs. Control Voltage @ 85 °C at VCC=3 Volts 70 10 60 50 0 IIP3 (dBm) IIP3-2.7V OIP3-2.7V IIP3-3.0V -20 OIP3-3.0V IIP3-3.3V OIP3-3.3V -30 Voltage Gain (dB) 40 -10 30 20 2.7V 10 3.0V 0 3.3V -10 -20 -30 -40 -40 -50 -50 0.5 1 1.5 2 2.5 0.5 3 Figure 13. CDMA IIP3 vs. Control Voltage @ 25 °C 8 1 1.5 2 2.5 3 Control Voltage (Volts) Control Voltage (Volts) Figure 14. CDMA Gain vs. Control Voltage @ 25 °C Conexant - Preliminary Proprietary Information and Specifications Are Subject to Change 101252A March 13, 2001 Rx ASIC CX74005 65 5 55 45 -5 IIP3 (dBm) -15 IIP3-3.0V IIP3-3.3V -25 OIP3-2.7V OIP3-3.0V Voltage Gain (dB) 35 IIP3-2.7V OIP3-3.3V -35 25 15 2.7V 5 3.0V -5 3.3V -15 -25 -35 -45 -45 -55 -55 0.4 0.85 1.3 1.75 2.2 0.4 2.65 0.85 1.3 1.75 2.2 2.65 Control Voltage (Vlts) Control Voltage (Volts) Figure 15. CDMA IIP3 and OIP3 vs. Control Voltage @ –30 °C Figure 16. CDMA VGA vs. Control Voltage @ –30 °C 65 10 55 45 0 IIP3 (dBm) -10 OIP3-2.7V OIP3-3.0V -20 IIP3-3.0V IIP3-3.3V Votlage Gain (dB) 35 IIP3-2.7V OIP3-3.3V -30 25 15 2.7V 5 3.0V -5 3.3V -15 -25 -35 -40 -45 -55 -50 0 0.5 1 1.5 2 2.5 0 3 0.5 1 1.5 2 2.5 3 Control Voltage (Volts) Control Voltage (Volts) Figure 17. CDMA IIP3 and OIP3 vs. Control Voltage @ 85 °C Figure 18. CDMA VGA vs. Control Voltage @ 85 °C 13 55 12 50 11 NF (dB) 2.7V 9 3.0V 8 3.3V 7 Voltage Gain (dB) 45 10 40 2.7V 3.0V 35 3.3V 30 6 25 5 4 20 2 2.1 2.2 2.3 2.4 2.5 2.6 2 Control Voltage (Volts) 2.2 2.3 2.4 2.5 2.6 Control Voltage (Volts) Figure 19. CDMA Noise Figure vs. Control Voltage @ 25 °C 101252A March 13, 2001 2.1 Figure 20. CDMA VGA vs. Control Voltage @ 25 °C Conexant - Preliminary Proprietary Information and Specifications Are Subject to Change 9 CX74005 Rx ASIC 13 55 12 50 Voltage Gain (dB) NF (dB) 11 10 9 8 7 45 40 35 30 6 2 2.1 2.2 2.3 2.4 2.5 25 2.6 2 Control Voltage (Volts) 2.1 2.2 2.3 2.4 2.5 2.6 Control Voltage (Volts) Figure 21. CDMA VGA Noise Figure vs. Control Voltage @ 85 °C Figure 22. CDMA VGA vs. Control Voltage @ 85 °C 10 50 40 0 IIP3 (dBm) OIP3-2.7V -20 IIP3-3.0V OIP3-3.0V -30 IIP3-3.3V Voltage Gain (dB) 30 IIP3-2.7V -10 20 2.7V 10 3.0V 0 3.3V -10 -20 -40 -30 -40 -50 0 0.5 1 1.5 2 2.5 3 -50 0 Control Voltage (Volts) 0.5 1 1.5 2 2.5 3 Control Voltage (Volts) Figure 23. PCS IIP3 and OIP3 vs. Control Voltage @ 25 °C7 Figure 24. PCS VGA vs. Control Voltage @ 25 °C 10 55 0 45 35 IIP3-2.7v 25 OIP3-2.7v -20 IIP3-3.0v OIP3-3.0v -30 IIP3-3.3V OIP3-3.3V -40 Voltage Gain (dB) IIP3 (dBm) -10 15 2.7V 5 3.0V -5 3.3V -15 -25 -50 -35 -45 -60 0 0.5 1 1.5 2 2.5 3 -55 0 Control Voltage (Volts) 0.5 1 1.5 2 2.5 3 Control Votlage (Volts) Figure 25. PCS IIP3 vs. Control Voltage @ –30 °C 10 Figure 26. PCS VGA vs. Control Voltage @ –30 °C Conexant - Preliminary Proprietary Information and Specifications Are Subject to Change 101252A March 13, 2001 Rx ASIC CX74005 15 60 50 5 40 30 IIP3-2.7V OIP3-2.7V -15 IIP3-3.0V OIP3-3.0V -25 IIP3-3.3V Voltage Gain (dB) IIP3 (dBm) -5 20 2.7V 10 3.0V 0 3.3V -10 OIP3-3.3V -35 -20 -30 -45 -40 -55 -50 0 0.5 1 1.5 2 2.5 3 0.5 1 Control Voltage (Volts) 1.5 2 2.5 3 Control Voltage (Volts) Figure 27. PCS IIP3 and OIP3 vs. Control Voltage @ 85 °C Figure 28. PCS VGA vs. Control Voltage @ 85 °C 55 12 50 10 45 NF (dB) 9 2.7V 8 3.0V 3.3V 7 Voltage Gain (dB) 11 40 2.7V 3.0V 3.3V 35 30 6 5 25 4 2 2.1 2.2 2.3 2.4 2.5 2.6 20 2.7 2 Control Voltage (Volts) 2.1 2.2 2.3 2.4 2.5 2.6 2.7 Control Voltage (Volts) Figure 30. PCS VGA vs. Control Voltage @ 25 °C 12 55 11 50 10 45 Voltage Gain (dB) NF (dB) Figure 29. PCS Noise Figure vs. Control Voltage @ 25 °C 9 8 40 35 7 30 6 25 5 20 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2 2.1 2.2 Contrl Voltage (Volts) Figure 31. PCS VGA vs. Control Voltage @ 85 °C 101252A March 13, 2001 2.3 2.4 2.5 2.6 2.7 Control Voltage (Volts) Figure 32. PCS VGA vs. Control Voltage @ 85 °C Conexant - Preliminary Proprietary Information and Specifications Are Subject to Change 11 CX74005 Rx ASIC 2.480 5.04 ± 0.05 2.350 To Metal Pad Edge Solder Mask 0.300 0.150 Pin #1 mark Pin #1 Pin #1 2.350 Exposed Metal 0.500 Solder Mask 4.200 5.04 ± 0.05 Exposed Metal 2.480 To Metal Pad Edge 0.38 ± 0.05 0.040 Ref. 0.300 ± 0.02 0.400 ± 0.05 Package Edge 0.500 Detail A 2.000 1.20 ± 0.10 Mold Substrate 0.30 ± 0.05 All measurements are in millimeters C1285 Figure 33. Rx ASIC Package Dimensions – 32-Pin LGA Package 8.00 ± 0.10 1.50 ± 0.10 Notes: 1. 2. 3. 4. 5. 1.50 ± 0.25 0.292 ± 0.02 8o maximum 12.00 +0.30/–0.10 1.75 ± 0.10 5.50 ± 0.10 4.00 ± 0.10 Carrier tape material: black conductive polycarbonate Cover tape material: transparent conductive PSA Cover tape size: 9.3 mm width Tolerance: .XX = ±0.10 All measurements are in millimeters 5o maximum C1327 1.78 ± 0.10 5.51 ± 0.10 5.49 ± 0.10 Figure 34. 32-Pin LGA Tape and Reel Dimensions 12 Conexant - Preliminary Proprietary Information and Specifications Are Subject to Change 101252A March 13, 2001 Rx ASIC CX74005 Ordering Information Model Name Rx ASIC Manufacturing Part Number Product Revision CX74005 © 2001, 2002, Skyworks Solutions, Inc. All Rights Reserved. Information in this document is provided in connection with Skyworks Solutions, Inc. ("Skyworks") products. These materials are provided by Skyworks as a service to its customers and may be used for informational purposes only. Skyworks assumes no responsibility for errors or omissions in these materials. Skyworks may make changes to its products, specifications and product descriptions at any time, without notice. Skyworks makes no commitment to update the information and shall have no responsibility whatsoever for conflicts, incompatibilities, or other difficulties arising from future changes to its products and product descriptions. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as may be provided in Skyworks’ Terms and Conditions of Sale for such products, Skyworks assumes no liability whatsoever. THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, RELATING TO SALE AND/OR USE OF SKYWORKS™ PRODUCTS INCLUDING WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, PERFORMANCE, QUALITY OR NON-INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. 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Additional information, posted at www.skyworksinc.com, is incorporated by reference. 101252A March 13, 2001 Conexant - Preliminary Proprietary Information and Specifications Are Subject to Change 13 General Information: Skyworks Solutions, Inc. 4311 Jamboree Rd. Newport Beach, CA 92660-3007 www.skyworksinc.com