ETC NLSF308/D

NLSF308
Quad Gate
2−Input AND
The NLSF308 is an advanced high speed CMOS 2−input AND gate
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7 V, allowing the interface of 5 V
systems to 3 V systems.
• High Speed: tPD = 4.3 ns (Typ) at VCC = 5 V
• Low Power Dissipation: ICC = 2 A (Max) at TA = 25°C
• High Noise Immunity: VNIH = VNIL = 28% VCC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2 V to 5.5 V Operating Range
• Low Noise: VOLP = 0.8 V (Max)
• Function Compatible with Other Standard Logic Families
• QFN−16 Package
• Latchup Performance Exceeds 300 mA
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 24 FETs or 6 Equivalent Gates
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MARKING
DIAGRAM
16
1
NLSF
308
ALYW
QFN−16
MN SUFFIX
CASE 485G
(Top View)
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
Device
Package
Shipping†
NLSF308MN
QFN−16, 3x3
123 Units/Rail
NLSF308MNR2
QFN−16, 3x3 3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
 Semiconductor Components Industries, LLC, 2003
October, 2003 − Rev. 1
1
Publication Order Number:
NLSF308/D
NLSF308
A1
B1
A2
B2
A3
B3
A4
B4
15
1
16
Y1
FUNCTION TABLE
Inputs
3
5
4
Y2
Y = AB
8
7
9
Y3
A
B
Y
L
L
H
H
L
H
L
H
L
L
L
H
12
10
13
Y4
Figure 1. LOGIC DIAGRAM
B1
A1
VCC
B4
Y1
16
15
14
13
1
12
A4
NC
2
NLSF308
MN Package
11
NC
A2
3
(Top View)
10
Y4
B2
4
9
B3
GND
Y2
7
8
A3
6
Y3
5
Figure 2. Pin Assignment (QFN−16)
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2
Output
NLSF308
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MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage
–0.5 to + 7.0
V
Vin
DC Input Voltage
–0.5 to + 7.0
V
Vout
DC Output Voltage
–0.5 to VCC + 0.5
V
IIK
Input Diode Current
−20
mA
IOK
Output Diode Current
±20
mA
Iout
DC Output Current, per Pin
±25
mA
ICC
DC Supply Current, VCC and GND Pins
±50
mA
PD
Power Dissipation in Still Air
450
mW
Tstg
Storage Temperature
–65 to + 150
°C
NOTE:
Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these
conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under
absolute−maximum−rated conditions is not implied.
RECOMMENDED OPERATING CONDITIONS
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Symbol
Parameter
Min
Max
Unit
2.0
5.5
V
DC Input Voltage
0
5.5
V
DC Output Voltage
0
VCC
V
−40
+ 85
°C
0
0
100
20
ns/V
VCC
DC Supply Voltage
Vin
Vout
TA
Operating Temperature
tr, tf
Input Rise and Fall Time
VCC = 3.3 V ±0.3 V
VCC = 5.0 V ±0.5 V
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test Conditions
Min
1.50
VCC x 0.7
VIH
Minimum High−Level Input
Voltage
2.0
3.0 to 5.5
VIL
Maximum Low−Level Input
Voltage
2.0
3.0 to 5.5
VOH
Minimum High−Level Output
Voltage
VOL
Maximum Low−Level Output
Voltage
TA = 25°C
VCC
V
Typ
TA = − 40 to 85°C
Max
Min
1.50
VCC x 0.7
0.50
VCC x 0.3
Vin = VIH or VIL
IOH = −50 A
2.0
3.0
4.5
1.9
2.9
4.4
Vin = VIH or VIL
IOH = −4 mA,
IOH = −8 mA
3.0
4.5
2.58
3.94
Vin = VIH or VIL
IOL = 50 A
2.0
3.0
4.5
Vin = VIH or VIL
IOL = 4 mA
IOL = 8 mA
Max
2.0
3.0
4.5
Unit
V
0.50
VCC x 0.3
V
V
1.9
2.9
4.4
2.48
3.80
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
0.36
0.36
0.44
0.44
V
Iin
Maximum Input Leakage
Current
Vin = 5.5V or GND
0 to 5.5
± 0.1
± 1.0
A
ICC
Maximum Quiescent Supply
Current
Vin = VCC or GND
5.5
2.0
20.0
A
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3
NLSF308
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AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
TA = 25°C
Typ
Max
Min
Max
Unit
VCC = 3.3 ± 0.3 V, CL = 15 pF,
CL = 50 pF
6.2
8.7
8.8
12.3
1.0
1.0
10.5
14.0
ns
VCC = 5.0 ± 0.5 V, CL = 15 pF,
CL = 50 pF
4.3
5.8
5.9
7.9
1.0
1.0
7.0
9.0
4
10
Symbol
Parameter
Test Conditions
tPLH,
tPHL
Maximum Propagation Delay, A or B to Y
Cin
Min
TA = − 40 to 85°C
Maximum Input Capacitance
10
pF
Typical @ 25°C, VCC = 5.0 V
CPD
18
Power Dissipation Capacitance (Note 1)
pF
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 4 (per gate). CPD is used to determine the
no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V)
TA = 25°C
Typ
Max
Unit
VOLP
Quiet Output Maximum Dynamic VOL
0.3
0.8
V
VOLV
Quiet Output Minimum Dynamic VOL
−0.3
−0.8
V
VIHD
Minimum High Level Dynamic Input Voltage
3.5
V
VILD
Maximum Low Level Dynamic Input Voltage
1.5
V
Symbol
Characteristic
TEST
POINT
VCC
A or B
50%
OUTPUT
DEVICE
UNDER
TEST
GND
tPLH
Y
tPHL
CL *
50% VCC
*Includes all probe and jig capacitance
Figure 3. Switching Waveforms
Figure 4. Test Circuit
INPUT
Figure 5. Input Equivalent Circuit
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4
NLSF308
PACKAGE DIMENSIONS
QFN−16
MN SUFFIX
CASE 485G−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
−X−
A
M
−Y−
DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
B
N
0.25 (0.010) T
0.25 (0.010) T
J
R
C
0.08 (0.003) T
−T−
K
SEATING
PLANE
E
H
G
L
5
8
4
9
1
12
F
16
D
13
P
NOTE 3
0.10 (0.004)
M
T X Y
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5
MILLIMETERS
MIN
MAX
3.00 BSC
3.00 BSC
0.80
1.00
0.23
0.28
1.75
1.85
1.75
1.85
0.50 BSC
0.875
0.925
0.20 REF
0.00
0.05
0.35
0.45
1.50 BSC
1.50 BSC
0.875
0.925
0.60
0.80
INCHES
MIN
MAX
0.118 BSC
0.118 BSC
0.031
0.039
0.009
0.011
0.069
0.073
0.069
0.073
0.020 BSC
0.034
0.036
0.008 REF
0.000
0.002
0.014
0.018
0.059 BSC
0.059 BSC
0.034
0.036
0.024
0.031
NLSF308
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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6
For additional information, please contact your
local Sales Representative.
NLAS308/D