PD - 93926B IRFB18N50K SMPS MOSFET Applications l Switch Mode Power Supply (SMPS) l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits HEXFET® Power MOSFET VDSS RDS(on) typ. ID 0.26Ω 17A 500V Benefits l Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Low RDS(on) TO-220AB Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case ) Mounting Torque, 6-32 or M3 screw Max. Units 17 11 68 220 1.8 ± 30 11 -55 to + 150 A W W/°C V V/ns 300 °C 10 N Avalanche Characteristics Symbol EAS IAR EAR Parameter Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Typ. Max. Units ––– ––– ––– 370 17 22 mJ A mJ Typ. Max. Units ––– 0.50 ––– 0.56 ––– 58 °C/W Thermal Resistance Symbol RθJC RθCS RθJA www.irf.com Parameter Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient 1 3/29/01 IRFB18N50K Static @ TJ = 25°C (unless otherwise specified) Symbol V(BR)DSS RDS(on) VGS(th) Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage ∆V(BR)DSS/∆TJ Min. Typ. Max. Units Conditions 500 ––– ––– V VGS = 0V, ID = 250µA ––– 0.59 ––– V/°C Reference to 25°C, I D = 1mA ––– 0.26 0.29 Ω VGS = 10V, ID = 10A 3.0 ––– 5.0 V VDS = V GS, ID = 250µA ––– ––– 50 µA VDS = 500V, VGS = 0V ––– ––– 250 µA VDS = 400V, VGS = 0V, TJ = 125°C ––– ––– 100 VGS = 30V nA ––– ––– -100 VGS = -30V Dynamic @ TJ = 25°C (unless otherwise specified) Symbol gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 6.4 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– ––– ––– ––– 22 60 45 30 2830 330 38 3310 93 155 Max. Units Conditions ––– S VDS = 50V, ID = 10A 120 ID = 17A 34 nC VDS = 400V 54 VGS = 10V, See Fig. 6 and 13 ––– VDD = 250V ––– ID = 17A ns ––– RG = 7.5Ω ––– VGS = 10V,See Fig. 10 ––– VGS = 0V ––– VDS = 25V ––– pF ƒ = 1.0MHz, See Fig. 5 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 400V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 400V Diode Characteristics Symbol IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol 17 ––– ––– showing the A G integral reverse 68 ––– ––– S p-n junction diode. ––– ––– 1.5 V TJ = 25°C, IS = 17A, VGS = 0V ––– 520 780 ns TJ = 25°C, IF = 17A ––– 5.3 8.0 µC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. Pulse width ≤ 300µs; duty cycle ≤ 2%. Starting TJ = 25°C, L = 2.5mH, RG = 25Ω, IAS = 17A, ISD ≤ 17A, di/dt ≤ 149A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C 2 www.irf.com IRFB18N50K 100 100 VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 10 1 TOP 0.1 ID, Drain-to-Source Current (A) ID , Drain-to-Source Current (A) TOP 5.0V 0.01 10 5.0V 1 0.1 20µs PULSE WIDTH Tj = 25°C 20µs PULSE WIDTH Tj = 150°C 0.001 0.01 0.1 1 10 100 0.1 VDS , Drain-to-Source Voltage (V) 3.0 RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current(Α) TJ = 150°C 10.00 1.00 TJ = 25°C 0.10 VDS = 100V 20µs PULSE WIDTH 6.0 7.0 8.0 9.0 VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 100 Fig 2. Typical Output Characteristics 100.00 5.0 10 VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 0.01 1 10.0 ID = 17A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( ° C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRFB18N50K VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd C, Capacitance(pF) 10000 Ciss 1000 Coss 100 Crss VGS , Gate-to-Source Voltage (V) 20 100000 ID = 17A 16 V DS = 400V V DS = 250V V DS = 100V 12 8 4 10 0 1 10 100 0 1000 30 60 90 120 150 QG , Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 1000 ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY RDS(on) TJ = 150 ° C ID , Drain Current (A) 100 10 TJ = 25 ° C 1 10us 100us 10 1ms 10ms 1 0.1 0.2 V GS = 0 V 0.5 0.8 1.1 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 0.1 1.4 TC = 25 °C TJ = 150 °C Single Pulse 10 100 1000 10000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRFB18N50K 20 VGS ID , Drain Current (A) RD VDS 15 RG 10 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % D.U.T. + - VDD 10V Fig 10a. Switching Time Test Circuit 5 VDS 90% 0 25 50 75 100 125 150 TC , Case Temperature ( ° C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM 0.01 t1 t2 0.001 0.00001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x ZthJC + TC 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFB18N50K EAS , Single Pulse Avalanche Energy (mJ) 750 TOP 600 BOTTOM ID 7.6A 11A 17A 1 5V 450 D .U .T RG 300 D R IV E R L VDS + - VD D IA S 20V tp 150 A 0 .0 1 Ω Fig 12c. Unclamped Inductive Test Circuit 0 25 50 75 100 125 150 Starting T J , Junction Temperature ( ° C) Fig 12a. Maximum Avalanche Energy Vs. Drain Current V (B R )D SS tp IAS Fig 12d. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. QG 50KΩ 12V VGS .2µF .3µF D.U.T. QGS + V - DS QGD VG VGS 3mA IG ID Current Sampling Resistors Fig 13a. Gate Charge Test Circuit 6 Charge Fig 13b. Basic Gate Charge Waveform www.irf.com IRFB18N50K Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + • • • • RG Driver Gate Drive P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Period D= - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET® Power MOSFETs www.irf.com 7 IRFB18N50K TO-220AB Package Outline Dimensions are shown in millimeters (inches) 2 .8 7 (.1 1 3 ) 2 .6 2 (.1 0 3 ) 1 0 .5 4 (.4 1 5 ) 1 0 .2 9 (.4 0 5 ) -B - 3 .7 8 (.1 4 9 ) 3 .5 4 (.1 3 9 ) 4 .6 9 (.1 8 5 ) 4 .2 0 (.1 6 5 ) -A - 1 .3 2 (.0 5 2 ) 1 .2 2 (.0 4 8 ) 6.4 7 (.2 5 5 ) 6.1 0 (.2 4 0 ) 4 1 5 .2 4 (.6 0 0 ) 1 4 .8 4 (.5 8 4 ) 1 .1 5 (.0 4 5 ) M IN 1 2 3 1 4 .0 9 (.5 5 5 ) 1 3 .4 7 (.5 3 0 ) 4 .0 6 (.1 6 0 ) 3 .5 5 (.1 4 0 ) 3X 3X 1 .4 0 (.0 5 5 ) 1 .1 5 (.0 4 5 ) L E A D A S S IG N M E N T S 1 - GATE 2 - D R A IN 3 - S OU RC E 4 - D R A IN 0 .9 3 (.0 3 7 ) 0 .6 9 (.0 2 7 ) 0 .3 6 (.0 1 4 ) 3X M B A M 0 .5 5 (.0 2 2 ) 0 .4 6 (.0 1 8 ) 2 .9 2 (.1 1 5 ) 2 .6 4 (.1 0 4 ) 2 .5 4 (.1 0 0) 2X N O TE S : 1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 . 2 C O N T R O L L IN G D IM E N S IO N : IN C H 3 O U T L IN E C O N F O R M S T O J E D E C O U T L IN E T O -2 2 0 A B . 4 H E A T S IN K & L E A D M E A S U R E M E N T S D O N O T IN C L U D E B U R R S . TO-220AB Part Marking Information E X A M P L E : T H IS IS A N IR F 1 0 1 0 W IT H A S S E M B L Y LOT C ODE 9B1M A IN T E R N A T IO N A L R E C T IF IE R LOGO ASSEMBLY LOT CODE PART NU M BER IR F 1 0 1 0 9246 9B 1M D ATE CO DE (Y Y W W ) YY = YEAR W W = W EEK Data and specifications subject to change without notice. This product has been designed and qualified for the industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.03/01 8 www.irf.com