a FEATURES Low Power Supply Current 800 A/Amplifier Fully Specified at +2.7 V, +5 V and ⴞ5 V Supplies High Speed and Fast Settling on +5 V 80 MHz –3 dB Bandwidth (G = +1) 30 V/s Slew Rate 125 ns Settling Time to 0.1% Rail-to-Rail Input and Output No Phase Reversal with Input 0.5 V Beyond Supplies Input CMVR Extends Beyond Rails by 200 mV Output Swing to Within 20 mV of Either Rail Low Distortion –62 dB @ 1 MHz, VO = 2 V p-p –86 dB @ 100 kHz, VO = 4.6 V p-p Output Current: 15 mA High Grade Option VOS (max) = 1.5 mV APPLICATIONS High-Speed Battery-Operated Systems High Component Density Systems Portable Test Instruments A/D Buffer Active Filters High-Speed Set-and-Demand Amplifier 2.7 V, 800 A, 80 MHz Rail-to-Rail I/O Amplifiers AD8031/AD8032 CONNECTION DIAGRAMS 8-Lead Plastic DIP (N) and SOIC (R) Packages NC 1 AD8031 8-Lead Plastic DIP (N), SOIC (R) and SOIC (RM) Packages 8 NC OUT1 1 –IN 2 7 +VS –IN1 2 7 OUT2 +IN 3 6 OUT +IN1 3 6 –IN2 –VS 4 5 NC –VS 4 8 +VS AD8032 5 +IN2 NC = NO CONNECT 5-Lead Plastic Surface Mount Package SOT-23-5 (RT-5) VOUT 1 AD8031 5 +VS 4 –IN –VS 2 +IN 3 (Not to Scale) to high-speed systems where component density requires lower power dissipation. The AD8031/AD8032 are available in 8-lead plastic DIP and SOIC packages and will operate over the industrial temperature range of –40°C to +85°C. The AD8031A is also available in the space-saving 5-lead SOT-23-5 package and the AD8032A is available in AN 8-lead µSOIC package. The products have true single supply capability with rail-to-rail input and output characteristics and are specified for +2.7 V, +5 V and ±5 V supplies. The input voltage range can extend to 500 mV beyond each rail. The output voltage swings to within 20 mV of each rail providing the maximum output dynamic range. The AD8031/AD8032 also offer excellent signal quality for only 800 µA of supply current per amplifier; THD is –62 dBc with a 2 V p-p, 1 MHz output signal and –86 dBc for a 100 kHz, 4.6 V p-p signal on +5 V supply. The low distortion and fast settling time make them ideal as buffers to single supply, A-to-D converters. 1V/Div The AD8031 (single) and AD8032 (dual) single supply voltage feedback amplifiers feature high-speed performance with 80 MHz of small signal bandwidth, 30 V/µs slew rate and 125 ns settling time. This performance is possible while consuming less than 4.0 mW of power from a single +5 V supply. These features increase the operation time of high speed battery-powered systems without compromising dynamic performance. 1V/Div GENERAL DESCRIPTION 2ms/Div 2ms/Div Input VIN Output VOUT +5V VOUT VIN 1kV 1.7pF +2.5V Operating on supplies from +2.7 V to +12 V and dual supplies up to ±6 V, the AD8031/AD8032 are ideal for a wide range of applications, from battery-operated systems with large bandwidth requirements Circuit Diagram Figure 1. Rail-to-Rail Performance at 100 kHz REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Powered by ICminer.com Electronic-Library Service CopyRight 2003 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 AD8031/AD8032–SPECIFICATIONS +2.7 V Supply (@ T A = +25ⴗC, VS = +2.7 V, RL = 1 k⍀ to +1.35 V, RF = 2.5 k⍀ unless otherwise noted) Parameter Conditions DYNAMIC PERFORMANCE –3 dB Small Signal Bandwidth Slew Rate Settling Time to 0.1% G = +1, VO < 0.4 V p-p G = –1, VO = 2 V Step G = –1, VO = 2 V Step, C L = 10 pF AD8031A/AD8032A Min Typ Max AD8031B/AD8032B Min Typ Max 54 25 54 25 DISTORTION/NOISE PERFORMANCE Total Harmonic Distortion fC = 1 MHz, VO = 2 V p-p, G = +2 fC = 100 kHz, VO = 2 V p-p, G = +2 Input Voltage Noise f = 1 kHz Input Current Noise f = 100 kHz f = 1 kHz Crosstalk (AD8032 Only) f = 5 MHz 80 30 125 –62 –86 15 2.4 5 –60 Units 80 30 125 MHz V/µs ns –62 –86 15 2.4 5 –60 dBc dBc nV/√Hz pA/√Hz pA/√Hz dB DC PERFORMANCE Input Offset Voltage VCM = V CC 2 ; VOUT = 1.35 V TMIN to T MAX Offset Drift VCM = Input Bias Current VCM = V CC 2 V CC 2 ±1 ±6 ± 0.5 ± 1.5 mV ±6 ± 10 ± 1.6 ± 2.5 mV 10 ; VOUT = 1.35 V 0.45 2 0.45 2 µA 50 2.2 500 50 2.2 500 µA nA TMIN to T MAX Input Offset Current Open Loop Gain VCM = V CC 2 ; VOUT = 0.35 V to 2.35 V TMIN to T MAX 76 Input Common-Mode Voltage Range 80 Capacitive Load Drive POWER SUPPLY Operating Range Quiescent Current per Amplifier Power Supply Rejection Ratio 76 VCM = 0 V to 2.7 V VCM = 0 V to 1.55 V 46 58 80 40 280 1.6 –0.5 to +3.2 –0.2 to +2.9 64 74 46 58 dB 40 280 1.6 –0.5 to +3.2 –0.2 to +2.9 64 74 3.4 RL = 10 kΩ +0.05 +2.6 +0.15 +2.55 RL = 1 kΩ Sourcing Sinking G = +2 (See Figure 41) +0.02 +2.68 +0.08 +2.6 15 21 –34 15 +2.7 750 VS – = 0 V to –1 V or VS + = +2.7 V to +3.7 V 75 dB 74 Differential Input Voltage OUTPUT CHARACTERISTICS Output Voltage Swing Low Output Voltage Swing High Output Voltage Swing Low Output Voltage Swing High Output Current Short Circuit Current 10 74 INPUT CHARACTERISTICS Common-Mode Input Resistance Differential Input Resistance Input Capacitance Input Voltage Range Common-Mode Rejection Ratio µV/°C ; VOUT = 1.35 V 86 V 3.4 +0.05 +2.6 +0.15 +2.55 +12 1250 MΩ kΩ pF +0.02 +2.68 +0.08 +2.6 15 21 –34 15 +2.7 750 75 86 V dB dB V V V V V mA mA mA pF +12 1250 V µA dB Specifications subject to change without notice. Powered by ICminer.com Electronic-Library Service CopyRight 2003 –2– REV. B AD8031/AD8032 SPECIFICATIONS +5 V Supply (@ TA = +25ⴗC, VS = +5 V, RL = 1 k⍀ to +2.5 V, RF = 2.5 k⍀ unless otherwise noted) Parameter Conditions DYNAMIC PERFORMANCE –3 dB Small Signal Bandwidth Slew Rate Settling Time to 0.1% G = +1, VO < 0.4 V p-p G = –1, VO = 2 V Step G = –1, VO = 2 V Step, C L = 10 pF AD8031A/AD8032A Min Typ Max AD8031B/AD8032B Min Typ Max 54 27 54 27 DISTORTION/NOISE PERFORMANCE Total Harmonic Distortion fC = 1 MHz, VO = 2 V p-p, G = +2 fC = 100 kHz, VO = 2 V p-p, G = +2 Input Voltage Noise f = 1 kHz Input Current Noise f = 100 kHz f = 1 kHz Differential Gain RL = 1 kΩ Differential Phase RL = 1 kΩ Crosstalk (AD8032 Only) f = 5 MHz 80 32 125 –62 –86 15 2.4 5 0.17 0.11 –60 Units 80 32 125 MHz V/µs ns –62 –86 15 2.4 5 0.17 0.11 –60 dBc dBc nV/√Hz pA/√Hz pA/√Hz % Degrees dB DC PERFORMANCE Input Offset Voltage VCM = V CC 2 ; VOUT = 2.5 V TMIN to T MAX Offset Drift VCM = Input Bias Current VCM = V CC 2 V CC 2 ±1 ±6 ± 0.5 ± 1.5 mV ±6 ± 10 ± 1.6 ± 2.5 mV 5 ; VOUT = 2.5 V 0.45 1.2 0.45 1.2 µA 50 2.0 350 50 2.0 250 µA nA TMIN to T MAX Input Offset Current Open Loop Gain VCM = V CC 2 ; VOUT = 1.5 V to 3.5 V TMIN to T MAX 76 Input Common-Mode Voltage Range 82 Capacitive Load Drive POWER SUPPLY Operating Range Quiescent Current per Amplifier Power Supply Rejection Ratio 76 VCM = 0 V to 5 V VCM = 0 V to 3.8 V 56 66 82 40 280 1.6 –0.5 to +5.5 –0.2 to +5.2 70 80 56 66 dB 40 280 1.6 –0.5 to +5.5 –0.2 to +5.2 70 80 3.4 RL = 10 kΩ +0.05 +4.95 +0.2 +4.8 RL = 1 kΩ Sourcing Sinking G = +2 (See Figure 41) +0.02 +4.98 +0.1 +4.9 15 28 –46 15 +2.7 800 VS – = 0 V to –1 V or VS + = +5 V to +6 V 75 Specifications subject to change without notice. REV. B Powered by ICminer.com Electronic-Library Service CopyRight 2003 –3– dB 74 Differential Input Voltage OUTPUT CHARACTERISTICS Output Voltage Swing Low Output Voltage Swing High Output Voltage Swing Low Output Voltage Swing High Output Current Short Circuit Current 5 74 INPUT CHARACTERISTICS Common-Mode Input Resistance Differential Input Resistance Input Capacitance Input Voltage Range Common-Mode Rejection Ratio µV/°C ; VOUT = 2.5 V 86 V 3.4 +0.05 +4.95 +0.2 +4.8 +12 1400 MΩ kΩ pF +0.02 +4.98 +0.1 +4.9 15 28 –46 15 +2.7 800 75 86 V dB dB V V V V V mA mA mA pF +12 1400 V µA dB AD8031/AD8032–SPECIFICATIONS ⴞ5 V Supply (@ T = +25ⴗC, V = ⴞ5 V, R = 1 k⍀ to 0 V, R A S L F = 2.5 k⍀ unless otherwise noted) Parameter Conditions DYNAMIC PERFORMANCE –3 dB Small Signal Bandwidth Slew Rate Settling Time to 0.1% G = +1, VO < 0.4 V p-p G = –1, VO = 2 V Step G = –1, VO = 2 V Step, C L = 10 pF AD8031A/AD8032A Min Typ Max AD8031B/AD8032B Min Typ Max 54 30 54 30 DISTORTION/NOISE PERFORMANCE Total Harmonic Distortion fC = 1 MHz, VO = 2 V p-p, G = +2 fC = 100 kHz, VO = 2 V p-p, G = +2 Input Voltage Noise f = 1 kHz Input Current Noise f = 100 kHz f = 1 kHz Differential Gain RL = 1 kΩ Differential Phase RL = 1 kΩ Crosstalk (AD8032 Only) f = 5 MHz DC PERFORMANCE Input Offset Voltage Offset Drift Input Bias Current Input Offset Current Open Loop Gain –62 –86 15 2.4 5 0.15 0.15 –60 ±1 ±6 5 0.45 VCM = 0 V; V OUT = 0 V TMIN to T MAX VCM = 0 V; V OUT = 0 V VCM = 0 V; V OUT = 0 V TMIN to T MAX VCM = 0 V; V OUT = ± 2 V TMIN to T MAX 76 74 INPUT CHARACTERISTICS Common-Mode Input Resistance Differential Input Resistance Input Capacitance Input Voltage Range Input Common-Mode Voltage Range Common-Mode Rejection Ratio 80 35 125 VCM = –5 V to +5 V VCM = –5 V to +3.5 V 60 66 50 80 Capacitive Load Drive POWER SUPPLY Operating Range Quiescent Current per Amplifier Power Supply Rejection Ratio 80 35 125 MHz V/µs ns –62 –86 15 2.4 5 0.15 0.15 –60 dBc dBc nV/√Hz pA/√Hz pA/√Hz % Degrees dB ± 0.5 ± 1.6 5 0.45 1.2 2.0 350 76 74 40 280 1.6 –5.5 to +5.5 –5.2 to +5.2 80 90 Differential/Input Voltage OUTPUT CHARACTERISTICS Output Voltage Swing Low Output Voltage Swing High Output Voltage Swing Low Output Voltage Swing High Output Current Short Circuit Current ±6 ± 10 60 66 50 80 –4.94 +4.94 –4.7 +4.7 RL = 1 kΩ Sourcing Sinking G = +2 (See Figure 41) –4.98 +4.98 –4.85 +4.75 15 35 –50 15 ± 1.35 900 VS – = –5 V to –6 V or VS + = +5 V to +6 V 76 86 1.2 2.0 250 V –4.98 +4.98 –4.85 +4.75 15 35 –50 15 ± 1.35 900 76 86 mV mV µV/°C µA µA nA dB dB MΩ kΩ pF 3.4 –4.94 +4.94 –4.7 +4.7 ±6 1600 ± 1.5 ± 2.5 40 280 1.6 –5.5 to +5.5 –5.2 to +5.2 80 90 3.4 RL = 10 kΩ Units V dB dB V V V V V mA mA mA pF ±6 1600 V µA dB Specifications subject to change without notice. Powered by ICminer.com Electronic-Library Service CopyRight 2003 –4– REV. B AD8031/AD8032 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +12.6 V Internal Power Dissipation2 Plastic DIP Package (N) . . . . . . . . . . . . . . . . . . . 1.3 Watts Small Outline Package (R) . . . . . . . . . . . . . . . . . . 0.8 Watts µSOIC (RM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 Watts SOT-23-5 (RT) . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 Watts Input Voltage (Common-Mode) . . . . . . . . . . . . . ±VS ± 0.5 V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 3.4 V Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves Storage Temperature Range (N, R, RM, RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C temperature of the plastic, approximately +150°C. Exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of +175°C for an extended period can result in device failure. While the AD8031/AD8032 are internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (+150°C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curves shown in Figure 2. 2.0 MAXIMUM POWER DISSIPATION – Watts ABSOLUTE MAXIMUM RATINGS 1 NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for the device in free air: 8-Lead Plastic DIP Package: θJA = 90°C/W. 8-Lead SOIC Package: θJA = 155°C/W. 8-Lead µSOIC Package: θ JA = 200°C/W. 5-Lead SOT-23-5 Package: θ JA = 240°C/W. MAXIMUM POWER DISSIPATION 8-LEAD PLASTIC DIP PACKAGE TJ = +1508C 1.5 8-LEAD SOIC PACKAGE 1.0 8-LEAD mSOIC SOT-23-5 0.5 0 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 AMBIENT TEMPERATURE – 8C The maximum power that can be safely dissipated by the AD8031/AD8032 are limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition 70 80 90 Figure 2. Maximum Power Dissipation vs. Temperature ORDERING GUIDE Model Temperature Range Package Descriptions Package Options Brand Code AD8031AN AD8031AR AD8031AR-REEL AD8031AR-REEL7 AD8031ART-REEL AD8031ART-REEL7 AD8031BN AD8031BR AD8031BR-REEL AD8031BR-REEL7 –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C 8-Lead Plastic DIP 8-Lead SOIC 13" Tape and Reel 7" Tape and Reel 13" Tape and Reel 7" Tape and Reel 8-Lead Plastic DIP 8-Lead SOIC 13" Tape and Reel 7" Tape and Reel N-8 SO-8 SO-8 SO-8 RT-5 RT-5 N-8 SO-8 SO-8 SO-8 H0A H0A AD8032AN AD8032AR AD8032AR-REEL AD8032AR-REEL7 AD8032ARM AD8032ARM-REEL AD8032ARM-REEL7 AD8032BN AD8032BR AD8032BR-REEL AD8032BR-REEL7 –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C 8-Lead Plastic DIP 8-Lead SOIC 13" Tape and Reel 7" Tape and Reel 8-Lead µSOIC 13" Tape and Reel 7" Tape and Reel 8-Lead Plastic DIP 8-Lead SOIC 13" Tape and Reel 7" Tape and Reel N-8 SO-8 SO-8 SO-8 RM-8 RM-8 RM-8 N-8 SO-8 SO-8 SO-8 H9A H9A H9A CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8031/AD8032 feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. B Powered by ICminer.com Electronic-Library Service CopyRight 2003 –5– WARNING! ESD SENSITIVE DEVICE AD8031/AD8032–Typical Performance Characteristics 90 800 80 600 INPUT BIAS CURRENT – nA NUMBER OF PARTS IN BIN N = 250 70 60 50 40 30 20 400 200 VS = +2.7V 0 VS = +5V VS = +10V –200 –400 –600 10 0 –5 –4 –3 –2 –1 0 1 VOS – mV 2 3 4 –800 5 0 Figure 3. Typical VOS Distribution @ VS = 5 V 1 2 3 4 5 6 7 COMMON-MODE VOLTAGE – V 8 9 10 Figure 6. Input Bias Current vs. Common-Mode Voltage 0 2.5 VS = +5V –0.1 OFFSET VOLTAGE – mV OFFSET VOLTAGE – mV 2.3 2.1 VS = +5V 1.9 VS = 65V 1.7 1.5 –40 –30 –20 –10 0 –0.2 –0.3 –0.4 –0.5 –0.6 10 20 30 40 50 TEMPERATURE – 8C 60 70 80 0 90 Figure 4. Input Offset Voltage vs. Temperature 0.5 1 1.5 2 2.5 3 3.5 COMMON-MODE VOLTAGE – V 1 VS = +5V SUPPLY CURRENT/AMPLIFIER – mA INPUT BIAS – mA 5 1000 0.85 0.8 0.75 0.7 0.65 0.6 0.55 0.5 –40 –30 –20 –10 0 4.5 Figure 7. VOS vs. Common-Mode Voltage 0.95 0.9 4 10 20 30 40 50 TEMPERATURE – 8C 60 70 80 6IS, VS = 65V 900 850 +IS, VS = +5V 800 750 +IS, VS = +2.7V 700 650 600 –40 –30 –20 –10 0 90 Figure 5. Input Bias Current vs. Temperature Powered by ICminer.com Electronic-Library Service CopyRight 2003 950 10 20 30 40 50 TEMPERATURE – 8C 60 70 80 90 Figure 8. Supply Current vs. Temperature –6– REV. B AD8031/AD8032 1.2 VCC = +2.7V DIFFERENCE FROM VEE – Volts DIFFERENCE FROM VCC – Volts 0 –0.5 VCC = +5V –1 VCC –1.5 VCC = +10V VOUT VIN RLOAD VEE –2 VCC 2 VCC 1 VCC = +10V VOUT RLOAD VIN 0.8 VEE 0.6 VCC 2 VCC = +5V 0.4 0.2 VCC = +2.7V –2.5 100 1k RLOAD – Ohms 10k Figure 9. +Output Saturation Voltage vs. RLOAD @ +85 °C DIFFERENCE FROM VCC – Volts –0.5 VCC = +5V VCC –1.5 VCC = +10V VOUT VIN RLOAD VEE –2 –2.5 100 VCC 2 1k RLOAD – Ohms 10k DIFFERENCE FROM VEE – Volts DIFFERENCE FROM VCC – Volts VEE 0.6 VCC 2 VCC = +5V 0.4 1k RLOAD – Ohms 10k 1.2 VCC = +5V VCC –1.5 VCC = +10V VOUT VIN RLOAD VEE –2 VCC 2 1k RLOAD – Ohms Powered by ICminer.com Electronic-Library Service CopyRight 2003 VCC 1 VCC = +10V VOUT RLOAD VIN 0.8 VEE 0.6 VCC 2 VCC = +5V 0.4 0.2 VCC = +2.7V 0 100 10k Figure 11. +Output Saturation Voltage vs. RLOAD @ –40 °C REV. B VOUT RLOAD VIN 0.8 Figure 13. –Output Saturation Voltage vs. RLOAD @ +25 °C –0.5 –2.5 100 VCC = +10V VCC = +2.7V 0 100 VCC = +2.7V –1 VCC 1 0.2 Figure 10. +Output Saturation Voltage vs. RLOAD @ +25 °C 0 10k 1.2 VCC = +2.7V –1 1k RLOAD – Ohms Figure 12. –Output Saturation Voltage vs. RLOAD @ +85 °C DIFFERENCE FROM VCC – Volts 0 0 100 1k RLOAD – Ohms 10k Figure 14. –Output Saturation Voltage vs. RLOAD @ –40 °C –7– AD8031/AD8032–Typical Performance Characteristics 110 VS = +5V 105 500mV 100 INPUT BIAS CURRENT – mA –AOL 95 GAIN – dB 90 +AOL 85 80 75 70 1V 100 10 90 0 –10 VS = +5V 10 0% 500mV 65 –1.5 60 0 2k 4k 6k RLOAD – Ohms 8k 10k Figure 15. Open-Loop Gain (A OL) vs. RLOAD 0.05 DIFF GAIN – % VS = +5V RL = 1kV 84 –AOL 0.00 –0.05 –0.10 82 –0.15 +AOL DIFF PHASE – Degrees 80 78 76 –40 –30 –20 –10 0 10 20 30 40 50 TEMPERATURE – 8C 60 70 80 90 Figure 16. Open-Loop Gain (A OL) vs. Temperature 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th 1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th 0.05 0.00 –0.05 –0.10 Figure 19. Differential Gain and Phase @ VS = ± 5 V; RL = 1 k⍀ 110 100 VS = +5V VS = +5V INPUT VOLTAGE NOISE – nV/ Hz RLOAD = 10kV 100 90 RLOAD = 1kV 80 70 60 50 1st 0.10 0 0.5 1 1.5 2 2.5 3 VOUT – V 3.5 4 4.5 Figure 17. Open-Loop Gain (AOL) vs. VOUT Powered by ICminer.com Electronic-Library Service CopyRight 2003 VOLTAGE NOISE 10 10 3 1 CURRENT NOISE 0.1 1 0.3 10 5 100 30 100 1k 10k 100k FREQUENCY – Hz 1M INPUT CURRENT NOISE – pA/ Hz GAIN – dB 6.5 Figure 18. Differential Input Overvoltage I-V Characteristics 86 AOL – dB 0.5 2.5 4.5 INPUT VOLTAGE – Volts 10M Figure 20. Input Voltage Noise vs. Frequency –8– REV. B AD8031/AD8032 5 VS = +5V G = +1 RL = 1kV 40 30 GAIN 2 20 1 10 0 0 PHASE – Degree NORMALIZED GAIN – dB 3 –1 –2 –3 –4 –5 0.1 1 10 FREQUENCY – MHz Figure 21. Unity Gain , –3 dB Bandwidth TOTAL HARMONIC DISTORTION – dBc NORMALIZED GAIN – dB +858C 1 0 –408C +258C –1 VS –2 2kV VOUT VIN 50V –4 0.1 1 10 FREQUENCY – MHz CLOSED-LOOP GAIN – dB TOTAL HARMONIC DISTORTION – dBc VS = +5V RL + CL TO 2.5V 0 VS = 65V –1 –2 –3 G = +1 CL = 5pF RL = 1kV –6 –7 1M 10M FREQUENCY – Hz 100 –30 VCC G = +1, RL = 2kV TO 2 –40 –50 2.5V p-p VS = +2.7V 1.3V p-p VS = +2.7V –60 2V p-p VS = +2.7V –70 4.8V p-p VS = +5V Powered by ICminer.com Electronic-Library Service CopyRight 2003 –30 –40 10M 10k 100k 1M FUNDAMENTAL FREQUENCY – Hz G = +2 VS = +5V VCC RL = 1kV TO 2 –50 4.8V p-p –60 1V p-p –70 4.6V p-p –80 –90 1k 100M Figure 23. Closed-Loop Gain vs. Supply Voltage REV. B 10 FREQUENCY – MHz –20 VS = +2.7V RL + CL TO 1.35V 1 –8 100k 1 Figure 25. Total Harmonic Distortion vs. Frequency; G = +1 2 –5 –225 –80 1k 100 Figure 22. Closed-Loop Gain vs. Temperature –4 –180 –20 VS = +5V VIN = –16dBm 2 –5 –20 Figure 24. Open-Loop Frequency Response 3 –3 PHASE –135 0.3 100 –10 –90 OPEN-LOOP GAIN – dB 4 4V p-p 10k 100k 1M FUNDAMENTAL FREQUENCY – Hz 10M Figure 26. Total Harmonic Distortion vs. Frequency; G = +2 –9– AD8031/AD8032–Typical Performance Characteristics 10 0 POWER SUPPLY REJECTION RATIO – dB VS = 65V OUTPUT – V p-p 8 6 VS = +5V 4 VS = +2.7V 2 0 1k 100k FREQUENCY – Hz 10k 1M 10M –20 VS = +5V –40 –60 –80 –100 –120 1k 100 Figure 27. Large Signal Response 100 50 10k 100k 1M FREQUENCY – Hz 10M 100M Figure 30. PSRR vs. Frequency RBT = 50V VS = +5V RL = 10kV TO 2.5V VIN = 6V p-p G = +1 5.5 10 1V / Div ROUT – V 4.5 3.5 2.5 1.5 1 0.5 RBT VOUT 0.1 RBT = 0 1 10 FREQUENCY – MHz 0.1 –0.5 10ms / Div 100 200 Figure 31. Output Voltage Figure 28. ROUT vs. Frequency VS = +5V INPUT –20 5.5 VS = +5V G = +1 INPUT = 650mV BEYOND RAILS 4.5 –40 1V / Div COMMON-MODE REJECTION RATIO – dB 0 3.5 2.5 1.5 –60 0.5 –0.5 –80 –100 100 1k 10k 100k FREQUENCY – Hz 1M 10ms / Div 10M Figure 32. Output Voltage Phase Reversal Behavior Figure 29. CMRR vs. Frequency Powered by ICminer.com Electronic-Library Service CopyRight 2003 –10– REV. B AD8031/AD8032 RL TO +2.5V VS = +2.7V RL = 1kV G = –1 2.85 500mV/Div 500mV/Div 2.35 1.85 1.35 RL TO 1.35V 0.85 0.35 VS = +5V RL = 1kV G = –1 RL TO GND RL TO GND 0 10ms / Div 10ms / Div Figure 33. Output Swing 3.1 G = +2 RF = RG = 2.5kV RL = 2kV CL = 5pF VS = +5V G = +1 RF = 0 RL = 2kV TO 2.5V CL = 5pF TO 2.5V VS = +5V 2.56 2.54 2.7 20mV/Div 200mV/Div 2.9 Figure 35. Output Swing 2.5 2.3 2.52 2.50 2.48 2.1 2.46 1.9 2.44 50ns/Div 50ns / Div Figure 34. 1 V Step Response Figure 36. 100 mV Step Response CROSSTALK – dB –50 –60 –70 VS = 62.5V VIN = +10dBm –80 –90 –100 2.5kV 2.5kV 2.5kV 2.5kV VOUT VIN 50V 1kV 50V TRANSMITTER 0.1 1 10 FREQUENCY – MHz RECEIVER 100 200 Figure 37. Crosstalk vs. Frequency REV. B Powered by ICminer.com Electronic-Library Service CopyRight 2003 –11– AD8031/AD8032 THEORY OF OPERATION Switching to the NPN pair as the common-mode voltage is driven beyond 1 V within the positive supply allows the amplifier to provide useful operation for signals at either end of the supply voltage range and eliminates the possibility of phase reversal for input signals up to 500 mV beyond either power supply. Offset voltage will also change to reflect the offset of the input pair in control. The transition region is small, on the order of 180 mV. These sudden changes in the dc parameters of the input stage can produce glitches that will adversely affect distortion. The AD8031/AD8032 are single and dual versions of high speed, low power voltage feedback amplifiers featuring an innovative architecture that maximizes the dynamic range capability on the inputs and outputs. Linear input common-mode range exceeds either supply voltage by 200 mV, and the amplifiers show no phase reversal up to 500 mV beyond supply. The output swings to within 20 mV of either supply when driving a light load; 300 mV when driving up to 5 mA. Fabricated on Analog Devices’ XFCB, a 4 GHz dielectrically isolated fully complementary bipolar process, the amplifier provides an impressive 80 MHz bandwidth when used as a follower and 30 V/µs slew rate at only 800 µA supply current. Careful design allows the amplifier to operate with a supply voltage as low as 2.7 volts. Overdriving the Input Stage Sustained input differential voltages greater than 3.4 volts should be avoided as the input transistors may be damaged. Input clamp diodes are recommended if the possibility of this condition exists. Input Stage Operation A simplified schematic of the input stage appears in Figure 38. For common-mode voltages up to 1.1 volts within the positive supply, (0 V to 3.9 V on a single 5 V supply) tail current I2 flows through the PNP differential pair, Q13 and Q17. Q5 is cut off; no bias current is routed to the parallel NPN differential pair Q2 and Q3. As the common-mode voltage is driven within 1.1 V of the positive supply, Q5 turns on and routes the tail current away from the PNP pair and to the NPN pair. During this transition region, the amplifier’s input current will change magnitude and direction. Reusing the same tail current ensures that the input stage has the same transconductance (which determines the amplifier’s gain and bandwidth) in both regions of operation. The voltages at the collectors of the input pairs are set to 200 mV from the power supply rails. This allows the amplifier to remain in linear operation for input voltages up to 500 mV beyond the supply voltages. Driving the input common-mode voltage beyond that point will forward bias the collector junction of the input transistor, resulting in phase reversal. Sustaining this condition for any length of time should be avoided as it is easy to exceed the maximum allowed input differential voltage when the amplifier is in phase reversal. VCC R1 2kV I2 90mA Q9 I3 25mA R2 2kV 1.1V R5 50kV Q3 VIN R6 850V Q5 R8 850V VIP Q13 Q2 R7 850V R9 850V 1 Q6 Q10 1 Q8 Q7 4 Q17 OUTPUT STAGE, COMMON-MODE FEEDBACK Q14 Q11 4 1 I1 5mA VEE Q18 4 I4 25mA Q4 Q15 Q16 R3 2kV 4 1 R4 2kV Figure 38. Simplified Schematic of AD8031 Input Stage Powered by ICminer.com Electronic-Library Service CopyRight 2003 –12– REV. B AD8031/AD8032 Output Stage, Open-Loop Gain and Distortion vs. Clearance from Power Supply The AD8031 features a rail-to-rail output stage. The output transistors operate as common emitter amplifiers, providing the output drive current as well as a large portion of the amplifier’s open-loop gain. I1 25mA Output overdrive of an amplifier occurs when the amplifier attempts to drive the output voltage to a level outside its normal range. After the overdrive condition is removed, the amplifier must recover to normal operation in a reasonable amount of time. As shown in Figure 40, the AD8031/AD8032 recover within 100 ns from negative overdrive and within 80 ns from positive overdrive. I2 25mA Q51 Q42 Output Overdrive Recovery Q47 RF = RG = 2kV DIFFERENTIAL DRIVE FROM INPUT STAGE Q37 Q38 Q68 R29 300V Q20 RG RF VOUT RL VIN C9 5pF 50V Q27 Q21 Q43 VOUT C5 1.5pF Q48 Q49 I4 25mA I5 25mA Q50 Q44 1V Figure 39. Output Stage Simplified Schematic The output voltage limit depends on how much current the output transistors are required to source or sink. For applications with very low drive requirements (a unity gain follower driving another amplifier input, for instance), the AD8031 typically swings within 20 mV of either voltage supply. As the required current load increases, the saturation output voltage will increase linearly as ILOAD × R C, where ILOAD is the required load current and RC is the output transistor collector resistance. For the AD8031, the collector resistances for both output transistors are typically 25 Ω. As the current load exceeds the rated output current of 15 mA, the amount of base drive current required to drive the output transistor into saturation will reach its limit, and the amplifier’s output swing will rapidly decrease. The open-loop gain of the AD8031 decreases approximately linearly with load resistance and also depends on the output voltage. Open-loop gain stays constant to within 250 mV of the positive power supply, 150 mV of the negative power supply and then decreases as the output transistors are driven further into saturation. VS = 62.5V VIN = 62.5V RL = +1kV TO GND 100ns Figure 40. Overdrive Recovery Driving Capacitive Loads Capacitive loads interact with an op amp’s output impedance to create an extra delay in the feedback path. This reduces circuit stability, and can cause unwanted ringing and oscillation. A given value of capacitance causes much less ringing when the amplifier is used with a higher noise gain. The capacitive load drive of the AD8031/AD8032 can be increased by adding a low valued resistor in series with the capacitive load. Introducing a series resistor tends to isolate the capacitive load from the feedback loop, thereby, diminishing its influence. Figure 41 shows the effects of a series resistor on capacitive drive for varying voltage gains. As the closed-loop gain is increased, the larger phase margin allows for larger capacitive loads with less overshoot. Adding a series resistor at lower closed-loop gains accomplishes the same effect. For large capacitive loads, the frequency response of the amplifier will be dominated by the roll-off of the series resistor and capacitive load. 1000 The distortion performance of the AD8031/AD8032 amplifiers differs from conventional amplifiers. Typically an amplifier’s distortion performance degrades as the output voltage amplitude increases. RS = 5V CAPACITIVE LOAD – pF VS = +5V 200mV STEP WITH 30% OVERSHOOT Used as a unity gain follower, the AD8031/AD8032 output will exhibit more distortion in the peak output voltage region around VCC –0.7 V. This unusual distortion characteristic is caused by the input stage architecture and is discussed in detail in the section covering “Input Stage Operation.” RS = 0V 100 RS = 20V RS = 20V 10 RG RF RS = 0V, 5V RS VOUT CL 1 0 1 2 3 CLOSED-LOOP GAIN – V/V 4 5 Figure 41. Capacitive Load Drive vs. Closed-Loop Gain REV. B Powered by ICminer.com Electronic-Library Service CopyRight 2003 –13– AD8031/AD8032 0 APPLICATIONS A 2 MHz Single Supply Biquad Bandpass Filter Figure 42 shows a circuit for a single supply biquad bandpass filter with a center frequency of 2 MHz. A 2.5 V bias level is easily created by connecting the noninverting inputs of all three op amps to a resistor divider consisting of two 1 kΩ resistors connected between +5 V and ground. This bias point is also decoupled to ground with a 0.1 µF capacitor. The frequency response of the filter is shown in Figure 43. GAIN – dB –10 In order to maintain an accurate center frequency, it is essential that the op amp has sufficient loop gain at 2 MHz. This requires the choice of an op amp with a significantly higher unity gain crossover frequency. The unity gain crossover frequency of the AD8031/AD8032 is 40 MHz. Multiplying the open-loop gain by the feedback factors of the individual op amp circuits yields the loop gain for each gain stage. From the feedback networks of the individual op amp circuits, we can see that each op amp has a loop gain of at least 21 dB. This level is high enough to ensure that the center frequency of the filter is not affected by the op amp’s bandwidth. If, for example, an op amp with a gain bandwidth product of 10 MHz was chosen in this application, the resulting center frequency would shift by 20% to 1.6 MHz. R6 1kV –20 –30 –40 –50 10k 100k 1M FREQUENCY – Hz 10M 100M Figure 43. Frequency Response of 2 MHz Bandpass Filter High Performance Single Supply Line Driver Even though the AD8031/AD8032 swing close to both rails, the AD8031 has optimum distortion performance when the signal has a common-mode level half way between the supplies and when there is about 500 mV of headroom to each rail. If low distortion is required in single supply applications for signals that swing close to ground, an emitter follower circuit can be used at the op amp output. C1 50pF +5V R2 2kV R4 2kV +5V 0.1mF VIN 10mF +5V 0.1mF R1 3kV R3 2kV 1kV 0.1mF C2 50pF 3 VIN R5 2kV 6 49.9V AD8031 1/2 AD8032 0.1mF 7 2 2N3904 4 AD8031 1/2 AD8032 2.49kV 1kV 2.49kV 49.9V 200V VOUT 49.9V VOUT Figure 42. A 2 MHz Biquad Bandpass Filter Using AD8031/ AD8032 Powered by ICminer.com Electronic-Library Service CopyRight 2003 –14– Figure 44. Low Distortion Line Driver for Single Supply Ground Referenced Signals REV. B AD8031/AD8032 Figure 44 shows the AD8031 configured as a single supply gainof-2 line driver. With the output driving a back terminated 50 Ω line, the overall gain from VIN to VOUT is unity. In addition to minimizing reflections, the 50 Ω back termination resistor protects the transistor from damage if the cable is short circuited. The emitter follower, which is inside the feedback loop, ensures that the output voltage from the AD8031 stays about 700 mV above ground. Using this circuit, very low distortion is attainable even when the output signal swings to within 50 mV of ground. The circuit was tested at 500 kHz and 2 MHz. Figures 45 and 46 show the output signal swing and frequency spectrum at 500 kHz. At this frequency, the output signal (at VOUT), which has a peak-to-peak swing of 1.95 V (50 mV to 2 V), has a THD of –68 dB (SFDR = –77 dB). Figures 47 and 48 show the output signal swing and frequency spectrum at 2 MHz. As expected, there is some degradation in signal quality at the higher frequency. When the output signal has a peak-to-peak swing of 1.45 V (swinging from 50 mV to 1.5 V), the THD is –55 dB (SFDR = –60 dB). This circuit could also be used to drive the analog input of a single supply high speed ADC whose input voltage range is referenced to ground (e.g., 0 V to 2 V or 0 V to 4 V). In this case, a back termination resistor is not necessary (assuming a short physical distance from transistor to ADC), so the emitter of the external transistor would be connected directly to the ADC input. The available output voltage swing of the circuit would, therefore be doubled. 1.5V 100 100 90 90 10 0% 2V 10 0% 0.2V 50mV 0.5V Figure 45. Output Signal Swing of Low Distortion Line Driver at 500 kHz Figure 47. Output Signal Swing of Low Distortion Line Driver at 2 MHz +7dBm VERTICAL SCALE – 10dB/Div VERTICAL SCALE – 10dB/Div +9dBm START 0Hz START 0Hz STOP 5MHz Powered by ICminer.com Electronic-Library Service CopyRight 2003 STOP 20MHz Figure 48. THD of Low Distortion Line Driver at 2 MHz Figure 46. THD of Low Distortion Line Driver at 500 kHz REV. B 200ns 50mV 1ms –15– AD8031/AD8032 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 0.1968 (5.00) 0.1890 (4.80) 0.39 (9.91) MAX 8 5 0.25 (6.35) 0.31 (7.87) 1 0.1574 (4.00) 0.1497 (3.80) 4 0.035 ±0.01 (0.89 ±0.25) PIN 1 0.165 ±0.01 (4.19 ±0.25) 0.30 (7.62) REF 0.018 ±0.003 0.10 0.033 (0.46 ±0.08) (2.54) (0.84) BSC NOM SEATING PLANE 15° 0° 0.011 ±0.003 (0.28 ±0.08) SEATING PLANE 4 0.2440 (6.20) 0.2284 (5.80) 0.0688 (1.75) 0.0532 (1.35) 0.0500 0.0192 (0.49) (1.27) 0.0138 (0.35) BSC 0.0196 (0.50) x 45° 0.0099 (0.25) 0.0098 (0.25) 0.0075 (0.19) 8° 0° 0.0500 (1.27) 0.0160 (0.41) 5-Lead Plastic Surface Mount (SOT-23) (RT-5) 0.122 (3.10) 0.114 (2.90) 0.1181 (3.00) 0.1102 (2.80) 5 0.0669 (1.70) 0.0590 (1.50) 0.199 (5.05) 0.187 (4.75) 1 5 1 PIN 1 8-Lead SOIC (RM-8) 8 8 0.0098 (0.25) 0.0040 (0.10) 0.18 ±0.03 (4.57 ±0.76) 0.125 (3.18) MIN 0.122 (3.10) 0.114 (2.90) C2152b–0–9/99 8-Lead Plastic SOIC (SO-8) 8-Lead Plastic DIP (N-8) 5 1 4 2 0.1181 (3.00) 0.1024 (2.60) 3 4 PIN 1 PIN 1 0.0374 (0.95) BSC 0.0256 (0.65) BSC 0.120 (3.05) 0.112 (2.84) 0.120 (3.05) 0.112 (2.84) 0.0512 (1.30) 0.0354 (0.90) 0.043 (1.09) 0.037 (0.94) 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) 0.008 (0.20) 0.011 (0.28) 0.003 (0.08) 33° 27° 0.0059 (0.15) 0.0019 (0.05) 0.028 (0.71) 0.016 (0.41) 0.0079 (0.20) 0.0031 (0.08) 0.0571 (1.45) 0.0374 (0.95) 0.0197 (0.50) 0.0138 (0.35) SEATING PLANE 108 08 0.0217 (0.55) 0.0138 (0.35) PRINTED IN U.S.A. SEATING PLANE 0.0748 (1.90) BSC Powered by ICminer.com Electronic-Library Service CopyRight 2003 –16– REV. B