AD ADG821BRM

a
FEATURES
0.8 Max On Resistance @125C
0.28 Max On Resistance Flatness @125C
1.8 V to 5.5 V Single Supply
200 mA Current Carrying Capability
Automotive Temperature Range: –40C to +125C
Rail-to-Rail Operation
8-Lead MSOP Package
33 ns Switching Times
Typical Power Consumption (<0.01 W)
TTL/CMOS Compatible Inputs
Pin Compatible with ADG721/722/723
APPLICATIONS
Power Routing
Battery-Powered Systems
Communication Systems
Data Acquisition Systems
Audio and Video Signal Routing
Cellular Phones
Modems
PCMCIA Cards
Hard Drives
Relay Replacement
<1 Ω CMOS 1.8 V to 5.5 V,
Dual SPST Switches
ADG821/ADG822/ADG823
FUNCTIONAL BLOCK DIAGRAM
ADG822
ADG821
S1
S1
IN1
IN1
D1
D1
D2
D2
IN2
IN2
S2
S2
ADG823
S1
IN1
D1
D2
IN2
S2
SWITCHES SHOWN FOR A LOGIC “0”
INPUT
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG821, ADG822, and ADG823 are monolithic CMOS
SPST (single pole, single throw) switches. These switches are
designed on an advanced submicron process that provides low
power dissipation, yet gives high switching speed, low on
resistance, and low leakage currents.
1. Very Low On Resistance (0.5 Ω typ)
The ADG821, ADG822, and ADG823 are designed to operate
from a single 1.8 V to 5.5 V supply, making them ideal for use
in battery-powered instruments.
5. Low Power Dissipation. CMOS construction ensures low
power dissipation.
Each switch of the ADG821/ADG822/ADG823 conducts equally
well in both directions when on. The ADG821, ADG822, and
ADG823 contain two independent SPST switches. The ADG821
and ADG822 differ only in that both switches are normally open
and normally closed, respectively. In the ADG823, Switch 1 is
normally open and Switch 2 is normally closed. The ADG823
exhibits break-before-make switching action.
2. On Resistance Flatness (RFLAT(ON)) (0.15 Ω typ)
3. Automotive Temperature Range –40°C to +125°C
4. 200 mA Current Carrying Capability
6. 8-Lead MSOP Package
The ADG821, ADG822, and ADG823 are available in an 8-lead
MSOP package.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
± 10%, GND = 0 V. All specifications
ADG821/ADG822/ADG823–SPECIFICATIONS1 (V–40C= 5toV+125C,
unless otherwise noted.)
DD
Parameter
25C
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
–40C to
+85C
–40C to
+125C2
0 V to VDD
0.5
0.6
On Resistance Match Between
Channels (∆RON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
0.16
0.2
0.15
0.23
± 0.01
± 0.25
± 0.01
± 0.25
± 0.01
± 0.25
0.7
0.8
0.25
0.28
0.26
0.3
Test Conditions/Comments
V
Ω typ
Ω max
VS = 0 V to VDD, IS = 100 mA;
Test Circuit 1
Ω typ
Ω max
Ω typ
Ω max
VS = 0 V to VDD, IS = 100 mA
VS = 0 V to VDD, IS = 100 mA
VDD = 5.5 V
VS = 4.5 V/1 V, VD = 1 V/4.5 V;
Test Circuit 2
VS = 4.5 V/1 V, VD = 1 V/4.5 V;
Test Circuit 2
VS = VD = 1 V, or VS = VD = 4.5 V;
Test Circuit 3
±3
± 25
±3
± 25
±3
± 25
nA typ
nA max
nA typ
nA max
nA typ
nA max
2.0
0.8
V min
V max
± 0.1
µA typ
µA max
pF typ
VIN = VINL or VINH
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
RL = 50 Ω, CL = 35 pF,
VS = 3 V; Test Circuit 4
RL = 50 Ω, CL = 35 pF,
VS = 3 V; Test Circuit 4
RL = 50 Ω, CL = 35 pF,
VS1 = VS2 = 3 V; Test Circuit 5
VS = 2.5 V; RS = 0 Ω, CL = 1 nF;
Test Circuit 6
RL = 50 Ω, CL = 5 pF,
f =1 MHz; Test Circuit 7
RL = 50 Ω, CL = 5 pF
f = 1 MHz; Test Circuit 9
RL = 50 Ω, CL = 5 pF;
Test Circuit 8
f =1 MHz
f =1 MHz
f =1 MHz
0.005
CIN, Digital Input Capacitance
Unit
4
3
DYNAMIC CHARACTERISTICS
tON
tOFF
33
45
11
16
32
48
52
19
21
Break-Before-Make Time Delay, tBBM
(ADG823 Only)
Charge Injection
15
1
Off Isolation
–52
dB typ
Channel-to-Channel Crosstalk
–82
dB typ
Bandwidth –3 dB
24
MHz typ
CS (OFF)
CD (OFF)
CD, CS (ON)
85
98
230
pF typ
pF typ
pF typ
VDD = 5.5 V
Digital Inputs = 0 V or 5.5 V
POWER REQUIREMENTS
IDD
0.001
1.0
2.0
µA typ
µA max
NOTES
1
Temperature range: Automotive range: –40°C to +125°C.
2
On resistance parameters tested with I S = 10 mA.
3
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. 0
(VDD = 2.7 V to 3.6 V, GND = 0 V. All specifications –40C to +125C, unless otherwise noted.)1
Parameter
25C
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
–40C to
+85C
–40C to
+125C2
0 V to VDD
On Resistance Match Between
Channels (∆RON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
0.7
1.4
0.16
0.2
0.3
± 0.01
± 0.25
± 0.01
± 0.25
± 0.01
± 0.25
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
1.5
1.6
0.25
0.28
0.33
Test Conditions/Comments
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
VS = 0 V to VDD, IS = 100 mA
VS = 0 V to VDD, IS = 100 mA
VDD = 3.6 V
VS = 3.3 V/1 V, VD = 1 V/3.3 V;
Test Circuit 2
VS = 3.3 V/1 V, VD = 1 V/3.3 V;
Test Circuit 2
VS = VD = 1 V, or 3.3 V;
Test Circuit 3
VS = 0 V to VDD, IS = 100 mA;
Test Circuit 1
±3
± 15
±3
± 25
±3
± 25
nA typ
nA max
nA typ
nA max
nA typ
nA max
2.0
0.8
V min
V max
± 0.1
µA typ
µA max
pF typ
VIN = VINL or VINH
RL = 50 Ω, CL = 35 pF,
VS = 1.5 V; Test Circuit 4
RL = 50 Ω, CL = 35 pF,
VS = 1.5 V; Test Circuit 4
RL = 50 Ω, CL = 35 pF,
VS1 = VS2 = 1.5V; Test Circuit 5
VS =1.5 V; RS = 0 Ω, CL = 1 nF;
Test Circuit 6
RL = 50 Ω, CL = 5 pF,
f = 1 MHz; Test Circuit 7
RL = 50 Ω, CL = 5 pF,
f = 1 MHz; Test Circuit 9
RL = 50 Ω, CL = 5 pF;
Test Circuit 8
f =1 MHz
f =1 MHz
f =1 MHz
0.005
CIN, Digital Input Capacitance
Unit
ADG821/ADG822/ADG823
4
3
DYNAMIC CHARACTERISTICS
tON
Break-Before-Make Time Delay, tBBM
(ADG823 Only)
Charge Injection
±2
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
Off Isolation
–52
dB typ
Channel-to-Channel Crosstalk
–82
dB typ
Bandwidth –3 dB
24
MHz typ
CS (OFF)
CD (OFF)
CD, CS (ON)
85
98
230
pF typ
pF typ
pF typ
tOFF
48
67
12
18
40
74
78
20
23
1
VDD = 3.6 V
Digital Inputs = 0 V or 3.6 V
POWER REQUIREMENTS
IDD
0.001
1.0
2.0
µA typ
µA max
NOTES
1
Temperature range: Automotive range: –40°C to +125°C.
2
On resistance parameters tested with I S = 10 mA.
3
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0
–3–
Spec RIGHT
ADG821/ADG822/ADG823
ABSOLUTE MAXIMUM RATINGS 1
θJCThermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . . 300°C
IR Reflow, Peak Temperature (<20 sec) . . . . . . . . . . . . 235°C
(TA = 25°C, unless otherwise noted.)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Analog Inputs2 . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V or
30 mA, Whichever Occurs First
Digital Inputs2 . . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 400 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 200 mA
Operating Temperature Range
Automotive . . . . . . . . . . . . . . . . . . . . . . . –40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature (Tj max) . . . . . . . . . . . . . . . . . . . 150°C
Package Power Dissipation . . . . . . . . . . . . . . (Tj max – TA)/θJA
8-Lead MSOP Package
θJAThermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S, or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
Table I. Truth Table for the ADG821/ADG822
Table II. Truth Table for the ADG823
ADG821 INx
ADG822 INx
Switch x Condition
IN1
IN2
Switch S1
Switch S2
0
1
1
0
OFF
ON
0
0
1
1
0
1
0
1
OFF
OFF
ON
ON
ON
OFF
ON
OFF
ORDERING GUIDE
Model Option
Temperature Range
Brand*
Package Description
Package
ADG821BRM
ADG822BRM
ADG823BRM
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
SQB
SRB
SSB
MSOP (microSmall Outline IC)
MSOP (microSmall Outline IC)
MSOP (microSmall Outline IC)
RM-8
RM-8
RM-8
*
Branding on MSOP packages is limited to three characters due to space constraints.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADG821/ADG822/ADG823 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
–4–
WARNING!
ESD SENSITIVE DEVICE
REV. 0
ADG821/ADG822/ADG823
PIN CONFIGURATION
8-Lead MSOP
(RM-8)
S1 1
V
TOP VIEW 8 DD
(Not to Scale)
D1 2
7 IN1
IN2 3
GND 4
ADG821/
ADG822/
ADG823
6 D2
5 S2
TERMINOLOGY
VDD
Most Positive Power Supply Potential
GND
Ground (0 V) Reference
IDD
Positive Supply Current
S
Source Terminal. May be an input or output.
D
Drain Terminal. May be an input or output.
IN
Logic Control Input
RON
Ohmic Resistance between D and S
∆RON
On Resistance Match between any Two Channels (i.e., RON max – RON min)
RFLAT(ON)
Flatness is defined as the difference between the maximum and minimum value of on resistance as
measured over the specified analog signal range.
IS (OFF)
Source Leakage Current with the Switch OFF
ID (OFF)
Drain Leakage Current with the Switch OFF
ID, IS (ON)
Channel Leakage Current with the Switch ON
VD (VS)
Analog Voltage on Terminals D and S
VINL
Maximum Input Voltage for Logic “0”
VINH
Minimum Input Voltage for Logic “1”
IINL (IINH)
Input Current of the Digital Input
CS (OFF)
OFF Switch Source Capacitance
CD (OFF)
OFF Switch Drain Capacitance
CD, CS (ON)
ON Switch Capacitance
tON
Delay between Applying the Digital Control Input and the Output Switching ON
tOFF
Delay between Applying the Digital Control Input and the Output Switching OFF
tBBM
OFF time or ON time measured between the 90% points of both switches, when switching from one
address state to another.
Charge Injection
It is a measure of the glitch impulse transferred from the digital input to the analog output during switching.
Crosstalk
It is a measure of unwanted signal that is coupled through from one channel to another as a result
of parasitic capacitance.
Off Isolation
A Measure of Unwanted Signal Coupling through an OFF Switch
Bandwidth
The Frequency at which the Output Is Attenuated by –3 dBs
On Response
The Frequency Response of the ON Switch
Insertion Loss
The Loss due to the On Resistance of the Switch
REV. 0
–5–
ADG821/ADG822/ADG823–Typical Performance Characteristics
0.8
0.8
5.0
0.7
VDD = 3.0V
TA = 25C
VDD = 2.7V
VDD = 5V
TA = 25C
4.5
0.7
ON RESISTANCE – VDD = 4.5V
0.5
0.4
0.3
VDD = 5.0V
0.2
3.5
3.0
2.5
2.0
1.5
VDD = 5.5V
0
0
1
2
3
VD (VS) – V
4
5
5
TPC 1. On Resistance vs. VD (VS)
8
0.7
7
0.5
0.4
0.3
0.1
1.5
2.0
VD (VS) – V
2.5
TPC 3. On Resistance vs. VD (VS)
for Different Temperatures
TA = 25C
IS, I D (ON)
4
ID (OFF)
3
2
3.0
50
VDD = 3V
0
–50
–100
–150
IS (OFF)
–200
0
20
40
60
80
100
TEMPERATURE – C
120 125
0
TA = 25C
–10
VDD = 3V
50
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Vs – V
TPC 6. Charge Injection vs.
Source Voltage
0
60
VDD = 5V
100
TPC 5. Leakage Currents vs.
Temperature
TPC 4. On Resistance vs. VD (VS)
for Different Temperatures
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VD (VS) – V
150
5
–1
1.0
–40C
0
VDD = 5V, 3V
0
VDD = 3V
0.5
0.2
200
1
0
0.3
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
VD (VS) – V
–40C
0.2
0.4
0
0
6
CURRENT – nA
ON RESISTANCE – +125C
+85C
+25C
+85C
0.5
+25C
TPC 2. On Resistance vs. VD (VS)
0.8
0.6
0.6
0.1
0.5
0
+125C
1.0
0.1
0
VDD = 1.8V
CHARGE INJECTION – pC
ON RESISTANCE – 0.6 VDD = 3.3V
ON RESISTANCE – 4.0
0
VDD = 3V, 5V
TA = 25C
–1
tON
VDD = 5V
30
20
VDD = 3V, 5V
tOFF
10
0
–40 –20
ATTENUATION – dB
TIME – ns
40
ATTENUATION – dB
–2
–20
–30
–40
–50
20 40 60 80 100 1200
TEMPERATURE – C
TPC 7. tON/tOFF vs. Temperature
–4
–5
–6
–7
–60
0
–3
–70
0.2
–8
VDD = 3V, 5V
TA = 25C
–9
1
10
FREQUENCY – MHz
100
TPC 8. Off Isolation vs. Frequency
–6–
0.1
1
10
FREQUENCY – MHz
100
TPC 9. On Response vs. Frequency
REV. 0
ADG821/ADG822/ADG823
LOGIC THRESHOLD VOLTAGE – V
–20
ATTENUATION – dB
–30
–40
–50
–60
–70
–80
–90
–100
–110
0.1
1
10
FREQUENCY – MHz
TPC 10. Crosstalk vs. Frequency
REV. 0
100
1.8
0.050
1.6
0.045
0.040
1.4
1.0
VS = 5V
VP-P = 2V
RL = 600
0.035
VIN RISING
1.2
THD – %
–10
VIN FALLING
0.8
0.6
0.030
0.025
0.020
0.015
0.4
0.010
0.4
0.005
0
0
1
2
3
VDD – V
4
5
TPC 11. Logic Threshold
Voltage vs. Suppply Voltage
–7–
6
20
100
1K
FREQUENCY – Hz
TPC 12. THD
10K
ADG821/ADG822/ADG823
Test Circuits
IDS
IS (OFF)
V1
S
D
VS
D
ID (ON)
ID (OFF)
S
A
S
NC
A
D
A
VD
VD
NC = NO CONNECT
VS
RON = V1/IDS
Test Circuit 2. Off Leakage
Test Circuit 1. On Resistance
Test Circuit 3. On Leakage
VDD
0.1F
VIN ADG821
VDD
S
VS
VOUT
D
RL
50
IN
VIN
ADG822
50%
50%
50%
50%
CL
35pF
90%
90%
VOUT
GND
tOFF
tON
Test Circuit 4. Switching Times
VDD
0.1F
VIN
VDD
VS1
VS2
S1
D1
S2
D2
VOUT2
RL2
50
IN1, IN2
VIN
50%
0V
VOUT1
RL1
50
90%
90%
VOUT1
CL1
35pF
50%
0V
CL2
35pF
GND
90%
VOUT2
90%
0V
tBBM
tBBM
Test Circuit 5. Break-Before-Make Time Delay, tBBM (ADG823 only)
VDD
SW ON
VDD
RS
VS
S
D
SW OFF
VIN
VOUT
CL
1nF
IN
VOUT
GND
VOUT
QINJ = CL ∆VOUT
Test Circuit 6. Charge Injection
–8–
REV. 0
ADG821/ADG822/ADG823
VDD
VDD
0.1F
0.1F
NETWORK
ANALYZER
VDD
S
VDD
S
50
50
IN
RL
50
GND
VOUT
VIN
GND
VOUT
INSERTION LOSS = 20 LOG
VS
Test Circuit 7. Off Isolation
0.1F
NETWORK
ANALYZER
VDD
S1
RL
50
D
S2
R
50
IN
VS
GND
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
VOUT
VS
Test Circuit 9. Channel-to-Channel Crosstalk
REV. 0
RL
50
–9–
VOUT
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
Test Circuit 8. Bandwidth
VDD
50
VS
D
VIN
VOUT
50
IN
VS
D
OFF ISOLATION = 20 LOG
NETWORK
ANALYZER
ADG821/ADG822/ADG823
OUTLINE DIMENSIONS
8-Lead MSOP Package [MSOP]
(RM-8)
Dimensions shown in millimeters
3.00
BSC
8
5
4.90
BSC
3.00
BSC
1
4
PIN 1
0.65 BSC
1.10 MAX
0.15
0.00
0.38
0.22
0.23
0.08
8
0
0.80
0.40
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187AA
–10–
REV. 0
–11–
–12–
PRINTED IN U.S.A.
C02851–0–8/02(0)