a 1 pC Charge Injection, 100 pA Leakage CMOS 5 V/5 V/3 V 4-Channel Multiplexer ADG604 FEATURES 1 pC Charge Injection (Over the Full Signal Range) 2.7 V to 5.5 V Dual Supply 2.7 V to 5.5 V Single Supply Automotive Temperature Range: –40C to +125C 100 pA Max @ 25C Leakage Currents 85 Typ On Resistance Rail-to-Rail Operation Fast Switching Times Typical Power Consumption (<0.1 W) TTL/CMOS Compatible Inputs 14-Lead TSSOP Package APPLICATIONS Automatic Test Equipment Data Acquisition Systems Battery-Powered Instruments Communication Systems Sample and Hold Systems Remote-Powered Equipment Audio and Video Signal Routing Relay Replacement Avionics FUNCTIONAL BLOCK DIAGRAM ADG604 S1 4 S2 5 6 D S3 11 S4 10 1 OF 4 DECODER 1 14 2 A0 A1 EN GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG604 is a CMOS analog multiplexer, comprising four single channels. It operates from a dual supply of ± 2.7 V to ± 5.5 V, or from a single supply of 2.7 V to 5.5 V. 1. Ultralow Charge Injection (Q INJ: ± 1.5 pC Typ over the Full Signal Range) The ADG604 switches one of four inputs to a common output, D, as determined by the 3-bit binary address lines, A0, A1, and EN. A Logic “0” on the EN pin disables the device. 3. Dual ± 2.7 V to ± 5.5 V or Single 2.7 V to 5.5 V Supply The ADG604 offers ultralow charge injection of ±1.5 pC over the entire signal range and leakage currents of 10 pA typical at 25°C. It offers on resistance of 85 Ω typ, which is matched to within 2 Ω between channels. The ADG604 also has low power dissipation yet gives high switching speeds. The ADG604 is available in a 14-lead TSSOP package. 5. Small 14-Lead TSSOP Package 2. Leakage Current <0.5 nA max @ 85°C 4. Fully Specified to 125°C REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 ADG604–SPECIFICATIONS DUAL SUPPLY1 (VDD = +5 V 10%, VSS = –5 V 10%, GND = 0 V. All specifications –40C to +125C unless otherwise noted.) Parameter 25C –40C to +85C –40C to +125C Unit VSS to VDD V 140 160 Ω Typ Ω Max 5.5 6.5 55 60 ANALOG SWITCH Analog Signal Range On Resistance (RON) 85 115 On Resistance Match Between Channels (⌬RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) 2 4 25 40 ± 0.01 ± 0.1 ± 0.01 ± 0.1 ± 0.01 ± 0.1 Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH VDD = +4.5 V, VSS = –4.5 V VS = ± 3 V, IS = –1 mA, Test Circuit 1 VS = ± 3 V, IS = –1 mA VS = ± 3 V, IS = –1 mA VDD = +5.5 V, VSS = –5.5 V VS = ± 4.5 V, VD = ⫿4.5 V, Test Circuit 2 VS = ± 4.5 V, VD = ⫿4.5 V, Test Circuit 2 VS = VD = ± 4.5 V, Test Circuit 3 ± 0.25 ±4 ± 0.5 ±8 ± 0.5 ± 10 nA Typ nA Max nA Typ nA Max nA Typ nA Max 2.4 0.8 V Min V Max ± 0.1 µA Typ µA Max pF Typ VIN = VINL or VINH VS1 = +3 V, VS4 = –3 V, RL = 300 Ω, CL = 35 pF, Test Circuit 4 RL = 300 Ω, CL = 35 pF VS = 3 V, Test Circuit 6 RL = 300 Ω, CL = 35 pF VS = 3 V, Test Circuit 6 RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3 V, Test Circuit 5 VS = 0 V, RS = 0 Ω, CL = 1nF, Test Circuit 7 RL = 50 Ω, CL = 5 pF, f = 10 MHz, Test Circuit 8 RL = 50 Ω, CL = 5 pF, f = 10 MHz, Test Circuit 10 RL = 50 Ω, CL = 5 pF, Test Circuit 9 f = 1 MHz f = 1 MHz f = 1 MHz 0.005 CIN, Digital Input Capacitance Ω Typ Ω Max Ω Typ Ω Max Test Conditions/Comments 2 2 DYNAMIC CHARACTERISTICS Transition Time Break-Before-Make Time Delay, tBBM 70 100 80 105 30 45 20 Charge Injection Off Isolation –1 –75 ns Typ ns Max ns Typ ns Max ns Typ ns Max ns Typ ns Min pC Typ dB Typ Channel-to-Channel Crosstalk –70 dB Typ Bandwidth –3 dB CS (OFF) CD (OFF) CD, CS (ON) 280 5 17 18 MHz Typ pF Typ pF Typ pF Typ 0.001 µA Typ µA Max µA Typ µA Max tON Enable tOFF Enable 120 150 130 150 55 65 10 POWER REQUIREMENTS IDD 1.0 Iss 0.001 1.0 VDD = +5.5 V, VSS = –5.5 V Digital Inputs = 0 V or 5.5 V Digital Inputs = 0 V or 5.5 V NOTES 1 Y Version Temperature Range: –40°C to +125°C 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. –2– REV. 0 ADG604 SINGLE SUPPLY1 (V DD = 5 V 10%, VSS = 0 V, GND = 0 V. All specifications –40C to +125C unless otherwise noted.) Parameter 25C –40C to +85C –40C to +125C Unit 0 V to VDD V 350 380 Ω Typ Ω Max 12 13 Ω Typ Ω Max ANALOG SWITCH Analog Signal Range On Resistance (RON) 210 290 On Resistance Match Between Channels (⌬RON) 3 LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH ± 0.01 ± 0.1 ± 0.01 ± 0.1 ± 0.01 ± 0.1 VDD = 4.5 V, VSS = 0 V VS = 3.5 V, IS = –1 mA, Test Circuit 1 VS = 3.5 V, IS = –1 mA VDD = 5.5 V VS = 1 V/4.5 V, VD = 4.5 V/1 V, Test Circuit 2 VS = 1 V/4.5 V, VD = 4.5 V/1 V, Test Circuit 2 VS = VD = 4.5 V/1 V, Test Circuit 3 ± 0.25 ±4 ± 0.5 ±8 ± 0.5 10 nA Typ nA Max nA Typ nA Max nA Typ nA Max 2.4 0.8 V Min V Max ± 0.1 µA Typ µA Max pF Typ VIN = VINL or VINH VS1 = 3 V, VS4 = 0 V, RL = 300 Ω, CL = 35 pF, Test Circuit 4 RL = 300 Ω, CL = 35 pF VS = 3 V, Test Circuit 6 RL = 300 Ω, CL = 35 pF VS = 3 V, Test Circuit 6 RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3 V, Test Circuit 5 VS = 0 V , RS = 0 Ω, CL = 1 nF, Test Circuit 7 RL = 50 Ω, CL = 5 pF, f = 10 MHz, Test Circuit 8 RL = 50 Ω, CL = 5 pF, f = 10 MHz, Test Circuit 10 RL = 50 Ω, CL = 5 pF, Test Circuit 9 f = 1 MHz f = 1 MHz f = 1 MHz 0.005 CIN, Digital Input Capacitance Test Conditions/Comments 2 2 DYNAMIC CHARACTERISTICS Transition Time Break-Before-Make Time Delay, tBBM 90 150 105 150 45 70 30 Charge Injection 0.3 ns Typ ns Max ns Typ ns Max ns Typ ns Max ns Typ ns Min pC Typ Off Isolation –65 dB Typ Channel-to-Channel Crosstalk –70 dB Typ Bandwidth –3 dB CS (OFF) CD (OFF) CD, CS (ON) 250 5 17 18 MHz Typ pF Typ pF Typ pF Typ tON Enable tOFF Enable 185 210 190 220 80 90 10 VDD = 5.5 V Digital Inputs = 0 V or 5.5 V POWER REQUIREMENTS IDD 0.001 1.0 NOTES 1 Y Version Temperature Range: –40°C to +125°C 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. REV. 0 –3– µA Typ µA Max ADG604–SPECIFICATIONS SINGLE SUPPLY1 (VDD = 3 V 10%, VSS = 0 V, GND = 0 V. All specifications –40C to +125C unless otherwise noted.) Parameter 25C –40C to +85C ANALOG SWITCH Analog Signal Range On Resistance (RON) 380 420 On Resistance Match Between Channels (⌬RON) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH ± 0.01 ± 0.1 ± 0.01 ± 0.1 ± 0.01 ± 0.1 –40C to +125C Unit 0 V to VDD V 460 Ω Typ VDD = 2.7 V, VSS = 0 V VS = 1.5 V, IS = –1 mA, Test Circuit 1 5 Ω Typ VS = 1.5 V, IS = –1 mA VDD = 3.3 V VS = 1 V/3 V, VD = 3 V/1 V, Test Circuit 2 VS = 1 V/3 V, VD = 3 V/1 V, Test Circuit 2 VS = VD = 1 V/3 V, Test Circuit 3 ± 0.25 ±4 ± 0.5 ±8 ± 0.5 ± 10 nA Typ nA Max nA Typ nA Max nA Typ nA Max 2.0 0.8 V Min V Max ± 0.1 µA Typ µA Max pF Typ VIN = VINL or VINH VS1 = 2 V, VS4 = 0 V, RL = 300 Ω, CL = 35 pF, Test Circuit 4 RL = 300 Ω, CL = 35 pF VS = 2 V, Test Circuit 6 RL = 300 Ω, CL = 35 pF VS = 2 V, Test Circuit 6 RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 2 V, Test Circuit 5 VS = 0 V to 3.3 V, RS = 0 Ω, CL = 1 µF, Test Circuit 7 RL = 50 Ω, CL = 5 pF, f = 10 MHz, Test Circuit 8 RL = 50 Ω, CL = 5 pF, f = 10 MHz, Test Circuit 10 RL = 50 Ω, CL = 5 pF, Test Circuit 9 f = 1 MHz f = 1 MHz f = 1 MHz 0.005 CIN, Digital Input Capacitance Test Conditions/Comments 2 2 DYNAMIC CHARACTERISTICS Transition Time Break-Before-Make Time Delay, tBBM 170 320 180 250 100 160 100 Charge Injection 0.3 ns Typ ns Max ns Typ ns Max ns Typ ns Max ns Typ ns Min pC Typ Off Isolation –65 dB Typ Channel-to-Channel Crosstalk 70 dB Typ Bandwidth –3 dB CS (OFF) CD (OFF) CD, CS (ON) 250 5 17 18 MHz Typ pF Typ pF Typ pF Typ tON Enable tOFF Enable 390 450 265 390 205 225 10 VDD = 3.3 V Digital Inputs = 0 V or 3.3 V POWER REQUIREMENTS IDD 0.001 1.0 µA Typ µA Max NOTES 1 Y Version Temperature Range: –40°C to +125°C 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. –4– REV. 0 ADG604 ABSOLUTE MAXIMUM RATINGS 1 (TA = 25°C unless otherwise noted) VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6.5 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –6.5 V Analog Inputs2 . . . . . . . . . . . . . . . . VSS –0.3 V to VDD + 0.3 V Digital Inputs2 . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V or . . . . . . . . . . . . . . . . . . . . . . 30 mA, Whichever Occurs First Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA (Pulsed at 1 ms, 10% Duty Cycle Max) Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 10 mA Operating Temperature Range Automotive (Y Version) . . . . . . . . . . . . . . –40°C to +125°C Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150°C TSSOP Package JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 150°C/W JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 27°C/W Lead Temperature, Soldering (10 seconds) . . . . . . . . . 300°C IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . 220°C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at EN, A0, A1, S, or D will be clamped by internal diodes. Current should be limited to the maximum ratings given. ORDERING GUIDE Model Option Temperature Range Package Description Package ADG604YRU –40°C to +125°C Thin Shrink Small Outline (TSSOP) RU-14 PIN CONFIGURATION A0 1 14 A1 EN 2 VSS 3 Table I. Truth Table 13 GND ADG604 12 VDD TOP VIEW S1 4 (Not To Scale) 11 S3 S2 5 10 S4 D 6 9 NC NC 7 8 NC A1 A0 EN ON Switch X 0 0 1 1 X 0 1 0 1 0 1 1 1 1 None 1 2 3 4 NC = NO CONNECT CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG604 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. 0 –5– WARNING! ESD SENSITIVE DEVICE ADG604 TERMINOLOGY VDD VSS GND IDD ISS S D RON ⌬RON RFLAT(ON) IS (OFF) ID (OFF) ID, IS (ON) V D , VS VINL VINH IINL (IINH) CS (OFF) CD (OFF) CD, CS (ON) CIN tON (EN) tOFF (EN) tTRANSITION tBBM Charge Injection Crosstalk Off Isolation Bandwidth Insertion Loss Most Positive Power Supply Potential Most Negative Power Supply in a Dual Supply Application. In single supply applications, this should be tied to ground at the device. Ground (0 V) Reference Positive Supply Current Negative Supply Current Source Terminal. May be an input or output. Drain Terminal. May be an input or output. Ohmic Resistance between D and S On Resistance Match between any two channels, i.e., RON Max – RON Min Flatness is defined as the difference between the maximum and minimum value of On resistance as measured over the specified analog signal range. Source Leakage Current with the Switch “OFF” Drain Leakage Current with the Switch “OFF” Channel Leakage Current with the Switch “ON” Analog Voltage on Terminals D, S Maximum Input Voltage for Logic “0” Minimum Input Voltage for Logic “1” Input Current of the Digital Input Channel Input Capacitance for “OFF” Condition Channel Output Capacitance for “OFF” Condition “On” Switch Capacitance Digital Input Capacitance Delay time between the 50% and 90% points of the digital input and switch “ON” condition. Delay time between the 50% and 90% points of the digital input and switch “OFF” condition. Delay time between the 50% and 90% points of the digital input and switch “ON” condition when switching from one address state to another. “OFF” time or “ON” time measured between the 80% points of both switches, when switching from one address state to another. A measure of the glitch impulse transferred from the digital input to the analog output during switching. A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. A measure of unwanted signal coupling through an “On” switch. Frequency Response of the “On” Switch Loss Due to the On Resistance of the Switch –6– REV. 0 Typical Performance Characteristics–ADG604 350 250 VDD = 5V VSS = 0V TA = 25C VDD , V SS = 2.5V 300 VDD , V SS = 3V ON RESISTANCE – ON RESISTANCE – 200 VDD , V SS = 3.3V 150 100 50 VDD , V SS = 4.5V 250 TA = +125C 200 TA = +85C 150 100 TA = +25C 50 TA = –40C VDD , V SS = 5V 0 –5 –4 –3 –2 –1 0 1 2 3 4 0 0.0 5 0.5 1.0 1.5 VD, VS – V TA = 25C VSS = 0V VDD = 2.7V 450 4.0 4.5 5.0 ID (OFF) IS (OFF) 1 350 CURRENT – nA ON RESISTANCE – VDD = +5V VSS = –5V 2 400 300 VDD = 3V VDD = 3.3V 200 VDD = 4.5V 150 0 –1 ID, IS (ON) –2 –3 –4 100 VDD = 5V –5 50 –6 0.5 1.0 1.5 2.0 2.5 3.0 VD, VS – V 3.5 4.0 4.5 0 5.0 TPC 2. On Resistance vs. VD (VS), Single Supply 20 40 60 80 TEMPERATURE – C 100 120 TPC 5. Leakage Currents vs. Temperature, Dual Supply 180 160 3.5 3 500 0 0.0 2.5 3.0 VD, VS – V TPC 4. On Resistance vs. VD (VS) for Different Temperatures, Single Supply TPC 1. On Resistance vs. VD (VS), Dual Supply 250 2.0 3 VDD = +5V VSS = –5V VDD = 5V VSS = 0V 2 IS (OFF) 1 TA = +125C 120 CURRENT – nA ON RESISTANCE – 140 TA = +85C 100 80 60 0 –1 ID (OFF) –2 –3 ID, IS (ON) 40 –4 TA = –40C TA = +25C 20 0 –5 –5 –4 –3 –2 –1 0 1 VD, VS – V 2 3 4 –6 5 0 40 60 80 TEMPERATURE – C 100 120 TPC 6. Leakage Currents vs. Temperature, Single Supply TPC 3. On Resistance vs. VD (VS) for Different Temperatures, Dual Supply REV. 0 20 –7– ADG604 1.0 0 TA = 25C TA = 25C –10 –20 ATTENUATION – dB CHARGE INJECTION – pC 0.5 0 VDD = 3V VSS = 0V –0.5 VDD = +5V VSS = 0V –1.0 VDD = +5V VSS = 0V –40 –50 VDD = +5V VSS = –5V –60 –70 VDD = +5V VSS = –5V –1.5 –30 –80 –2.0 –5 –4 –3 –2 –1 0 1 2 3 4 –90 0.3 5 1 VS – V TPC 7. Charge Injection vs. Source Voltage 1000 TPC 10. Crosstalk vs. Frequency 160 0 TA = 25C 140 –2 VDD = 5V VSS = 0V 100 tON 80 VDD = +5V VSS = –5V VDD = 5V VSS = 0V 60 tOFF 40 VDD = +5V VSS = –5V –4 ATTENUATION – dB 120 TIME – ns 10 100 FREQUENCY – MHz –6 VDD = +5V VSS = 0V –8 –10 –12 –14 20 VDD = +5V VSS = –5V 0 –40 –20 0 20 40 60 80 100 –16 –18 0.3 120 TEMPERATURE – C TPC 8. tON/tOFF Times vs. Temperature 1 10 100 FREQUENCY – MHz 1000 TPC 11. On Response vs. Frequency 0 TA = 25C –10 ATTENUATION – dB –20 VDD = +5V VSS = 0V –30 –40 VDD = +5V VSS = –5V –50 –60 –70 –80 –90 0.3 1 10 100 FREQUENCY – MHz 1000 TPC 9. Off Isolation vs. Frequency –8– REV. 0 ADG604 Test Circuits IDS V1 IS (OFF) S VS D ID (OFF) S A D VDD 0.1F VS1 S1 A1 A0 VS ADDRESS DRIVE (VIN) VSS VDD S2 S3 S4 VS2 3V 50% 90% 90% tTRANSITION VOUT RL 300 EN GND 50% 0V VOUT D +2.4V tTRANSITION CL 35pF Test Circuit 4. Switching Time of Multiplexer, tTRANSITION VDD VSS 0.1F 0.1F VSS VDD VS 50 VS S1 A1 A0 S2 S3 S4 VOUT D RL 300 EN +2.4V GND ADDRESS DRIVE (VIN) 3V 0V VOUT 80% 80% CL 35pF tBBM Test Circuit 5. Break-Before-Make Delay, tBBM VDD VSS 0.1F 0.1F VDD ENABLE DRIVE (VIN) VSS S1 A1 A0 VS 50% 50% 0V V0 S4 OUTPUT 0.9V0 VOUT D 50 GND RL 300 CL 35pF tON(EN) Test Circuit 6. Enable Delay, tON (EN), tOFF (EN) REV. 0 0.9V0 0V EN VS 3V S2 S3 –9– A Test Circuit 3. On Leakage VSS 0.1F D VD Test Circuit 2. Off Leakage Test Circuit 1. On Resistance S NC VD VS RON = V1/IDS ID (ON) A tOFF(EN) ADG604 VDD VSS VOUT RS VDD VSS S D VOUT QINJ = CL VOUT VOUT VIN CL 1nF VS SW OFF SW OFF SW ON DECODER GND SW SWON ON VIN A1 A2 EN SW OFF SW OFF CHARGE INJECTION = VOUT CL Test Circuit 7. Charge Injection VDD VSS 0.1F VDD 0.1F VDD NETWORK ANALYZER VSS S 50 NETWORK ANALYZER 50 GND VSS D S2 VOUT R 50 50 VS OFF ISOLATION = 20 LOG VDD RL 50 VS RL 50 0.1F S1 VOUT D GND CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG VOUT VS Test Circuit 8. Off Isolation VDD VSS 0.1F VOUT VS Test Circuit 10. Channel-to-Channel Crosstalk VSS 0.1F 0.1F VDD VSS S NETWORK ANALYZER 50 VS D GND INSERTION LOSS = 20 LOG RL 50 VOUT VOUT WITH SWITCH VOUT WITHOUT SWITCH Test Circuit 9. Bandwidth –10– REV. 0 ADG604 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 14-Lead TSSOP Package (RU-14) 0.201 (5.10) 0.193 (4.90) 14 8 0.177 (4.50) 0.169 (4.30) 0.256 (6.50) 0.246 (6.25) 1 7 PIN 1 0.006 (0.15) 0.002 (0.05) SEATING PLANE REV. 0 0.0256 (0.65) BSC 0.0433 (1.10) MAX 0.0118 (0.30) 0.0075 (0.19) 0.0079 (0.20) 0.0035 (0.090) –11– 8 0 0.028 (0.70) 0.020 (0.50) –12– PRINTED IN U.S.A. C02752–0–2/02(0)