LMC6084 Precision CMOS Quad Operational Amplifier General Description Features (Typical unless otherwise stated) The LMC6084 is a precision quad low offset voltage operational amplifier, capable of single supply operation. Performance characteristics include ultra low input bias current, high voltage gain, rail-to-rail output swing, and an input common mode voltage range that includes ground. These features, plus its low offset voltage, make the LMC6084 ideally suited for precision circuit applications. Other applications using the LMC6084 include precision fullwave rectifiers, integrators, references, and sample-andhold circuits. This device is built with National’s advanced Double-Poly Silicon-Gate CMOS process. For designs with more critical power demands, see the LMC6064 precision quad micropower operational amplifier. For a single or dual operational amplifier with similar features, see the LMC6081 or LMC6082 respectively. Y Y Y Y Y Y Y Low offset voltage 150 mV Operates from 4.5V to 15V single supply Ultra low input bias current 10 fA Output swing to within 20 mV of supply rail, 100k load Input common-mode range includes Vb High voltage gain 130 dB Improved latchup immunity Applications Y Y Y Y Y Y Instrumentation amplifier Photodiode and infrared detector preamplifier Transducer amplifiers Medical instrumentation D/A converter Charge amplifier for piezoelectric transducers PATENT PENDING Connection Diagram 14-Pin DIP/SO TL/H/11467 – 1 Top View Ordering Information Temperature Range Package Military b 55§ C to a 125§ C 14-Pin Molded DIP LMC6084AMN 14-Pin Small Outline NSC Drawing Transport Media LMC6084AlN LMC6084lN N14A Rail LMC6084AlM LMC6084lM M14A Rail Tape and Reel Industrial b 40§ C to a 85§ C For MlL-STD-883C qualified products, please contact your local National Semiconductor Sales Office or Distributor for availability and specification information. C1995 National Semiconductor Corporation TL/H/11467 RRD-B30M75/Printed in U. S. A. LMC6084 Precision CMOS Quad Operational Amplifier November 1994 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Differential Input Voltage g Supply Voltage (V a ) a 0.3V, (Vb) b0.3V Voltage at Input/Output Pin Supply Voltage (V a b Vb) Output Short Circuit to V a Output Short Circuit to Vb Lead Temperature (Soldering, 10 Sec.) Storage Temp. Range Junction Temperature ESD Tolerance (Note 4) Current at Input Pin g 10 mA Current at Output Pin g 30 mA Current at Power Supply Pin Power Dissipation (Note 3) 40 mA Operating Ratings (Note 1) 16V (Note 11) (Note 2) 260§ C b 65§ C to a 150§ C 150§ C 2 kV Temperature Range LMC6084AM LMC6084AI, LMC6084I b 55§ C s TJ s a 125§ C b 40§ C s TJ s a 85§ C Supply Voltage Thermal Resistance (iJA) (Note 12) 14-Pin Molded DIP 14-Pin SO 4.5V s V a s 15.5V 81§ C/W 126§ C/W Power Dissipation (Note 10) DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ e 25§ C. Boldface limits apply at the temperature extremes. V a e 5V, Vb e 0V, VCM e 1.5V, VO e 2.5V and RL l 1M unless otherwise specified. Symbol Parameter Conditions Typ (Note 5) VOS Input Offset Voltage 150 TCVOS Input Offset Voltage Average Drift 1.0 IB Input Bias Current IOS LMC6084AM Limit (Note 6) LMC6084AI Limit (Note 6) LMC6084I Limit (Note 6) Units 350 1000 350 800 800 1300 mV Max mV/§ C 0.010 Input Offset Current 100 4 4 pA Max 100 2 2 pA Max 0.005 RIN Input Resistance CMRR Common Mode Rejection Ratio 0V s VCM s 12.0V V a e 15V 85 75 72 75 72 66 63 dB Min a PSRR Positive Power Supply Rejection Ratio 5V s V a s 15V VO e 2.5V 85 75 72 75 72 66 63 dB Min b PSRR Negative Power Supply Rejection Ratio 0V s Vb s b10V 94 84 81 84 81 74 71 dB Min VCM Input Common-Mode Voltage Range V a e 5V and 15V for CMRR t 60 dB b 0.4 b 0.1 b 0.1 b 0.1 0 0 0 V Max V a b 1.9 V a b 2.3 V a b 2.6 V a b 2.3 V a b 2.5 V a b 2.3 V a b 2.5 V Min Sourcing 1400 400 300 400 300 300 200 V/mV Min Sinking 350 180 70 180 100 90 60 V/mV Min Sourcing 1200 400 150 400 150 200 80 V/mV Min Sinking 150 100 35 100 50 70 35 V/mV Min AV Large Signal Voltage Gain l 10 RL e 2 kX (Note 7) RL e 600X (Note 7) 2 Tera X DC Electrical Characteristics (Continued) Unless otherwise specified, all limits guaranteed for TJ e 25§ C. Boldface limits apply at the temperature extremes. V a e 5V, Vb e 0V, VCM e 1.5V, VO e 2.5V and RL l 1M unless otherwise specified. Symbol VO Typ (Note 5) LMC6084AM Limit (Note 6) LMC6084AI Limit (Note 6) LMC6084I Limit (Note 6) Units 4.87 4.80 4.70 4.80 4.73 4.75 4.67 V Min 0.10 0.13 0.19 0.13 0.17 0.20 0.24 V Max 4.61 4.50 4.24 4.50 4.31 4.40 4.21 V Min 0.30 0.40 0.63 0.40 0.50 0.50 0.63 V Max 14.63 14.50 14.30 14.50 14.34 14.37 14.25 V Min 0.26 0.35 0.48 0.35 0.45 0.44 0.56 V Max 13.90 13.35 12.80 13.35 12.86 12.92 12.44 V Min 0.79 1.16 1.42 1.16 1.32 1.33 1.58 V Max Sourcing, VO e 0V 22 16 8 16 10 13 8 mA Min Sinking, VO e 5V 21 16 11 16 13 13 10 mA Min Sourcing, VO e 0V 30 28 18 28 22 23 18 mA Min Sinking, VO e 13V (Note 11) 34 28 19 28 22 23 18 mA Min Parameter Conditions Output Swing V a e 5V RL e 2 kX to 2.5V V a e 5V RL e 600X to 2.5V V a e 15V RL e 2 kX to 7.5V V a e 15V RL e 600X to 7.5V IO IO IS Output Current V a e 5V Output Current V a e 15V Supply Current All Four Amplifiers V a e a 5V, VO e 1.5V 1.8 3.0 3.6 3.0 3.6 3.0 3.6 mA Max All Four Amplifiers V a e a 15V, VO e 7.5V 2.2 3.4 4.0 3.4 4.0 3.4 4.0 mA Max 3 AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ e 25§ C, Boldface limits apply at the temperature extremes. V a e 5V, Vb e 0V, VCM e 1.5V, VO e 2.5V and RL l 1M unless otherwise specified. Symbol Parameter SR Slew Rate GBW Gain-Bandwidth Product wm Phase Margin Typ (Note 5) Conditions (Note 8) 1.5 LMC6084AM Limit (Note 6) LMC6084AI Limit (Note 6) LMC6084I Limit (Note 6) Units 0.8 0.5 0.8 0.6 0.8 0.6 V/ms Min 1.3 MHz 50 Deg Amp-to-Amp Isolation (Note 9) 140 dB en Input-Referred Voltage Noise F e 1 kHz 22 nV/ SHz in Input-Referred Current Noise F e 1 kHz 0.0002 pA/ SHz Total Harmonic Distortion F e 10 kHz, AV e b10 RL e 2 kX, VO e 8 VPP 0.01 % T.H.D. g 5V Supply Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Note 2: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150§ C. Output currents in excess of g 30 mA over long term may adversely affect reliability. Note 3: The maximum power dissipation is a function of TJ(Max), iJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD e (TJ(Max) b TA) /iJA. Note 4: Human body model, 1.5 kX in series with 100 pF. Note 5: Typical values represent the most likely parametric norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: V a e 15V, VCM e 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V s VO s 11.5V. For Sinking tests, 2.5V s VO s 7.5V. Note 8: V a e 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates. Note 9: Input referred V a e 15V and RL e 100 kX connected to 7.5V. Each amp excited in turm with 1 kHz to produce VO e 12 VPP. Note 10: For operating at elevated temperatures the device must be derated based on the thermal resistance iJA with PD e (TJ b TA)/iJA. All numbers apply for packages soldered directly into a PC board. Note 11: Do not connect output to V a , when V a is greater than 13V or reliability will be adversely affected. Note 12: All numbers apply for packages soldered directly into a PC board. 4 Typical Performance Characteristics VS e g 7.5V, TA e 25§ C, Unless otherwise specified Distribution of LMC6084 Input Offset Voltage (TA e a 25§ C) Distribution of LMC6084 Input Offset Voltage (TA e b55§ C) Distribution of LMC6084 Input Offset Voltage (TA e a 125§ C) Input Bias Current vs Temperature Supply Current vs Supply Voltage Input Voltage vs Output Voltage Common Mode Rejection Ratio vs Frequency Power Supply Rejection Ratio vs Frequency Input Voltage Noise vs Frequency Output Characteristics Sourcing Current Output Characteristics Sinking Current Gain and Phase Response vs Temperature (b55§ C to a 125§ C) TL/H/11467 – 2 5 Typical Performance Characteristics VS e g 7.5V, TA e 25§ C, Unless otherwise specified (Continued) Gain and Phase Response vs Capacitive Load with RL e 600X Gain and Phase Response vs Capacitive Load with RL e 500 kX Open Loop Frequency Response Inverting Small Signal Pulse Response Inverting Large Signal Pulse Response Non-Inverting Small Signal Pulse Response Non-Inverting Large Signal Pulse Response Crosstalk Rejection vs Frequency Stability vs Capacitive Load, RL e 600X Stability vs Capacitive Load RL e 1 MX TL/H/11467 – 3 6 Applications Hints Direct capacitive loading will reduce the phase margin of many op-amps. A pole in the feedback loop is created by the combination of the op-amp’s output impedance and the capacitive load. This pole induces phase lag at the unitygain crossover frequency of the amplifier resulting in either an oscillatory or underdamped pulse response. With a few external components, op amps can easily indirectly drive capacitive loads, as shown in Figure 2a . AMPLIFIER TOPOLOGY The LMC6084 incorporates a novel op-amp design topology that enables it to maintain rail-to-rail output swing even when driving a large load. Instead of relying on a push-pull unity gain output buffer stage, the output stage is taken directly from the internal integrator, which provides both low output impedance and large gain. Special feed-forward compensation design techniques are incorporated to maintain stability over a wider range of operating conditions than traditional micropower op-amps. These features make the LMC6084 both easier to design with, and provide higher speed than products typically found in this ultra-low power class. COMPENSATING FOR INPUT CAPACITANCE It is quite common to use large values of feedback resistance for amplifiers with ultra-low input current, like the LMC6084. Although the LMC6084 is highly stable over a wide range of operating conditions, certain precautions must be met to achieve the desired pulse response when a large feedback resistor is used. Large feedback resistors and even small values of input capacitance, due to transducers, photodiodes, and circuit board parasitics, reduce phase margins. When high input impedances are demanded, guarding of the LMC6084 is suggested. Guarding input lines will not only reduce leakage, but lowers stray input capacitance as well. (See Printed-Circuit-Board Layout for High Impedance Work). TL/H/11467 – 5 FIGURE 2a. LMC6084 Noninverting Gain of 10 Amplifier, Compensated to Handle Capacitive Loads The effect of input capacitance can be compensated for by adding a capacitor, Cf, around the feedback resistors (as in Figure 1 ) such that: 1 1 t 2qR1CIN 2qR2Cf or R1 CIN s R2 Cf Since it is often difficult to know the exact value of CIN, Cf can be experimentally adjusted so that the desired pulse response is achieved. Refer to the LMC660 and LMC662 for a more detailed discussion on compensating for input capacitance. In the circuit of Figure 2a , R1 and C1 serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier’s inverting input, thereby preserving phase margin in the overall feedback loop. Capacitive load driving capability is enhanced by using a pull up resistor to V a (Figure 2b) . Typically a pull up resistor conducting 500 mA or more will significantly improve capacitive load responses. The value of the pull up resistor must be determined based on the current sinking capability of the amplifier with respect to the desired output swing. Open loop gain of the amplifier can also be affected by the pull up resistor (see Electrical Characteristics). TL/H/11467 – 6 FIGURE 2b. Compensating for Large Capacitive Loads with a Pull Up Resistor PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK It is generally recognized that any circuit which must operate with less than 1000 pA of leakage current requires special layout of the PC board. When one wishes to take advantage of the ultra-low bias current of the LMC6084, typically less than 10 fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite simple. First, the user must not ignore the surface TL/H/11467 – 4 FIGURE 1. Cancelling the Effect of Input Capacitance CAPACITIVE LOAD TOLERANCE All rail-to-rail output swing operational amplifiers have voltage gain in the output stage. A compensation capacitor is normally included in this integrator stage. The frequency location of the dominant pole is affected by the resistive load on the amplifier. Capacitive load driving capability can be optimized by using an appropriate resistive load in parallel with the capacitive load (see typical curves). 7 Applications Hints (Continued) leakage of the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination, the surface leakage will be appreciable. To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LMC6084’s inputs and the terminals of capacitors, diodes, conductors, resistors, relay terminals, etc. connected to the op-amp’s inputs, as in Figure 3 . To have a significant effect, guard rings should be placed on both the top and bottom of the PC board. This PC foil must then be connected to a voltage which is at the same voltage as the amplifier inputs, since no leakage current can flow between two points at the same potential. For example, a PC board trace-to-pad resistance of 1012X, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5V bus adjacent to the pad of the input. This would cause a 100 times degradation from the LMC6084’s actual performance. However, if a guard ring is held within 5 mV of the inputs, then even a resistance of 1011X would cause only 0.05 pA of leakage current. See Figures 4a , 4b , 4c for typical connections of guard rings for standard op-amp configurations. TL/H/11467 – 8 (a) Inverting Amplifier TL/H/11467 – 9 (b) Non-Inverting Amplifier TL/H/11467 – 10 (c) Follower FIGURE 4. Typical Connections of Guard Rings The designer should be aware that when it is inappropriate to lay out a PC board for the sake of just a few circuits, there is another technique which is even better than a guard ring on a PC board: Don’t insert the amplifier’s input pin into the board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 5 . TL/H/11467–7 FIGURE 3. Example of Guard Ring in P.C. Board Layout 8 Latchup Typical Single-Supply Applications CMOS devices tend to be susceptible to latchup due to their internal parasitic SCR effects. The (I/O) input and output pins look similar to the gate of the SCR. There is a minimum current required to trigger the SCR gate lead. The LMC6084 is designed to withstand 100 mA surge current on the I/O pins. Some resistive method should be used to isolate any capacitance from supplying excess current to the I/O pins. In addition, like an SCR, there is a minimum holding current for any latchup mode. Limiting current to the supply pins will also inhibit latchup susceptibility. (V a e 5.0 VDC) The extremely high input impedance, and low power consumption, of the LMC6084 make it ideal for applications that require battery-powered instrumentation amplifiers. Examples of these types of applications are hand-held pH probes, analytic medical instruments, magnetic field detectors, gas detectors, and silicon based pressure transducers. Figure 6 shows an instrumentation amplifier that features high differential and common mode input resistance (l1014X), 0.01% gain accuracy at AV e 1000, excellent CMRR with 1 kX imbalance in bridge source resistance. Input current is less than 100 fA and offset drift is less than 2.5 mV/§ C. R2 provides a simple means of adjusting gain over a wide range without degrading CMRR. R7 is an initial trim used to maximize CMRR without using super precision matched resistors. For good CMRR over temperature, low drift resistors should be used. TL/H/11467 – 11 (Input pins are lifted out of PC board and soldered directly to components. All other pins connected to PC board). FIGURE 5. Air Wiring TL/H/11467 – 12 If R1 e R5, R3 e R6, and R4 e R7; then VOUT R a 2 R 1 R4 c e 2 VIN R2 R3 . . . AV & 100 for circuit shown (R2 e 9.822k). FIGURE 6. Instrumentation Amplifier 9 Typical Single-Supply Applications (V a e 5.0 VDC) (Continued) TL/H/11467 – 13 FIGURE 7. Low-Leakage Sample and Hold TL/H/11467 – 14 FIGURE 8. 1 Hz Square Wave Oscillator 10 Physical Dimensions inches (millimeters) 14-Pin Small Outline Package (M) Order Number LMC6084AIM or LMC6084IM NS Package Number M14A 11 LMC6084 Precision CMOS Quad Operational Amplifier Physical Dimensions inches (millimeters) (Continued) 14-Pin Molded Dual-In-Line Package (N) Order Number LMC6084AMN, LMC6084AIN or LMC6084IN NS Package Number N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 2900 Semiconductor Drive P.O. Box 58090 Santa Clara, CA 95052-8090 Tel: 1(800) 272-9959 TWX: (910) 339-9240 National Semiconductor GmbH Livry-Gargan-Str. 10 D-82256 F4urstenfeldbruck Germany Tel: (81-41) 35-0 Telex: 527649 Fax: (81-41) 35-1 National Semiconductor Japan Ltd. Sumitomo Chemical Engineering Center Bldg. 7F 1-7-1, Nakase, Mihama-Ku Chiba-City, Ciba Prefecture 261 Tel: (043) 299-2300 Fax: (043) 299-2500 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 National Semiconductores Do Brazil Ltda. Rue Deputado Lacorda Franco 120-3A Sao Paulo-SP Brazil 05418-000 Tel: (55-11) 212-5066 Telex: 391-1131931 NSBR BR Fax: (55-11) 212-1181 National Semiconductor (Australia) Pty, Ltd. Building 16 Business Park Drive Monash Business Park Nottinghill, Melbourne Victoria 3168 Australia Tel: (3) 558-9999 Fax: (3) 558-9998 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.