MUN5211DW1T1 Series Preferred Devices Dual Bias Resistor Transistors NPN Silicon Surface Mount Transistors with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the MUN5211DW1T1 series, two BRT devices are housed in the SOT–363 package which is ideal for low power surface mount applications where board space is at a premium. • • • • http://onsemi.com (3) (2) R1 Q2 R2 R1 (5) (6) 6 5 4 1 MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1 and Q2) Rating R2 Q1 (4) Simplifies Circuit Design Reduces Board Space Reduces Component Count Available in 8 mm, 7 inch/3000 Unit Tape and Reel (1) 2 3 SOT–363 CASE 419B STYLE 1 Symbol Value Unit Collector-Base Voltage VCBO 50 Vdc Collector-Emitter Voltage VCEO 50 Vdc IC 100 mAdc MARKING DIAGRAM Symbol Max Unit 7x PD 187 (Note 1.) 256 (Note 2.) 1.5 (Note 1.) 2.0 (Note 2.) mW Collector Current THERMAL CHARACTERISTICS Characteristic (One Junction Heated) Total Device Dissipation TA = 25°C Derate above 25°C Thermal Resistance – Junction-to-Ambient Characteristic (Both Junctions Heated) mW/°C RθJA 670 (Note 1.) 490 (Note 2.) °C/W Symbol Max Unit PD 250 (Note 1.) 385 (Note 2.) 2.0 (Note 1.) 3.0 (Note 2.) mW Total Device Dissipation TA = 25°C Derate above 25°C = Device Marking = (See Page 2) DEVICE MARKING INFORMATION See specific marking information in the device marking table on page 2 of this data sheet. mW/°C Thermal Resistance – Junction-to-Ambient RθJA 493 (Note 1.) 325 (Note 2.) °C/W Thermal Resistance – Junction-to-Lead RθJL 188 (Note 1.) 208 (Note 2.) °C/W TJ, Tstg –55 to +150 °C Junction and Storage Temperature 7x Preferred devices are recommended choices for future use and best overall value. 1. FR–4 @ Minimum Pad 2. FR–4 @ 1.0 x 1.0 inch Pad Semiconductor Components Industries, LLC, 2001 January, 2001 – Rev. 3 1 Publication Order Number: MUN5211DW1T1/D MUN5211DW1T1 Series DEVICE MARKING AND RESISTOR VALUES Device Package Marking R1 (K) R2 (K) Shipping MUN5211DW1T1 SOT–363 7A 10 10 3000/Tape & Reel MUN5212DW1T1 SOT–363 7B 22 22 3000/Tape & Reel MUN5213DW1T1 SOT–363 7C 47 47 3000/Tape & Reel MUN5214DW1T1 SOT–363 7D 10 47 3000/Tape & Reel MUN5215DW1T1 (Note 3.) SOT–363 7E 10 ∞ 3000/Tape & Reel MUN5216DW1T1 (Note 3.) SOT–363 7F 4.7 ∞ 3000/Tape & Reel MUN5230DW1T1 (Note 3.) SOT–363 7G 1.0 1.0 3000/Tape & Reel MUN5231DW1T1 (Note 3.) SOT–363 7H 2.2 2.2 3000/Tape & Reel MUN5232DW1T1 (Note 3.) SOT–363 7J 4.7 4.7 3000/Tape & Reel MUN5233DW1T1 (Note 3.) SOT–363 7K 4.7 47 3000/Tape & Reel MUN5234DW1T1 (Note 3.) SOT–363 7L 22 47 3000/Tape & Reel MUN5235DW1T1 (Note 3.) SOT–363 7M 2.2 47 3000/Tape & Reel MUN5236DW1T1 (Note 3.) SOT–363 7N 100 100 3000/Tape & Reel MUN5237DW1T1 (Note 3.) SOT–363 7P 47 22 3000/Tape & Reel ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted, common for Q1 and Q2) Characteristic Symbol Min Typ Max Unit Collector-Base Cutoff Current (VCB = 50 V, IE = 0) ICBO – – 100 nAdc Collector-Emitter Cutoff Current (VCE = 50 V, IB = 0) ICEO – – 500 nAdc Emitter-Base Cutoff Current (VEB = 6.0 V, IC = 0) IEBO – – – – – – – – – – – – – – – – – – – – – – – – – – – – 0.5 0.2 0.1 0.2 0.9 1.9 4.3 2.3 1.5 0.18 0.13 0.2 0.05 0.13 mAdc Collector-Base Breakdown Voltage (IC = 10 µA, IE = 0) V(BR)CBO 50 – – Vdc Collector-Emitter Breakdown Voltage (Note 4.) (IC = 2.0 mA, IB = 0) V(BR)CEO 50 – – Vdc OFF CHARACTERISTICS MUN5211DW1T1 MUN5212DW1T1 MUN5213DW1T1 MUN5214DW1T1 MUN5215DW1T1 MUN5216DW1T1 MUN5230DW1T1 MUN5231DW1T1 MUN5232DW1T1 MUN5233DW1T1 MUN5234DW1T1 MUN5235DW1T1 MUN5236DW1T1 MUN5237DW1T1 3. New resistor combinations. Updated curves to follow in subsequent data sheets. 4. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0% http://onsemi.com 2 MUN5211DW1T1 Series ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted, common for Q1 and Q2) (Continued) Characteristic Symbol Min Typ Max hFE 35 60 80 80 160 160 3.0 8.0 15 80 80 80 80 80 60 100 140 140 350 350 5.0 15 30 200 150 140 150 140 – – – – – – – – – – – – – – VCE(sat) – – 0.25 – – – – – – – – – – – – – – – – – – – – – – – – – – – – 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 4.9 – – Unit ON CHARACTERISTICS (Note 5.) DC Current Gain (VCE = 10 V, IC = 5.0 mA) MUN5211DW1T1 MUN5212DW1T1 MUN5213DW1T1 MUN5214DW1T1 MUN5215DW1T1 MUN5216DW1T1 MUN5230DW1T1 MUN5231DW1T1 MUN5232DW1T1 MUN5233DW1T1 MUN5234DW1T1 MUN5235DW1T1 MUN5236DW1T1 MUN5237DW1T1 Collector-Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA) (IC = 10 mA, IB = 5 mA) MUN5230DW1T1/MUN5231DW1T1 (IC = 10 mA, IB = 1 mA) MUN5215DW1T1/MUN5216DW1T1 MUN5232DW1T1/MUN5233DW1T1/MUN5234DW1T1 Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kΩ) (VCC = 5.0 V, VB = 3.5 V, RL = 1.0 kΩ) (VCC = 5.0 V, VB = 5.5 V, RL = 1.0 kΩ) (VCC = 5.0 V, VB = 4.0 V, RL = 1.0 kΩ) Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kΩ) (VCC = 5.0 V, VB = 0.050 V, RL = 1.0 kΩ) (VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kΩ) VOL MUN5211DW1T1 MUN5212DW1T1 MUN5214DW1T1 MUN5215DW1T1 MUN5216DW1T1 MUN5230DW1T1 MUN5231DW1T1 MUN5232DW1T1 MUN5233DW1T1 MUN5234DW1T1 MUN5235DW1T1 MUN5213DW1T1 MUN5236DW1T1 MUN5237DW1T1 VOH MUN5230DW1T1 MUN5215DW1T1 MUN5216DW1T1 MUN5233DW1T1 5. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0% http://onsemi.com 3 Vdc Vdc Vdc MUN5211DW1T1 Series ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted, common for Q1 and Q2) (Continued) Characteristic Symbol Min Typ Max Unit R1 7.0 15.4 32.9 7.0 7.0 3.3 0.7 1.5 3.3 3.3 15.4 1.54 70 32.9 10 22 47 10 10 4.7 1.0 2.2 4.7 4.7 22 2.2 100 47 13 28.6 61.1 13 13 6.1 1.3 2.9 6.1 6.1 28.6 2.86 130 61.1 kΩ 0.8 0.17 – 0.8 0.055 0.38 0.038 1.7 1.0 0.21 – 1.0 0.1 0.47 0.047 2.1 1.2 0.25 – 1.2 0.185 0.56 0.056 2.6 ON CHARACTERISTICS (Note 6.) (Continued) Input Resistor MUN5211DW1T1 MUN5212DW1T1 MUN5213DW1T1 MUN5214DW1T1 MUN5215DW1T1 MUN5216DW1T1 MUN5230DW1T1 MUN5231DW1T1 MUN5232DW1T1 MUN5233DW1T1 MUN5234DW1T1 MUN5235DW1T1 MUN5236DW1T1 MUN5237DW1T1 Resistor Ratio MUN5211DW1T1/MUN5212DW1T1/ MUN5213DW1T1/MUN5236DW1T1 MUN5214DW1T1 MUN5215DW1T1/MUN5216DW1T1 MUN5230DW1T1/MUN5231DW1T1/MUN5232DW1T1 MUN5233DW1T1 MUN5234DW1T1 MUN5235DW1T1 MUN5237DW1T1 R1/R2 6. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0% PD, POWER DISSIPATION (mW) 300 250 200 150 100 50 0 –50 RθJA = 833°C/W 0 50 100 TA, AMBIENT TEMPERATURE (°C) Figure 1. Derating Curve http://onsemi.com 4 150 MUN5211DW1T1 Series 1 1000 IC/IB = 10 hFE , DC CURRENT GAIN (NORMALIZED) VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) TYPICAL ELECTRICAL CHARACTERISTICS — MUN5211DW1T1 TA=-25°C 25°C 0.1 75°C 0 20 40 IC, COLLECTOR CURRENT (mA) TA=75°C 25°C -25°C 100 0.01 0.001 VCE = 10 V 10 50 1 10 IC, COLLECTOR CURRENT (mA) Figure 2. VCE(sat) versus IC Figure 3. DC Current Gain 100 IC, COLLECTOR CURRENT (mA) 2 1 0 0 10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS) 25°C 75°C f = 1 MHz IE = 0 V TA = 25°C 1 0.1 0.01 0.001 50 TA=-25°C 10 VO = 5 V 0 1 2 3 4 5 6 7 Vin, INPUT VOLTAGE (VOLTS) 10 VO = 0.2 V TA=-25°C 25°C 75°C 1 0.1 0 10 8 9 Figure 5. Output Current versus Input Voltage Figure 4. Output Capacitance V in , INPUT VOLTAGE (VOLTS) Cob , CAPACITANCE (pF) 4 3 100 20 30 IC, COLLECTOR CURRENT (mA) 40 Figure 6. Input Voltage versus Output Current http://onsemi.com 5 50 10 MUN5211DW1T1 Series 1000 1 hFE, DC CURRENT GAIN (NORMALIZED) VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) TYPICAL ELECTRICAL CHARACTERISTICS — MUN5212DW1T1 IC/IB = 10 25°C TA=-25°C 0.1 75°C 0.01 0.001 0 20 -25°C 100 1 100 10 IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA) Figure 7. VCE(sat) versus IC Figure 8. DC Current Gain 4 100 3 IC, COLLECTOR CURRENT (mA) f = 1 MHz IE = 0 V TA = 25°C 2 1 75°C 25°C TA=-25°C 10 1 0.1 0.01 VO = 5 V 0 0 0.001 50 10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS) Figure 9. Output Capacitance 0 2 4 6 Vin, INPUT VOLTAGE (VOLTS) VO = 0.2 V TA=-25°C 10 25°C 75°C 1 0.1 0 10 8 10 Figure 10. Output Current versus Input Voltage 100 V in , INPUT VOLTAGE (VOLTS) Cob , CAPACITANCE (pF) TA=75°C 25°C 10 50 40 VCE = 10 V 20 30 40 50 IC, COLLECTOR CURRENT (mA) Figure 11. Input Voltage versus Output Current http://onsemi.com 6 MUN5211DW1T1 Series 10 1000 IC/IB = 10 1 25°C TA=-25°C 0.01 0 25°C -25°C 10 50 20 40 IC, COLLECTOR CURRENT (mA) TA=75°C 100 75°C 0.1 VCE = 10 V hFE , DC CURRENT GAIN (NORMALIZED) VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) TYPICAL ELECTRICAL CHARACTERISTICS — MUN5213DW1T1 10 IC, COLLECTOR CURRENT (mA) 1 Figure 12. VCE(sat) versus IC 1 100 IC, COLLECTOR CURRENT (mA) 0.4 TA=-25°C 10 1 0.1 0.01 0.2 0 25°C 75°C 0.6 0 0.001 50 10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS) VO = 5 V 0 2 4 6 Vin, INPUT VOLTAGE (VOLTS) 100 VO = 0.2 V TA=-25°C 10 25°C 75°C 1 0.1 0 10 8 10 Figure 15. Output Current versus Input Voltage Figure 14. Output Capacitance V in , INPUT VOLTAGE (VOLTS) Cob , CAPACITANCE (pF) Figure 13. DC Current Gain f = 1 MHz IE = 0 V TA = 25°C 0.8 100 20 30 40 50 IC, COLLECTOR CURRENT (mA) Figure 16. Input Voltage versus Output Current http://onsemi.com 7 MUN5211DW1T1 Series 1 300 IC/IB = 10 hFE, DC CURRENT GAIN (NORMALIZED) VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) TYPICAL ELECTRICAL CHARACTERISTICS — MUN5214DW1T1 TA=-25°C 25°C 0.1 75°C 0.01 0.001 0 20 40 60 IC, COLLECTOR CURRENT (mA) TA=75°C VCE = 10 250 25°C 200 -25°C 150 100 50 0 80 2 1 4 6 Figure 17. VCE(sat) versus IC 100 f = 1 MHz lE = 0 V TA = 25°C 3 TA=75°C IC, COLLECTOR CURRENT (mA) 3.5 2.5 2 1.5 1 0.5 0 2 4 6 8 10 15 20 25 30 35 VR, REVERSE BIAS VOLTAGE (VOLTS) 40 45 10 VO = 5 V 1 50 25°C -25°C 0 Figure 19. Output Capacitance 2 4 6 Vin, INPUT VOLTAGE (VOLTS) VO = 0.2 V TA=-25°C 25°C 75°C 1 0.1 0 10 8 Figure 20. Output Current versus Input Voltage 10 V in , INPUT VOLTAGE (VOLTS) Cob , CAPACITANCE (pF) 90 100 Figure 18. DC Current Gain 4 0 8 10 15 20 40 50 60 70 80 IC, COLLECTOR CURRENT (mA) 20 30 IC, COLLECTOR CURRENT (mA) 40 Figure 21. Input Voltage versus Output Current http://onsemi.com 8 50 10 MUN5211DW1T1 Series INFORMATION FOR USING THE SOT–363 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINTS FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. SOT–363 ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ 0.65 mm 0.65 mm 0.4 mm (min) 0.5 mm (min) 1.9 mm SOT–363 POWER DISSIPATION one can calculate the power dissipation of the device which in this case is 256 milliwatts. The power dissipation of the SOT–363 is a function of the pad size. This can vary from the minimum pad size for soldering to the pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient; and the operating temperature, TA. Using the values provided on the data sheet, PD can be calculated as follows: PD = PD = 150°C – 25°C = 256 milliwatts 490°C/W The 490°C/W for the SOT–363 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 256 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–363 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. TJ(max) – TA RθJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, SOLDERING PRECAUTIONS • The soldering temperature and time should not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient should be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference should be a maximum of 10°C. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. http://onsemi.com 9 MUN5211DW1T1 Series SOLDER STENCIL GUIDELINES or stainless steel with a typical thickness of 0.008 inches. The stencil opening size for the surface mounted package should be the same as the pad size on the printed circuit board, i.e., a 1:1 registration. Prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. A solder stencil is required to screen the optimum amount of solder paste onto the footprint. The stencil is made of brass TYPICAL SOLDER HEATING PROFILE The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between 177–189°C. When this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. The components on the board are then heated by conduction. The circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. Because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints. For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones, and a figure for belt speed. Taken together, these control settings make up a heating “profile” for that particular circuit board. On machines controlled by a computer, the computer remembers these profiles from one operating session to the next. Figure 22 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. This profile will vary among soldering systems but it is a good starting point. Factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. This profile shows temperature versus time. STEP 1 PREHEAT ZONE 1 RAMP" 200°C 150°C STEP 2 STEP 3 VENT HEATING SOAK" ZONES 2 & 5 RAMP" DESIRED CURVE FOR HIGH MASS ASSEMBLIES STEP 5 STEP 4 HEATING HEATING ZONES 3 & 6 ZONES 4 & 7 SPIKE" SOAK" 205° TO 219°C PEAK AT SOLDER JOINT 170°C 160°C 150°C 140°C 100°C 100°C 50°C STEP 6 STEP 7 VENT COOLING SOLDER IS LIQUID FOR 40 TO 80 SECONDS (DEPENDING ON MASS OF ASSEMBLY) DESIRED CURVE FOR LOW MASS ASSEMBLIES TMAX TIME (3 TO 7 MINUTES TOTAL) Figure 22. Typical Solder Heating Profile http://onsemi.com 10 MUN5211DW1T1 Series PACKAGE DIMENSIONS SOT–363 CASE 419B–01 ISSUE G A G V 6 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 4 –B– S 1 2 DIM A B C D G H J K N S V 3 D 6 PL 0.2 (0.008) M B M N J C H K http://onsemi.com 11 INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 0.012 0.016 STYLE 1: PIN 1. 2. 3. 4. 5. 6. EMITTER 2 BASE 2 COLLECTOR 1 EMITTER 1 BASE 1 COLLECTOR 2 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 0.30 0.40 MUN5211DW1T1 Series Thermal Clad is a trademark of the Bergquist Company ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: [email protected] Fax Response Line: 303–675–2167 or 800–344–3810 Toll Free USA/Canada N. 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