SFH6700/6719 SFH6701/6711 SFH6702/6712 SFH6705 ] Low Input Current Logic Gate Optocoupler Preliminary Data Sheet FEATURES • Data Rate 5 MBits/s (2.5 MBit/s over Temperature) • Buffer • Isolation Test Voltage, 2500 VACRMS for 1 min. • TTL, LSTTL and CMOS Compatible • Internal Shield for Very High Common Mode Transient Immunity • Wide Supply Voltage Range (4.5 to 15 V) • Low Input Current (1.6 mA to 5 mA) • Three State Output (SFH6700/19) • Totem Pole Output (SFH6701/02/11/12) • Open Collector Output (SFH6705) • Specified from 0°C to 85°C APPLICATIONS • Industrial Control • Replace Pulse Transformers • Routine Logic Interfacing • Motion/Power Control • High Speed Line Receiver • Microprocessor System Interfaces • Computer Peripheral Interfaces Dimensions in Inches (mm) pin one ID 4 3 2 1 5 6 7 8 .255 (6.48) .268 (6.81) .379 (9.63) .390 (9.91) .030 (0.76) .045 (1.14) 4° typ. .300 (7.62) typ. .031 (0.79) .130 (3.30) .150 (3.81) .050 (1.27) 10° .020 (.51 ) .035 (.89 ) .018 (.46) .022 (.56) 3°–9° .008 (.20) .012 (.30) .100 (2.54) typ. SFH6700/6719 SFH6701/6711 8 VCC NC 1 NC 1 7 VO Anode 2 7 VO Cathode 3 6 VE Cathode 3 6 NC 5 GND NC 4 The SFH67xx uses an industry standard DIP8 package. With standard lead bending, creepage distance and clearance of ≥7 mm with lead bending options 6, 7, and 9 ≥8 mm are achieved. Truth Table SFH6701/11/02/12/05 (Positive Logic) IR Diode Output on H off L 8 VCC Anode 2 DESCRIPTION The SFH67xx high speed optocoupler series consists of a GaAlAs infrared emitting diode, optically coupled with an integrated photodetector. The detector incorporates a Schmitt-Trigger stage for improved noise immunity. Using the Enable input, the output can be switched to the high ohmic state, which is necessary for data bus applications. A Faraday shield provides a common mode transient immunity of1000 V/µs at VCM=50 V for SFH6700/01/02/05 and 2500 V/µs at VCM=400 V for SFH6711/12/19. .230(5.84) .110 (2.79) .250(6.35) .130 (3.30) SFH6702/6712/6705 NC 1 8 VCC Anode 2 7 NC Cathode 3 6 VO 5 GND NC 4 Truth Table SFH6700/19 (Positive Logic) IR Diode Enable Output on H Z off H Z on L H off L L 5–263 NC 4 5 GND Maximum Ratings Figure 1. Schematics Parameter Sym. Min. Max. Units ICC Emitter Reverse Voltage VR 3 V DC Forward Current IF 10 mA Surge Forward Current (tp≤1 µs, 300 pulses/s) IFSM 1 A Total Power Dissipation Ptot 20 mW (2) IO IE K (3) Detector Supply Voltage VCC –0.5 15 V VEN –0.5 15 V Output Voltage VO –0.5 15 V Average Output Current IO 25 mA Total Power Dissipation Ptot 100 mW SFH6700/19 ICC Package Storage Temperature Range TSTG –55 125 °C Ambient Temperature Range TA –40 85 °C Lead Soldering Temperature (t=10 sec.) TS 260 °C Isolation Test Voltage (t=1 min.) VISO 2500 7 Options 6, 7, 9 8 Comparative Tracking Index per DIN IEC112/ VDE 0303, part 1 Isolation Resistance A (2) IO VO (7) K (3) VIO=500 V, TA=25°C RISO VIO=500 V, TA=100°C SFH6701/11 mm 175 GND (5) Shield 2 Standard Lead Bending VCC (8) IF VACRMS Pollution Degree 400 Ω 1012 ICC 1011 VCC (8) IF A (2) Recommended Operating Conditions A 0.1 µF bypass capacitor connected between pins 5 and 8 must be used. Parameter Symbol Min. Max. Unit Supply Volage VCC 4.5 15 V Enable Voltage High (SFH6700/19) VEH 2.0 15 V Enable Voltage Low (SFH6700/19) VEL 0 0.8 V Forward Input Current IFon 1.6(1) 5 mA Forward Input Current IFoff – 0.1 mA Operating Temperature TA 0 85 °C Output Pull-up Resistor (SFH6705 only) RL 350 4k Ω Fan Out (SFH6705 at RL=1 KΩ) N IO VO (6) K (3) GND (5) Shield SFH6702/12 ICC VCC (8) IF A IO (2) 16 VO (7) VEN (6) GND (5) Shield Three State Enable Voltage (SFH6700/19 only) Creepage Distance and Clearance VCC (8) IF A LS TTL Loads 1. We recommend using a 2.2 mA to permit at least 20% CTR degradation guard band. VO (6) K (3) GND (5) Shield SFH6705 5–264 SFH6700/6701/6702/6719/6711/6712/6705 Characteristics 0°C≤ TA≤85°C; 4.5 V≤VCC≤15 V; 1.6 mA≤IFon≤5 mA; 2.0≤VEH≤15 V; 0≤ VEL≤0.8 V; 0 mA≤IFoff≤0.1 mA Typical values: TA=25°C; VCC=5 V; IFon=3 mA unless otherwise specified Parameter Sym. Min. Typ. Max. Unit Test Condition 1.75 V IF=5 mA, TA=25°C Emitter Forward Voltage VF 1.6 Input Current Hysteresis IHYS 0.1 Reverse Current IR 0.5 Capacitance C0 Thermal Resistance RthJA 1.8 V IF=5 mA mA VCC=5 V, IHYS=IFon–IFoff µA VR=3 V, TA=25°C 60 pF VR=0 V, f=1 MHz, TA=25°C 700 K/W 10 Detector Logic Low Output Voltage VOL 0.5 Logic High Output Voltage (except SFH6705) VOH Output Leakage Current (VOUT>VCC) (except SFH6705) IOHH Output Leakage Current (SFH6705 only) IOHH Logic High Enable Voltage (SFH6700/19 only) VEH 2.4 * V IOL=6.4 mA V IOH=–2.6 mA, *VOH=VCC–1.8 V 0.5 100 µA VO=5.5 V, VCC=4.5 V, IF=5 mA 1 500 µA VO=15 V, VCC=4.5 V, IF=5 mA 0.5 100 µA VO=5.5 V, VCC=5.5 V, IF=5 mA 1 500 µA VO=15 V, VCC=15 V, IF=5 mA 2.0 V Logic Low Enable Voltage (SFH6700/19 only) VEL 0.8 V Logic High Enable Current (SFH6700/19 only) IEH 20 µA VEN=2.7 V 100 µA VEN=5.5 V 250 µA VEN=15 V µA VEN=0.4 V µA VO=0.4 V, VEN=2.0 V, IF=5 mA 20 µA VO=2.4 V, VEN=2.0 V, IF=0 0.00 1 Logic Low Enable Current (SFH6700/19 only) IEL –320 High Impedance State Output Current (SFH6700/19 only) IOZL –20 –50 IOZH 100 µA VO=5.5 V, VEN=2.0 V, IF=0 0.00 1 500 µA VO=15 V, VEN=2.0 V, IF=0 6.0 mA VCC=5.5 V, IF=0 Logic Low Supply Current ICCL 3.7 4.1 6.5 mA VCC=15 V, IF=0 Logic High Supply Current ICCH 3.4 4.0 mA VCC=5.5 V, IF=5 mA 3.7 5.0 mA VCC=15 V, IF=5 mA 25 mA VO=VCC=5.5 V, IF=0 40 mA VO=VCC=15 V, IF=0 –10 mA VCC=5.5 V, Vo=0 V , IF=5 mA –25 mA VCC=15 V, Vo=0 V, IF=5 mA Logic Low Short Circuit Output Current (2) IOSL Logic High Short Circuit Output Current (except SFH6705) IOSH(2) Thermal Resistance RthJA 300 K/W 0.6 Package Coupling Capacitance Isolation Resistance pF f=1 MHz, pins 1–4 and 5–8 shorted together 12 Ω VIO=500 V, TA=25°C 11 Ω VIO=500 V, TA=100°C CIO RISO 10 10 2. Output short circuit time ≤10 ms. 5–265 SFH6700/6701/6702/6719/6711/6712/6705 Switching Times (3) 0°C≤ TA≤85°C; 4.5 V≤VCC≤15 V; 1.6 mA≤IFon≤5 mA; 2.0≤VEH≤15 V (SFH6700/19); 0≤ VEL≤0.8 V (SFH6700/19); 0 mA≤IFoff≤0.1 mA Typical values: TA=25°C; VCC=5 V; IFon=3 mA unless otherwise specified Parameter, SFH6700/01/02/11/12/19 Symbol Propagation Delay Time to Logic Low Output Level tPHL Min. Typ. Max. 120 115 Propagation Delay Time to Logic Low Output Level Test Condition Without Peaking Capacitor 300 125 tPLH Unit ns With Peaking Capacitor ns 90 Without Peaking Capacitor 300 With Peaking Capacitor Output Enable Time to Logic High (SFH6700/19) tPZH 20 ns Output Enable Time to Logic Low (SFH6700/19) tPZL 25 ns Output Disable Time from Logic High (SFH6700/19) tPHZ 50 ns Output Disable Time from Logic Low (SFH6700/19) tPLZ 50 ns Output Rise Time tr 40 ns 10% to 90% Output Fall Time tf 10 ns 90% to 10% Unit Test Condition ns Without Peaking Capacitor Switching Times (3) Typical values: TA=25°C, VCC=5 V; IFon=3 mA, RL=390 Ω, unless otherwise specified Parameter, SFH6705 Symbol Propagation Delay Time to Logic Low Output Level tPHL Min. Typ. Max. 115 105 300 With Peaking Capacitor Propagation Delay Time to Logic Low Output Level tPLH 125 ns Output Rise Time tr 25 ns 10% to 90% Output Fall Time tf 4 ns 90% to 10% 90 Without Peaking Capacitor 300 With Peaking Capacitor Common Mode Transient Immunity TA=25°C, VCC=5 V(4) Parameter Device Logic High Common Mode Transient Immunity Symbol SFH6700/01/02/05 |(4) | CMH SFH6711/12/19 Logic Low Common Mode Transient Immunity SFH6700/01/02/05 | CML |(4) SFH6711/12/19 Min. Unit Test Condition 1000 V/µs | VCM |=50 V, IF=1.6 mA 2500 V/µs | VCM |=400 V, IF=1.6 mA 1000 V/µs | VCM |=50 V, IF=0 2500 V/µs | VCM |=400 V, IF=0 3. A 0.1 µF bypass capacitor connected between pins 5 and 8 must be used. 4. CMH is the maximum slew rate of a common mode voltage VCM at which the output voltage remains at logic high level (VO>2 V). CML is the maximum slew rate of a common mode voltage VCM at which the output voltage remains at logic low level (VO<0.8 V). 150 Figure 3. Typical iput diode forward current vs. forward voltage 10.000 120 Detector 100 75 50 Emitter 25 0 –60 IF - Forward Current - mA Ptot - Power dissipation - mW Figure 2. Permissible total power disipation vs. temperature –40 –20 0 20 40 60 80 TA =25°C 1.000 0.100 0.010 100 1.3 TA - Temperature-°C 1.4 1.5 1.6 1.7 V F - Forward Voltage 5–266 SFH6700/6701/6702/6719/6711/6712/6705 Figure 4. Typical forward input voltage vs. temperature Figure 8. Typical output leakage current vs. temperature 1.75 IOHH - Output Leakage Current - nA IF=5mA VF - Forward Voltage - V 1.70 1.65 1.60 1.55 1.50 -40 -20 0 20 40 TA - Temperature - °C 60 80 40 IOL - Low Level Output Current - mA Vo - Output Voltage - V Vcc = 4.5 V TA = 25 °C 3 I OH = -2.6 mA 2 1 I OL = 6.4 mA 0 0.0 0.1 VCC = 5 V IF = 0 mA 38 35 33 VOL=0.8V 30 28 VOL=0.6V 25 23 VOL=0.4V 20 -60 0.2 0.3 0.4 0.5 0.6 0.7 0.8 IF - Input Current - mA 0.9 -40 -20 1.0 0 20 40 60 TA - Temperature - °C 80 100 Figure 10. Typical low level output voltage vs. temperature Figure 6. Typical output forward voltage vs. forward input current (only SFH6705) 0.30 6 TA = 25 °C VCC = 5 V 5 VOL - Low Level Output Voltage - V VO - Output Voltage - V 80 100 Figure 9. Typical low level output current vs. temperature 7 5 4 3 2 VCC =VO=5.5V 100 Figure 5. Typical output voltage vs. forward input current (except SFH6705) 4 VCC =VO=15V -60 -40 -20 0 20 40 60 TA - Temperature - °C 1.45 -60 RL = 1k - 4kΩ RL = 390Ω 1 Vcc = 5 V IF = 0 mA 0.25 0.20 IO=16mA 0.15 IO=12.8mA IO=9.6mA 0.10 IO=6.4mA 0.05 -60 0 0.0 0.2 0.4 0.6 0.8 IF - Forward Input Current - mA -40 1.0 -20 0 20 40 TA - Temperature - °C 60 80 100 Figure 11. Typical high level output current vs. temperature (except SFH6705) Figure 7. Typical supply current vs. 5 temperature 0 4.2 IOH - High Level Output Current - mA IC C - Supply Current - mA 1100 1000 900 800 700 600 500 400 ICCL @ VCC=15V 4.0 ICCH @ VCC=15V & ICCL @ VCC=5.5V 3.8 3.6 ICCH @ VCC=5.5V 3.4 3.2 -60 -40 -20 0 20 40 TA - Temperature - °C 60 80 -1 -2 VCC = 4.5 V IF = 5 mA VOH = 2.7V -3 -4 -5 VOH = 2.4V -6 -7 -8 100 -60 5–267 -40 -20 0 20 40 TA - Temperature - °C 60 80 100 SFH6700/6701/6702/6719/6711/6712/6705 Figure 16. Typical propagation delays to logic low vs. temperature 170 60 54 48 42 36 30 24 18 12 6 0 -60 t pHL - Propagation Delay - ns tR, tF - Rise, Fall Time - ns Figure 12. Typical rise, fall time vs. temperature (except SFH6705) VCC = 5 V CL = 15 pF tR tF -40 -20 0 20 40 60 TA - Temperature - °C 80 100 tpLH - Propagation Delay - ns tpLH - Propagation Delay - ns IF=1.6 mA 130 IF=3 mA 110 IF=5 mA 90 -40 -20 0 20 40 T A - Temperature - °C 60 80 IF=1.6mA 70 50 -60 -40 -20 0 20 40 60 80 100 120 Vcc=15 IF=1.6 mA C1=15 pF (without peaking capacitor) 110 100 IF=3 mA 90 80 IF =5 mA 70 60 50 -60 -40 -20 0 20 40 60 T A - Temperature - °C 80 100 Figure 18. Typical propagation delays to logic low vs. temperature 170 180 160 tpHL - Propagation Delay - ns Vcc = 5 V C1 = 15 pF (Without Peaking Capacitor) 140 IF = 5mA 120 IF = 3mA 100 IF = 1.6mA 80 60 -60 -40 -20 0 20 40 TA - Temperature - °C 60 80 Figure 15. Typical propagation delays to logic high vs. temperature (except SFH6705) Vcc=5 V C1=120 pF (with peaking capacitor) 80 I F=1.6, 3 and 5 mA 70 60 50 -60 -40 -20 0 20 40 60 80 C1 = 15 pF (Without Peaking Capacitor) 130 IF = 5mA 110 IF = 3mA 90 IF = 1.6mA 70 50 -40 -20 0 20 40 60 TA - Temperature - °C 80 100 Figure 19. Typical propagation delays to logic high vs. temperature 100 90 Vcc = 15 V 150 -60 100 t pLH - Propagation Delay - ns tpHL - Propagation Delay - ns IF=5mA 90 100 Figure 14. Typical propagation delays to logic low vs. temperature (except SFH6705) tpLH - Propagation Delay - ns IF=3mA 110 Figure 17. Typical propagation delays to logic high vs. temperature 150 70 -60 C1=120 pF (with Peaking Capacitor) 130 T A - Temperature - °C Figure 13. Typical propagation delays to logic high vs. temperature (except SFH6705) Vcc=5 V C=15 pF (without peaking capacitor) VCC 5 V 150 100 T A - Temperature - °C 80 70 Vcc=15 V C1=120 pF (with peaking capacitor) 60 50 IF=1.6,3 and 5 mA 40 30 -60 -40 -20 0 20 40 60 80 100 TA - Temperature - °C 5–268 SFH6700/6701/6702/6719/6711/6712/6705 Figure 20. Typical propagation delays to logic low vs. temperature (except SFH6705) Figure 24. Typical propagation delays to high level vs. temperature (only SFH 6705) tpLH - Propagation Delay - ns tpHL - Propagation Delay - ns 180 VCC = 15 V C1=120 pF (Peaking Capacitor is used) 160 140 120 IF = 5mA IF = 3mA 100 80 IF = 1.6mA 60 -60 -40 -20 0 20 40 TA - Temperature - °C 60 80 180 160 RL=4kΩ 140 RL=1kΩ 120 100 RL=350Ω 80 -60 -40 -20 0 20 40 TA - Temperature - °C 60 80 100 Figure 25. Typical progagation delays to low level vs. temperature (only SFH 6705) 80 150 tpHL - Propagation Delay - ns CL = 15 pF 70 tp - Enable Propagation Delay - ns VCC = 5 V IF = 3 mA 200 100 Figure 21. Typical logic low enable propagation delays vs. temperature (only SFH6700/11) VCC= 15 V 60 50 tPLZ 40 VCC= 4.5 V 30 20 tPZL VCC = 4.5 –15 V 10 0 -60 -40 -20 0 20 40 60 TA - Temperature - °C 80 100 Figure 22. Typical logic high enable propagation delays vs. temperature (only SFH6700/11) IF=5mA 120 110 IF=3mA 100 IF=1.6mA 90 80 70 -40 -20 0 20 40 TA - Temperature - °C 60 80 100 80 100 250 125 CL = 15 pF 60 VCC=4.5V 50 tPHZ 40 30 tPZH VCC= 4.5 –15V 20 10 0 -60 130 Figure 26. Typical rise, fall time vs. temperature (only SFH6705) tR, tF - Rise, Fall Time - ns 70 VCC = 5 V RL = 350 - 4kΩ 140 -60 80 tp - Enable Propagation Delay - ns 220 VCC=15V -40 -20 tPHZ 0 20 40 60 TA - Temperature - °C 80 VCC = 5V 225 100 75 200 tR @ RL=1kΩ 50 tR @ RL=350Ω 25 0 -25 -60 100 tR @ RL=4kΩ tF @ RL=350-4kΩ -40 -20 0 20 40 TA - Temperature - °C 60 Figure 23. Typical propagation delays vs. pulse Input current (only SFH6705) tP- Propagation Delay - ns 250 VCC = 5 V TA = 25 °C 200 tPLH @ RL=4kΩ 150 tPLH @ RL=1kΩ tPHL @ RL=350-4kΩ 100 tPLH @ RL=350Ω 50 1 3 5 7 9 IF - Pulse Input Current - mA 11 5–269 SFH6700/6701/6702/6719/6711/6712/6705 Figure 27. Test circuit for tPLH, tPHL, tr and tf—SFH6700/01/02/11/12/19 5V VCC R3=619 Ohm Pulse Generator tr = tf = 5ns f=100kHz 10% Duty cycle Output Vo IF 2 Input IF Monitoring Node Monitoring Node VCC 8 Out* 7 1 3 En* 4 Gnd D1 0.1 µF Bypass 6 D2 D3 5 D4 R1 C1=120pF C2=15pF R1 IF (ON) 2.15 kOhm 1.1 kOhm 681 Ohm 1.6 mA 3 mA 5 mA R2=5kOhm All diodes are 1N916 or 1N3064 The Probe and Jig Capacitances are included in C1 and C2 * SFH6701/02/11/12 without VEN * SFH6702/12 Pin 6 VOUT and Pin 7 n.c. IFon 50% IFon 0mA Input IF VOH Output VO 1.3V VOL tPHL tPLH Figure 28. Test circuit for tPLH, tPHL, tr and tf—SFH6705 VCC Pulse Generator tr = tf = 5ns Zo = 50 Ohm Input IF Monitoring Node RL IF 1 VCC 8 2 n.c. 7 VOUT 6 3 4 R1 5V Gnd 5 0.1µF Bypass Output VO Monitoring Node C2=15pF C1=120pF The Probe and Jig Capacitances are included in C1 and C2 R1 IF (ON) 2.15 kOhm 1.1 kOhm 681 Ohm 1.6 mA 3 mA 5 mA IFon 50% IFon 0mA Input IF VOH Output VO 1.5V VOL tPLH tPHL 5–270 SFH6700/6701/6702/6719/6711/6712/6705 Figure 29. Test circuit for tPHZ, tPZH, tPLZ and tPZL–SFH6700/19 IF Input VC Monitoring Node 5V VCC Pulse Generator ZO = 50 Ohm tr = tf = 5 ns 1 VCC 8 Out 2 7 3 6 En 4 Output VO S1 Monitoring Node 619 Ohm D1 5 kOhm D2 D3 . D4 0.1uF C1 Bypass 5 Gnd S2 C1 = 15 pF including Probe and Jig Capacitances All diodes are 1N916 or 1N3064 3.0 V 1.3 V 0V Input VEN Output VO S1 closed S2 open 0.5 V 1.3 V S1 and S2 closed VOL tPZL tPLZ 0.5 V Output VO S1 open S2 closed 1.3 V VOH ca. 1.5 V S1 and S2 closed 0V tPZH tPHZ Figure 30. Test circuit for common mode transient immunity and typical waveforms—SFH 6700/01/02/11/12/19 Figure 31. Test circuit for common modetransient immunity and typical waveforms—SFH6705L VCC Vcc 1 A B R 7 3 En* 4 Gnd + Pulse Generator 5V 8 Out* 2 VCC 6 Output VO Monitoring Node 0.1 µF Bypass 1 VCC 8 2 n.c. 7 RL A 0.1 µF Output VO Bypass Monitoring B R 3 Out 5 4 Gnd 6 Node 5 + VCM Pulse Generator * SFH6701/02/11/12 without VEN * SFH6702/12 Pin 6 VOUT and Pin 7 n.c. - VCM 50 V 400 V / 50 V VCM VCM 0V 0V VOH VOH Switch at A: IF = 1.6 mA Switch at A: IF = 1.6 mA VO(min) VO (min) Output VO Output VO VO (max) VOL VO (max) Switch at B: IF = 0 mA VOL Switch at B: IF = 0 mA 5–271 SFH6700/6701/6702/6719/6711/6712/6705