AD AD8541

a
FEATURES
Single Supply Operation: +2.7 V to +5.5 V
Low Supply Current: 45 ␮A/Amplifier
Wide Bandwidth: 1 MHz
No Phase Reversal
Low Input Currents: 4 pA
Unity Gain Stable
Rail-to-Rail Input and Output
APPLICATIONS
ASIC Input or Output Amplifier
Sensor Interface
Piezo Electric Transducer Amplifier
Medical Instrumentation
Mobile Communication
Audio Output
Portable Systems
GENERAL DESCRIPTION
General Purpose CMOS
Rail-to-Rail Amplifiers
AD8541/AD8542/AD8544
PIN CONFIGURATIONS
SO-8 (R)
NC 1
AD8541
SOT-23-5 (RT)
AD8541
8 NC
ⴚIN A 2
7 V+
+IN A 3
6 OUT A
5 NC
Vⴚ 4
OUT A 1
5 V+
Vⴚ 2
4 ⴚIN A
+IN A 3
NC = NO CONNECT
SO-8 (R), RM-8, and RU-8
SO-14 (R) and RU-14
OUT A 1
8 V+
ⴚIN A 2
7 OUT B
ⴚIN A 2
6 ⴚIN B
+IN A 3
5 +IN B
V+ 4
+IN A 3
Vⴚ 4
AD8542
OUT A 1
14 OUT D
13 ⴚIN D
AD8544
12 +IN D
11 Vⴚ
+IN B 5
10 +IN C
ⴚIN B 6
9 ⴚIN C
OUT B 7
8 OUT C
The AD8541/AD8542/AD8544 are single, dual and quad railto-rail input and output single supply amplifiers featuring very
low supply current and 1 MHz bandwidth. All are guaranteed to
operate from a +2.7 V single supply as well as a +5 V supply.
These parts provide 1 MHz bandwidth at low current consumption of 45 µA per amplifier.
Very low input bias currents enable the AD8541/AD8542/AD8544
to be used for integrators, photodiode amplifiers, piezo electric
sensors and other applications with high source impedance. Supply
current is only 45 µA per amplifier, ideal for battery operation.
Rail-to-rail inputs and outputs are useful to designers buffering
ASICs in single supply systems. The AD8541/AD8542/AD8544
are optimized to maintain high gains at lower supply voltages,
making them useful for active filters and gain stages.
The AD8541/AD8542/AD8544 are specified over the extended
industrial (–40°C to +125°C) temperature range. The AD8541
is available in 8-lead SO and 5-lead SOT-23 packages. The
AD8542 is available in 8-lead SO, 8-lead MSOP, and 8-lead
TSSOP surface mount packages. The AD8544 is available in
14-lead narrow SO-14 and 14-lead TSSOP surface mount packages. All TSSOP, MSOP, and SOT versions are available in tape
and reel only.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
AD8541/AD8542/AD8544–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (V = +2.7 V, V
S
Parameter
Symbol
INPUT CHARACTERISTICS
Offset Voltage
VOS
Input Bias Current
Input Offset Current
IB
IOS
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Large Signal Voltage Gain
AVO
Offset Voltage Drift
Bias Current Drift
∆VOS /∆T
∆IB /∆T
Offset Current Drift
∆IOS /∆T
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
NOISE PERFORMANCE
Voltage Noise Density
Current Noise Density
Typ
Max
Units
1
6
7
60
100
1,000
30
50
500
+2.7
mV
mV
pA
pA
pA
pA
pA
pA
V
dB
dB
V/mV
V/mV
V/mV
µV/°C
fA/°C
fA/°C
fA/°C
–40°C ≤ TA ≤ +125°C
4
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +125°C
0.1
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +125°C
VCM = 0 V to +2.7 V
–40°C ≤ TA ≤ +125°C
RL = 100 kΩ , VO = +0.5 V to +2.2 V
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +125°C
–40°C ≤ TA ≤ +125°C
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +125°C
–40°C ≤ TA ≤ +125°C
45
500
4
100
2,000
25
dB
dB
µA
µA
SR
tS
GBP
Φo
RL = 100 kΩ
To 0.1% (1 V Step)
0.4
en
en
in
f = 1 kHz
f = 10 kHz
PSRR
ISY
IL = 1 mA
–40°C ≤ TA ≤ +125°C
IL = 1 mA
–40°C ≤ TA ≤ +125°C
VOUT = VS – 1 V
0
40
38
100
50
2
65
60
IOUT
± ISC
ZOUT
DYNAMIC PERFORMANCE
Slew Rate
Settling Time
Gain Bandwidth Product
Phase Margin
Min
VS = +2.5 V to +6 V
–40°C ≤ TA ≤ +125°C
VO = 0 V
–40°C ≤ TA ≤ +125°C
Output Current
Supply Current/Amplifier
Conditions
V
V
mV
mV
mA
mA
Ω
VOL
POWER SUPPLY
Power Supply Rejection Ratio
= +1.35 V, TA = +25ⴗC unless otherwise noted)
+2.575 +2.65
+2.550
35
100
125
15
± 20
50
Output Voltage Low
Closed Loop Output Impedance
CM
f = 200 kHz, AV = 1
76
38
55
75
0.75
5
980
63
V/µs
µs
kHz
Degrees
40
38
<0.1
nV/√Hz
nV/√Hz
pA/√Hz
Specifications subject to change without notice.
–2–
REV. A
AD8541/AD8542/AD8544
ELECTRICAL CHARACTERISTICS (V = +3.0 V, V
S
Parameter
Symbol
INPUT CHARACTERISTICS
Offset Voltage
VOS
Input Bias Current
Input Offset Current
IB
IOS
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Large Signal Voltage Gain
AVO
Offset Voltage Drift
Bias Current Drift
∆VOS /∆T
∆IB /∆T
Offset Current Drift
∆IOS /∆T
OUTPUT CHARACTERISTICS
Output Voltage High
NOISE PERFORMANCE
Voltage Noise Density
Current Noise Density
Max
Units
1
6
7
60
100
1,000
30
50
500
+3
mV
mV
pA
pA
pA
pA
pA
pA
V
dB
dB
V/mV
V/mV
V/mV
µV/°C
fA/°C
fA/°C
fA/°C
–40°C ≤ TA ≤ +125°C
4
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +125°C
0.1
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +125°C
VCM = 0 V to +3 V
–40°C ≤ TA ≤ +125°C
RL = 100 kΩ , VO = +0.5 V to +2.2 V
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +125°C
–40°C ≤ TA ≤ +125°C
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +125°C
–40°C ≤ TA ≤ +125°C
0
40
38
100
50
2
45
500
4
100
2,000
25
dB
dB
µA
µA
SR
tS
GBP
Φo
RL = 100 kΩ
To 0.01% (1 V Step)
0.4
en
en
in
f = 1 kHz
f = 10 kHz
PSRR
ISY
IL = 1 mA
–40°C ≤ TA ≤ +125°C
IL = 1 mA
–40°C ≤ TA ≤ +125°C
VOUT = VS – 1 V
f = 200 kHz, AV = 1
Specifications subject to change without notice.
REV. A
Typ
65
60
IOUT
± ISC
ZOUT
DYNAMIC PERFORMANCE
Slew Rate
Settling Time
Gain Bandwidth Product
Phase Margin
Min
VS = +2.5 V to +6 V
–40°C ≤ TA ≤ +125°C
VO = 0 V
–40°C ≤ TA ≤ +125°C
Output Current
Supply Current/Amplifier
Conditions
V
V
mV
mV
mA
mA
Ω
VOL
POWER SUPPLY
Power Supply Rejection Ratio
= +1.5 V, TA = +25ⴗC unless otherwise noted)
+2.875 +2.955
+2.850
32
100
125
18
± 25
50
VOH
Output Voltage Low
Closed Loop Output Impedance
CM
–3–
76
40
60
75
0.8
5
980
64
V/µs
µs
kHz
Degrees
42
38
<0.1
nV/√Hz
nV/√Hz
pA/√Hz
AD8541/AD8542/AD8544–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (V = +5.0 V, V
S
Parameter
Symbol
INPUT CHARACTERISTICS
Offset Voltage
VOS
Input Bias Current
Input Offset Current
IB
IOS
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Large Signal Voltage Gain
AVO
Offset Voltage Drift
Bias Current Drift
∆VOS /∆T
∆IB /∆T
Offset Current Drift
∆IOS /∆T
OUTPUT CHARACTERISTICS
Output Voltage High
NOISE PERFORMANCE
Voltage Noise Density
Current Noise Density
Typ
Max
Units
1
6
7
60
100
1,000
30
50
500
+5
mV
mV
pA
pA
pA
pA
pA
pA
V
dB
dB
V/mV
V/mV
V/mV
µV/°C
fA/°C
fA/°C
fA/°C
–40°C ≤ TA ≤ +125°C
4
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +125°C
0.1
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +125°C
VCM = 0 V to +5 V
–40°C ≤ TA ≤ +125°C
RL = 100 kΩ , VO = +0.5 V to +2.2 V
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +125°C
–40°C ≤ TA ≤ +125°C
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +125°C
–40°C ≤ TA ≤ +125°C
48
40
4
100
2,000
25
dB
dB
µA
µA
SR
BWP
tS
GBP
Φo
RL = 100 kΩ, CL = 200 pF
1% Distortion
To 0.1% (1 V Step)
0.45
en
en
in
f = 1 kHz
f = 10 kHz
PSRR
ISY
IL = 1 mA
–40°C ≤ TA ≤ +125°C
IL = 1 mA
–40°C ≤ TA ≤ +125°C
VOUT = VS – 1 V
0
40
38
20
10
2
65
60
IOUT
± ISC
ZOUT
DYNAMIC PERFORMANCE
Slew Rate
Full-Power Bandwidth
Settling Time
Gain Bandwidth Product
Phase Margin
Min
VS = +2.5 V to +6 V
–40°C ≤ TA ≤ +125°C
VO = 0 V
–40°C ≤ TA ≤ +125°C
Output Current
Supply Current/Amplifier
Conditions
V
V
mV
mV
mA
mA
Ω
VOL
POWER SUPPLY
Power Supply Rejection Ratio
= +2.5 V, TA = +25ⴗC unless otherwise noted)
+4.9
+4.965
+4.875
25
100
125
30
± 60
45
VOH
Output Voltage Low
Closed Loop Output Impedance
CM
f = 200 kHz, AV = 1
76
45
65
85
0.92
70
6
1,000
67
V/µs
kHz
µs
kHz
Degrees
42
38
<0.1
nV/√Hz
nV/√Hz
pA/√Hz
Specifications subject to change without notice.
–4–
REV. A
AD8541/AD8542/AD8544
ABSOLUTE MAXIMUM RATINGS
1
PACKAGE INFORMATION
Supply Voltage(VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to VS
Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . ± 6 V
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range . . . . . . . . . . –40°C to +125°C
Junction Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
For supplies less than +6 V, the differential input voltage is equal to ± VS.
Package Type
␪JA1
␪JC
Units
5-Lead SOT-23 (RT)
8-Lead SOIC (R)
8-Lead MSOP (RM)
8-Lead TSSOP (RU)
14-Lead SOIC (R)
14-Lead TSSOP (RU)
256
158
210
240
120
240
81
43
45
43
36
43
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
NOTE
1
θJA is specified for worst case conditions, i.e., θJA is specified for device soldered
onto a circuit board for surface mount packages.
ORDERING GUIDE
Model
Temperature
Range
Package
Description
Package
Option
AD8541AR
AD8541ART*
AD8542AR
AD8542ARM*
AD8542ARU*
AD8544AR
AD8544ARU*
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
8-Lead SOIC
5-Lead SOT-23
8-Lead SOIC
8-Lead MSOP
8-Lead TSSOP
14-Lead SOIC
14-Lead TSSOP
SO-8
RT-5
SO-8
RM-8
RU-8
SO-14
RU-14
Branding
Information
A4A
AVA
*Available in reels only.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8541/AD8542/AD8544 features proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. A
–5–
WARNING!
ESD SENSITIVE DEVICE
AD8541/AD8542/AD8544 –Typical Performance Characteristics
180
120
100
80
60
40
20
0
ⴚ4.5 ⴚ3.5 ⴚ2.5ⴚ1.5 ⴚ0.5 0.5 1.5 2.5 3.5 4.5
INPUT OFFSET VOLTAGE – mV
0.0
ⴚ1.0
ⴚ1.5
ⴚ2.0
ⴚ2.5
ⴚ3.0
4
3
2
ⴚ3.5
1
0
ⴚ0.5
200
150
100
50
6
5
4
3
2
1
Figure 4. Input Bias Current vs.
Temperature
Figure 5. Input Offset Current vs.
Temperature
10k
OUTPUT SWING – Vp-p
SOURCE
10
SINK
1
0.1
0.01
0.001
2.0
1.5
1.0
0.5
0.01
0.1
1
10
LOAD CURRENT – mA
100
Figure 7. Output Voltage to Supply
Rail vs. Load Current
0
1k
100
80
ⴚPSRR
60
+PSRR
40
20
0
1k
10k
100k
FREQUENCY – Hz
1M
10M
60
VS = +2.7V
VIN = 2.5Vp-p
RL = 2k⍀
TA = +25ⴗC
2.5
100
120
Figure 6. Power Supply Rejection
Ratio vs. Frequency
3.0
VS = +2.7V
TA = +25ⴗC
VS = +2.7V
TA = +25ⴗC
ⴚ40
100
ⴚ1
ⴚ55 ⴚ35 ⴚ15 5 25 45 65 85 105 125 145
TEMPERATURE – ⴗC
20 40 60 80 100 120 140
TEMPERATURE – ⴗC
140
ⴚ20
10k
100k
1M
FREQUENCY – Hz
10M
Figure 8. Closed-Loop Output
Voltage Swing vs. Frequency
–6–
SMALL SIGNAL OVERSHOOT – %
0
5.5
160
VS = +2.7V AND +5V
VCM = VS /2
0
0
ⴚ40 ⴚ20
0.5
1.5
2.5
3.5
4.5
COMMON-MODE VOLTAGE – V
Figure 3. Input Bias Current vs.
Common-Mode Voltage
POWER SUPPLY REJECTION – dB
VS = +2.7V AND +5V
VCM = VS /2
INPUT OFFSET CURRENT – pA
INPUT BIAS CURRENT – pA
5
7
250
⌬ OUTPUT VOLTAGE – mV
6
Figure 2. Input Offset Voltage
vs. Temperature
300
1k
7
ⴚ4.0
ⴚ55 ⴚ35 ⴚ15 5 25 45 65 85 105 125 145
TEMPERATURE – ⴗC
400
VS = +2.7V AND +5V
VCM = VS /2
8
ⴚ0.5
Figure 1. Input Offset Voltage
Distribution
350
9
VS = +2.7V AND +5V
VCM = VS /2
INPUT BIAS CURRENT – pA
140
0.5
INPUT OFFSET VOLTAGE – mV
NUMBER OF AMPLIFIERS
1.0
VS = +5V
VCM = +2.5V
TA = +25ⴗC
160
50
VS = +2.7V
RL =
TA = +25ⴗC
40
+OS
30
ⴚOS
20
10
0
10
1k
100
CAPACITANCE – pF
10k
Figure 9. Small Signal Overshoot vs.
Load Capacitance
REV. A
AD8541/AD8542/AD8544
40
+OS
30
ⴚOS
20
10
0
10
1k
100
CAPACITANCE – pF
50
40
+OS
30
1.35V
ⴚOS
20
10
1k
100
CAPACITANCE – pF
10k
Figure 11. Small Signal Overshoot
vs. Load Capacitance
Figure 12. Small Signal Transient
Response
VS = +2.7V
RL = 2k⍀
AV = +1
TA = +25ⴗC
500mV
80
45
60
90
40
135
20
180
0
10␮s
1k
Figure 13. Large Signal Transient
Response
10M
60
50
40
30
20
10
120
100
80
ⴚPSRR
60
+PSRR
40
20
0
ⴚ20
ⴚ40
100
1k
10k
100k
FREQUENCY – Hz
1M
10M
VS = +5V
VIN = +4.9Vp-p
RL = NO LOAD
TA = +25ⴗC
4.0
100
SOURCE
10
SINK
1
0.1
3.5
3.0
2.5
2.0
1.5
1.0
0.5
10k
100k
1M
FREQUENCY – Hz
10M
Figure 16. Common-Mode Rejection
Ratio vs. Frequency
REV. A
VS = +5V
TA = +25ⴗC
4.5
0
ⴚ10
1k
140
5.0
VS = +5V
TA = +25ⴗC
OUTPUT SWING – Vp-p
1k
70
160
Figure 15. Power Supply Rejection
Ratio vs. Frequency
10k
VS = +5V
TA = +25ⴗC
⌬ OUTPUT VOLTAGE – mV
COMMON-MODE REJECTION – dB
100k
1M
FREQUENCY – Hz
Figure 14. Open-Loop Gain and
Phase vs. Frequency
90
80
10k
PHASE SHIFT – Degrees
GAIN – dB
VS = +2.7V
RL = NO LOAD
TA = +25ⴗC
1.35V
10␮s
50mV
0
10
10k
Figure 10. Small Signal Overshoot
vs. Load Capacitance
VS = +2.7V
RL = 100k⍀
CL = 300pF
AV = +1
TA = +25ⴗC
VS = +2.7V
RL = 2k⍀
TA = +25ⴗC
POWER SUPPLY REJECTION RATIO – dB
50
60
VS = +2.7V
RL = 10k⍀
TA = +25ⴗC
SMALL SIGNAL OVERSHOOT – %
SMALL SIGNAL OVERSHOOT – %
60
0.01
0.001
0.01
0.1
1
10
LOAD CURRENT – mA
100
Figure 17. Output Voltage to Supply
Rail vs. Frequency
–7–
0
1k
10k
100k
1M
FREQUENCY – Hz
10M
Figure 18. Closed Loop Output
Voltage Swing vs. Frequency
AD8541/AD8542/AD8544
60
OUTPUT SWING – Vp-p
4.0
3.5
SMALL SIGNAL OVERSHOOT – %
VS = +5V
VIN = +4.9Vp-p
RL = 2k⍀
TA = +25ⴗC
4.5
3.0
2.5
2.0
1.5
1.0
60
VS = +5V
RL = 10k⍀
TA = +25ⴗC
50
SMALL SIGNAL OVERSHOOT – %
5.0
40
+OS
30
ⴚOS
20
10
VS = +5V
RL = 2k⍀
TA = +25ⴗC
50
40
+OS
30
ⴚOS
20
10
0.5
0
1k
10k
100k
1M
FREQUENCY – Hz
0
10
10M
Figure 19. Closed-Loop Output
Voltage Swing vs. Frequency
1k
100
CAPACITANCE – pF
0
10
10k
Figure 20. Small Signal Overshoot
vs. Load Capacitance
1k
100
CAPACITANCE – pF
10k
Figure 21. Small Signal Overshoot
vs. Load Capacitance
VS = +5V
RL = 100k⍀
CL = 300pF
AV = +1
TA = +25ⴗC
VS = +5V
RL =
TA = +25ⴗC
50
40
+OS
30
2.5V
VS = +5V
RL = 2k⍀
AV = +1
TA = +25ⴗC
20
10
10␮s
50mV
0
10
100
1k
CAPACITANCE – pF
Figure 23. Small Signal Transient
Response
VS = +5V
RL = NO LOAD
TA = +25ⴗC
VS = +5V
RL = 10k⍀
AV = +1
TA = +25ⴗC
45
60
90
40
135
20
180
0
PHASE SHIFT – Degrees
VIN
80
VOUT
2.5V
20␮s
1V
1k
10k
100k
1M
FREQUENCY – Hz
1V
10␮s
10k
Figure 22. Small Signal Overshoot
vs. Load Capacitance
GAIN – dB
2.5V
ⴚOS
10M
Figure 25. Open-Loop Gain & Phase
vs. Frequency
Figure 26. No Phase Reversal
–8–
Figure 24. Large Signal Transient
Response
60
SUPPLY CURRENT/AMPLIFIER – ␮A
SMALL SIGNAL OVERSHOOT – %
60
TA = +25ⴗC
50
40
30
20
10
0
0
1
2
3
4
SUPPLY VOLTAGE – V
5
6
Figure 27. Supply Current per
Amplifier vs. Supply Voltage
REV. A
AD8541/AD8542/AD8544
1,000
VS = +2.7V AND +5V
AV = +1
800 TA = +25ⴗC
VS = +5V
AV = +1
MARKER SET @ 10kHz
MARKER READING: 37.6␮V/ Hz
TA = +25ⴗC
900
50
VS = +5V
45
40
VS = +2.7V
35
30
200mV/DIVISION
700
IMPEDANCE – ⍀
SUPPLY CURRENT/AMPLIFIER – ␮A
55
600
500
400
300
200
25
100
20
ⴚ55 ⴚ35ⴚ15
5 25 45 65 85 105 125 145
TEMPERATURE – ⴗC
Figure 28. Supply Current per
Amplifier vs. Temperature
0
1k
10k
100k
1M
FREQUENCY – Hz
10M
Figure 29. Closed-Loop Output
Impedance vs. Frequency
5
10
15
FREQUENCY – kHz
20
Figure 30. Voltage Noise
the circuit to no longer attenuate at the ideal notch frequency.
To achieve desired performance, 1% or better component
tolerances or special component screens are usually required.
One method to desensitize the circuit-to-component mismatch is to increase R2 with respect to R1, which lowers Q. A
lower Q increases attenuation over a wider frequency range,
but reduces attenuation at the peak notch frequency.
NOTES ON THE AD854x AMPLIFIERS
The AD8541/AD8542/AD8544 amplifiers are improved performance general purpose operational amplifiers. Performance has
been improved over previous amplifiers in several ways.
Lower Supply Current for 1 MHz Gain Bandwidth
The AD854x series typically uses 45 microamps of current per
amplifier. This is much less than the 200 µA to 700 µA used in
earlier generation parts with similar performance. This makes
the AD854x series a good choice for upgrading portable designs
for longer battery life. Alternatively, additional functions and
performance can be added at the same current drain.
5.0V
R
100k⍀
R
100k⍀
At +5 V single supply, the short circuit current is typically 60 µA.
Even 1 V from the supply rail, the AD854x amplifiers can provide
30 mA, sourcing or sinking.
8
3
1/2 AD8542
U1
2
C2
53.6␮F
Higher Output Current
V OUT
1
4
R/2
50k⍀
2.5VREF
Sourcing and sinking is strong at lower voltages, with 15 mA
available at +2.7 V, and 18 mA at 3.0 V. For even higher output
currents, please see the Analog Devices AD8531/AD853/AD8534
parts, with output currents to 250 mA. Information on these
parts is available from your Analog Devices representative, and
datasheets are available at the Analog Devices website at
www.analog.com.
C
26.7nF
C
26.7nF
f0 =
f0 =
R2
2.5k⍀
1/2 AD8542
7
5
U2
6
R1
97.5k⍀
1
2πRC
[
1
R1
4 1ⴚ
R1+R2
2.5VREF
]
Figure 31. 60 Hz Twin-T Notch Filter, Q = 10
Better Performance at Lower Voltages
The AD854x family parts have been designed to provide better ac
performance, at 3.0 V and 2.7 V, than previously available parts.
Typical gain-bandwidth product is close to 1 MHz at 2.7 V. Voltage gain at 2.7 V and 3.0 V is typically 500,000. Phase margin is
typically over +60°C, making the part easy to use.
5.0V
R
R
3
7
AD8541
2
6
V OUT
R/2
2.5VREF
The AD8542 has very high open loop gain (especially with supply
voltage below 4 V), which makes it useful for active filters of all
types. For example, Figure 31 illustrates the AD8542 in the classic Twin-T Notch Filter design. The Twin-T Notch is desired for
simplicity, low output impedance and minimal use of op amps. In
fact, this notch filter may be designed with only one op amp if Q
adjustment is not required. Simply remove U2 as illustrated in
Figure 32. However, a major drawback to this circuit topology is
ensuring that all the Rs and Cs closely match. The components
must closely match or notch frequency offset and drift will cause
4
2C
VIN
APPLICATIONS
Notch Filter
REV. A
0
100M
C
C
Figure 32. 60 Hz Twin-T Notch Filter, Q =
∞ (Ideal)
Figure 33 diagrams another example of the AD8542 in a
notch filter circuit. The FNDR notch filter has several
unique features as compared to the Twin-T Notch including:
less critical matching requirements; Q is directly proportional
to a single resistor R1. While matching component values is
still important, it is also much easier and/or less expensive to
–9–
25
AD8541/AD8542/AD8544
accomplish in the FNDR circuit. For example, the Twin-T
Notch uses three capacitors with two unique values, whereas the
FNDR circuit uses only two capacitors, which may be of the
same value. U3 is simply a buffer that is added to lower the output impedance of the circuit.
R1
Q ADJUST
200⍀
9
The AD854x family has very high impedance with input bias
current typically around 4 pA. This characteristic allows the
AD854x op amps to be used in photodiode applications and
other applications that require high input impedance. Note that
the AD854x has significant voltage offset, which can be removed
by capacitive coupling or software calibration.
1/4 AD8544
8
U3
10
Photodiode Application
Figure 35, illustrates a photodiode or current measurement
application. The feedback resistor is limited to 10 MΩ to avoid
excessive output offset. Also note that a resistor is not needed
on the noninverting input to cancel bias current offset, because
the bias current related output offset is not significant when
compared to the voltage offset contribution. For the best performance follow the standard high impedance layout techniques
including: shield circuit, clean circuit board, put a trace connected to the noninverting input around the inverting input,
and use separate analog and digital power supplies.
V OUT
C1
1␮F
R
2.61k⍀
2.5VREF
1/4 AD8544
7
U2
6
3
C2
1␮F
2
U1
1
11
R
2.61k⍀
5
1/4 AD8544
4
R
2.61k⍀
f=
R
2.61k⍀
1
2π LC1
2.5VREF
L = R2C2
C
100pF
13
12
1/4 AD8544
U4
14
R
10M⍀
NC
SPARE
V+
OR
2.5VREF
2
7
6
3
Figure 33. FNDR 60 Hz Notch Filter with Output Buffer
4
D
Comparator Function
A comparator function is a common application for a spare op
amp in a quad package. Figure 34 illustrates 1/4 of the AD8544
as a comparator in a standard overload detection application.
Unlike so many op amps, the AD854x family can double as
comparator because this op amp family has rail-to-rail differential input range, rail-to-rail output, and a great speed vs. power
ratio. R2 is used to introduce hysteresis. The AD854x when
used as comparators have 5 µs propagation delay @ 5 V and 5 µs
overload recovery time.
2.5VREF
V OUT
AD8541
2.5VREF
Figure 35. High Input Impedance Application–Photodiode
Amplifier
R2
1M⍀
R1
1k⍀
V OUT
VIN
2.5VDC
1/4 AD8544
2.5VREF
Figure 34. The AD854x Comparator Application–Overload
Detector
–10–
REV. A
AD8541/AD8542/AD8544
* AD8542 SPICE Macro-model Typical Values
* 6/98, Ver. 1
* TAM / ADSC
*
* Copyright 1998 by Analog Devices
*
* Refer to “README.DOC” file for License Statement. Use of this
* model indicates your acceptance of the terms
and provisions in
* the License Statement.
*
* Node Assignments
*
noninverting input
*
| inverting input
*
| |
positive supply
*
| |
| negative supply
*
| |
| | output
*
| |
| | |
*
| |
| | |
.SUBCKT AD8542
1 2 99 50 45
*
* INPUT STAGE
*
M1
4 1 8 8 PIX L=0.6E-6 W=16E-6
M2
6 7 8 8 PIX L=0.6E-6 W=16E-6
M3 11 1 10 10 NIX L=0.6E-6 W=16E-6
M4 12 7 10 10 NIX L=0.6E-6 W=16E-6
RC1 4 50 20E3
RC2 6 50 20E3
RC3 99 11 20E3
RC4 99 12 20E3
C1
4 6 1.5E-12
C2 11 12 1.5E-12
I1 99 8 1E-5
I2 10 50 1E-5
V1 99 9 0.2
V2 13 50 0.2
D1
8 9 DX
D2 13 10 DX
EOS 7 2 POLY(3) (22,98) (73,98) (81,0) 1E-3 1 1
1
IOS 1 2 2.5E-12
*
* CMRR 64dB, ZERO AT 20kHz
*
ECM1 21 98 POLY(2) (1,98) (2,98) 0 .5 .5
RCM1 21 22 79.6E3
CCM1 21 22 100E-12
RCM2 22 98 50
*
* PSRR=90dB, ZERO AT 200Hz
*
RPS1 70 0 1E6
RPS2 71 0 1E6
CPS1 99 70 1E-5
CPS2 50 71 1E-5
EPSY 98 72 POLY(2) (70,0) (0,71) 0 1 1
RPS3 72 73 1.59E6
CPS3 72 73 500E-12
RPS4 73 98 25
*
REV. A
* VOLTAGE NOISE REFERENCE OF 35nV/rt(Hz)
*
VN1 80 0 0
RN1 80 0 16.45E-3
HN 81 0 VN1 35
RN2 81 0 1
*
* INTERNAL VOLTAGE REFERENCE
*
VFIX 90 98 DC 1
S1
90 91 (50,99) VSY_SWITCH
VSN1 91 92 DC 0
RSY 92 98 1E3
EREF 98 0 POLY(2) (99,0) (50,0) 0 .5 .5
GSY 99 50 POLY(1) (99,50) 0 3.7E-6
*
* ADAPTIVE GAIN STAGE
* AT Vsy>+4.2, AVol=45 V/mv
* AT Vsy<+3.8, AVol=450 V/mv
*
G1 98 30 POLY(2) (4,6) (11,12) 0 2.5E-5 2.5E-5
VR1 30 31 DC 0
H1 31 98 POLY(2) VR1 VSN1 0 5.45E6 0 0 49.05E9
CF 45 30 10E-12
D3 30 99 DX
D4 50 30 DX
*
* OUTPUT STAGE
*
M5 45 46 99 99 POX L=0.6E-6 W=375E-6
M6 45 47 50 50 NOX L=0.6E-6 W=500E-6
EG1 99 46 POLY(1) (98,30) 1.05 1
EG2 47 50 POLY(1) (30,98) 1.04 1
*
* MODELS
*
.MODEL POX PMOS (LEVEL=2,KP=20E-6,VTO=+1,LAMBDA=0.067)
.MODEL NOX NMOS (LEVEL=2,KP=20E+6,VTO=1,LAMBDA=0.067)
.MODEL PIX PMOS (LEVEL=2,KP=20E-6,VTO=+0.7,LAMBDA=0.01,KF=1E-31)
.MODEL NIX NMOS (LEVEL=2,KP=20E+6,VTO=0.7,LAMBDA=0.01,KF=1E-31)
.MODEL DX D(IS=1E-14)
.MODEL VSY_SWITCH VSWITCH(ROFF=100E3,RON=1,VOFF=+4.2,VON=-3.5)
.ENDS AD8542
–11–
AD8541/AD8542/AD8544
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
14-Lead TSSOP
(RU-14)
0.122 (3.10)
0.114 (2.90)
0.201 (5.10)
0.193 (4.90)
1
14
8
1
7
0.177 (4.50)
0.169 (4.30)
0.256 (6.50)
0.246 (6.25)
0.177 (4.50)
0.169 (4.30)
5
0.256 (6.50)
0.246 (6.25)
8
C3414–0–3/00 (rev. A)
8-Lead TSSOP
(RU-08)
4
PIN 1
PIN 1
0.0256 (0.65)
BSC
0.006 (0.15)
0.002 (0.05)
0.0433
(1.10)
MAX
0.0118 (0.30)
SEATING
PLANE 0.0075 (0.19)
0.0079 (0.20)
0.0035 (0.090)
8ⴗ
0ⴗ
0.028 (0.70)
0.020 (0.50)
0.0433
(1.10)
MAX
0.0118 (0.30)
0.0075 (0.19)
0.0256
(0.65)
BSC
SEATING
PLANE
8-Lead SOIC
(SO-8)
8
0.3444 (8.75)
0.3367 (8.55)
5
PIN 1
0.0098 (0.25)
0.0040 (0.10)
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
4
0.0688 (1.75)
0.0532 (1.35)
0.0500 0.0192 (0.49)
SEATING (1.27)
PLANE BSC 0.0138 (0.35)
8
1
7
0.0098 (0.25)
0.0040 (0.10)
8ⴗ
0ⴗ 0.0500 (1.27)
0.0160 (0.41)
0.0500
SEATING (1.27)
PLANE BSC
0.0192 (0.49)
0.0138 (0.35)
1
8ⴗ
0ⴗ 0.0500 (1.27)
0.0160 (0.41)
0.122 (3.10)
0.114 (2.90)
8
4
2
0.0099 (0.25)
0.0075 (0.19)
0.0196 (0.50)
x 45ⴗ
0.0099 (0.25)
8-Lead MSOP
(RM-8)
0.1181 (3.00)
0.1102 (2.80)
5
0.2440 (6.20)
0.2284 (5.80)
0.0688 (1.75)
0.0532 (1.35)
PIN 1
0.0196 (0.50)
x 45ⴗ
0.0099 (0.25)
0.0098 (0.25)
0.0075 (0.19)
14
5-Lead SOT-23
(RT Suffix)
0.0669 (1.70)
0.0590 (1.50)
0.028 (0.70)
0.020 (0.50)
14-Lead SOIC
(SO-14)
0.1968 (5.00)
0.1890 (4.80)
0.1574 (4.00)
0.1497 (3.80) 1
0.0079 (0.20)
0.0035 (0.090)
8ⴗ
0ⴗ
0.1181 (3.00)
0.1024 (2.60)
3
5
0.193
(4.90)
BSC
0.122 (3.10)
0.114 (2.90)
1
4
PIN 1
0.0374 (0.95) BSC
PIN 1
0.0256 (0.65) BSC
0.0748 (1.90)
BSC
0.0512 (1.30)
0.0354 (0.90)
0.0059 (0.15)
0.0019 (0.05)
0.0197 (0.50)
0.0138 (0.35)
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.0079 (0.20)
0.0031 (0.08)
0.0571 (1.45)
0.0374 (0.95)
10ⴗ
0ⴗ
0.043
(1.10)
MAX
6ⴗ
0.016 (0.40) SEATING
0ⴗ
0.009 (0.23)
0.010 (0.25) PLANE
0.005 (0.13)
0.037 (0.95)
0.030 (0.75)
0.028 (0.70)
0.016 (0.40)
0.0217 (0.55)
0.0138 (0.35)
–12–
REV. A
PRINTED IN U.S.A.
0.006 (0.15)
0.002 (0.05)