EDI8L32512C 512K x 32 CMOS High Speed Static RAM FEATURES DESCRIPTION DSP Memory Solution • Motorola DSP96002 • Analog SHARC DSP • Texas Instruments TMS320C3x, TMS320C4x Random Access Memory Array • Fast Access Times: 12*, 15, 17, and 20ns • TTL Compatible Inputs and Outputs • Fully Static, No Clocks Surface Mount Package • 68 Lead PLCC, No. 99 JEDEC M0-47AE • Small Footprint, 0.990 Sq. In. • Multiple Ground Pins for Maximum Noise Immunity Single +5V (±5%) Supply Operation The EDI8L32512C is a high speed, 5V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP memory solution. The high speed, 5V supply voltage and control lines make the device ideal for creating floating point DSP memory solutions. The device can be configured as a 512K x 32 and used to create a single chip external data memory solution for TI's TMS320C30/ C31 (Figure 8), TMS320C32 (Figure 9) or TMS320C4x (Figure 10), Motorola's DSP96002 and Analog's SHARC DSP (Figure 11). Alternatively, the device's chip enables can be used to configure it as a 1M x 16. A 1M x 48 program memory array for Analog's SHARC DSP is created using three devices (Figure 12). If this memory is too deep, two 512K x 24s (EDI8L24512C) can be used to create a 512K x 48 array or two 128K x 24s (EDI8L24128C) can be used to create a 128K x 48 array. The device provides a 56% space savings when compared to four 512K x 8, 36 pin SOJs. In addition the EDI8L32512C has only a 10pF load on the data lines vs. 32pF for four plastic SOJs. * Advance Information. The device provides a memory upgrade of the EDI8L32256C (256K x 32) or the EDI8L32128C (128K x 32). For additional upgrade information see Figure 13. Note: Solder Reflow Temperature should not exceed 230°C for 10 seconds. FIG. 1 PIN CONFIGURATIONS AND BLOCK DIAGRAM 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 DQ16 A18 A17 E3 E2 E1 E0 NC VCC NC NC G W A16 A15 A14 DQ15 PIN NAMES 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 DQ14 DQ13 DQ12 V SS DQ11 DQ10 DQ9 DQ8 VCC DQ7 DQ6 DQ5 DQ4 V SS DQ3 DQ2 DQ1 DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A9 A8 A7 DQ0 Note: For memory upgrade information, refer to Page 8, Figure 13 "EDI MCM-L Upgrade Path." August 2000, Rev. 7 ECO #13097 A0-18 Address Inputs E 0-3 Chip Enables (One per Byte) W Master Write Enable G Master Output Enable E0 DQ0-7 DQ0-31 Common Data Input/Output E1 DQ8-15 V CC Power (+5V ±5%) E2 DQ16-23 E3 DQ24-31 VSS Ground NC No Connection A0-18 G W E0 E1 E2 E3 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 DQ17 DQ18 DQ19 V SS DQ20 DQ21 DQ22 DQ23 VCC DQ24 DQ25 DQ26 DQ27 V SS DQ28 DQ29 DQ30 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 1 BYTE CONTROL TABLE Chip Byte Enable Control 19 512K x 32 Memory Array DQ0-7 DQ8-15 DQ16-23 DQ24-31 White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com EDI8L32512C ABSOLUTE MAXIMUM RATINGS* Voltage on any pin relative to VSS Operating Temperature TA (Ambient) Commercial Industrial Storage Temperature Power Dissipation Output Current. Junction Temperature, TJ RECOMMENDED DC OPERATING CONDITIONS -0.5V to 7.0V Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage 0°C to + 70°C -40°C to +85°C -55°C to +125°C 5.0 Watts 20 mA 175°C Sym VCC VSS VIH VIL Min 4.75 0 2.2 -0.3 Typ 5.0 0 --- Max 5.25 0 VCC+0.5 0.8 Units V V V V AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels Output Load *Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. VSS to 3.0V 5ns 1.5V Figure 2 (Note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF) FIG. 2 FIG. 3 Vcc Vcc 480Ω 480Ω Q Q 30pF 255Ω 5pF 255Ω DC ELECTRICAL CHARACTERISTICS Parameter Sym Operating Power Supply Current ICC1 Standby (TTL) Supply Current ICC2 Full Standby CMOS Supply Current ICC3 Input Leakage Current Output Leakage Current Output High Volltage Output Low Voltage ILI ILO VOH VOL Conditions W = VIL, II/O = 0mA, Min Cycle E ≥ VIH, VIN ≤ VIL or VIN ≥ VIH, f = ØMHz E ≥ VCC - 0.2V VIN ≥ VCC - 0.2V or VIN ≤ 0.2V VIN = 0V to VCC V I/O = 0V to VCC IOH = -4.0mA IOL = 8.0mA TRUTH TABLE Min 12/15 800 Max 17/20 720 Units mA mA 200 200 mA 40 40 mA ±10 ±10 µA µA V V 2.4 0.4 CAPACITANCE (f=1.0MHz, V IN=VCC OR VSS) G X E H W X Mode Standby Output High Z H L X L L L H H L Output Deselect Read Write High Z DOUT DIN Power ICC2 ICC3 ICC1 ICC1 ICC1 White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com Parameter Address Lines Data Lines Write & Output Enable Lines Chip Enable Lines 2 Sym CI CD/Q W, G E0-3 Max 30 10 30 8 Unit pF pF pF pF August 2000, Rev. 7 EDI8L32512C AC CHARACTERISTICS READ CYCLE Symbol 12ns* JEDEC Alt. Min Max TAVAV TRC 12 TAVQV TAA 12 TELQV TACS 12 TELQX TCLZ 3 TEHQZ TCHZ 6 TAVQX TOH 3 TGLQV TOE 6 TGLQX TOLZ 0 TGHQZ TOHZ 6 Parameter Read Cycle Time Address Access Time Chip Enable Access Time Chip Enable to Output in Low Z (1) Chip Disable to Output in High Z (1) Output Hold from Address Change Output Enable to Output Valid Output Enable to Output in Low Z (1) Output Disable to Output in High Z(1) 15ns Min Max 15 15 15 3 7 3 7 0 7 17ns Min Max 17 17 17 3 9 3 9 0 9 20ns Min Max 20 20 20 3 9 3 9 0 9 Units ns ns ns ns ns ns ns ns ns *Advanced Information Note 1: Parameter guaranteed, but not tested. FIG. 4 READ CYCLE 1 - W HIGH, G, E LOW TAVAV A ADDRESS 2 ADDRESS 1 TAVQV Q TAVQX DATA 1 FIG. 5 DATA 2 READ CYCLE 2 - W HIGH TAVAV A E TAVQV TELQV TEHQZ TELQX G TGLQV TGHQZ TGLQX Q August 2000, Rev. 7 3 White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com EDI8L32512C AC CHARACTERISTICS WRITE CYCLE Symbol JEDEC Alt. TAVAV TWC TELWH TCW TELEH TCW Address Setup Time TAVWL TAS TAVEL TAS Address Valid to End of Write TAVWH TAW TAVEH TAW Write Pulse Width TWLWH TWP TWLEH TWP Write Recovery Time TWHAX TWR TEHAX TWR Data Hold Time TWHDX TDH TEHDX TDH Write to Output in High Z (1) TWLQZ TWHZ Data to Write Time TDVWH TDW TDVEH TDW Output Active from End of Write (1) TWHQX TWLZ Parameter Write Cycle Time Chip Enable to End of Write 12ns* Min Max 12 8 8 0 0 8 8 8 10 0 0 0 0 0 6 6 6 3 15ns 17ns 20ns Min Max Min Max Min Max 15 17 20 10 11 12 10 11 12 0 0 0 0 0 0 10 11 12 10 11 12 10 11 12 12 13 14 0 0 0 0 0 0 0 0 0 0 0 0 0 7 0 8 0 9 7 8 9 7 8 9 3 3 3 Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns *Advanced Information. Note 1: Parameter guaranteed, but not tested. FIG. 6 WRITE CYCLE 1 - W CONTROLLED TAVAV A E TELWH TAVWH TWHAX TWLWH W TAVWL TDVWH DATA VALID D TWLQZ TWHQX HIGH Z Q White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com TWHDX 4 August 2000, Rev. 7 EDI8L32512C FIG. 7 WRITE CYCLE 2 - E CONTROLLED TAVAV A TAVEL TELEH E TAVEH TEHAX TWLEH W TDVEH TEHDX DATA VALID D HIGH Z Q ORDERING INFORMATION Commercial (0°C to +70°C) Part Number EDI8L32512C12AC* EDI8L32512C15AC EDI8L32512C17AC EDI8L32512C20AC Industrial (-40°C to +85°C) Speed (ns) 12 15 17 20 Package No. 99 99 99 99 Part Number Speed (ns) 15 17 20 EDI8L32512C15AI* EDI8L32512C17AI EDI8L32512C20AI Package No. 99 99 99 *Advance Information PACKAGE DRAWING 0.995 Max 0.956 Max Package No. 99 68 Lead PLCC Package No. 99 68 lead PLCC JEDEC MO-47AE 0.180 Max Weight = 4.2g Theta JA = 40°C/W Theta JC = 15°C/W 0.995 0.956 Max Max 0.040 Max 0.020 0.015 0.930 0.890 0.050 BSC 0.115 Max Coplanarity (lowest lead to highest lead) 0.004 August 2000, Rev. 7 5 White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com EDI8L32512C FIG. 8 INTERFACING THE TEXAS INSTRUMENTS TMS320C30/31 WITH THE EDI8L32128C (128KX32) OR THE EDI8L32512C (512KX32) Primary Address Bus A23-0 EDI8L32128/512C A18 8L32512C only A17 } A16 A15 A A14 D A13 D A12 R E S S A4 B A3 U A2 S A1 A0 TI TMS320C30/31 FIG. 9 B U S DQ4 DQ3 DQ2 DQ1 DQ0 E0 E1 E2 E3 STRB Primary Databus D31-0 D A T A DQ31 DQ30 DQ29 DQ28 DQ27 R/W W G INTERFACING THE TEXAS INSTRUMENTS TMS320C32 WITH THE EDI8L32128C (128KX32) OR THE EDI8L32512C (512KX32) Primary Address Bus A23-0 EDI8L32128/512C A18 8L32512C only A17 } A16 A15 A A14 D D R E A6 S A5 S A4 A3 B A2 U A1 S A0 TI TMS320C32 PRGW STRBX_B0 STRBX_B1 STRBX_B2 STRBX_B3 E0 E1 E2 E3 R/W W G Primary Databus D31-0 White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com 6 D A T A B U S DQ31 DQ30 DQ29 DQ28 DQ27 DQ4 DQ3 DQ2 DQ1 DQ0 August 2000, Rev. 7 EDI8L32512C FIG. 10 INTERFACING THE TEXAS INSTRUMENTS TMS320C4x WITH THE EDI8L32128C (128KX32) OR THE EDI8L32512C (512KX32) Global Address Bus A30-0 EDI8L32128/512C A18 8L32512C only A17 } A16 A15 A A14 D A13 D A12 R E S S A4 B A3 U A2 S A1 A0 TI TMS320C4X FIG. 11 R/W0 DQ4 DQ3 DQ2 DQ1 DQ0 W G INTERFACING THE ANALOG SHARC DSP WITH THE EDI8L32512C (512KX32) Address Bus A31 - A0 EDI8L32512C A18 A17 A16 A15 A14 Analog Device A4 A3 A2 A1 A0 ADSP-2106X Databus D47 - D0 D47 D46 . . D31 D30 . . . . A D D R E S S DQ31 DQ30 D DQ29 A DQ28 DQ27 T A B U S B U S DQ4 DQ3 DQ2 DQ1 DQ0 E0 E1 E2 E3 W G MS0 August 2000, Rev. 7 B U S DQ31 DQ30 DQ29 DQ28 DQ27 E0 E1 E2 E3 STRB0 Global Databus D31-0 D A T A WR RD D5 D4 D3 D2 D1 D0 7 White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com EDI8L32512C FIG. 12 INTERFACING THE ANALOG SHARC DSP WITH THE EDI8L32512C (1MX48) EDI8L32512C (Configured as 1Mx16) Address Bus A31-A0 MS0 A17-A0 E0 E1 E2 E3 MS1 W G D A T A DQ31 DQ15 DQ16 DQ15 B U S WORD1 DQ0 DQ0 WR EDI8L32512C RD (Configured as 1Mx16) D A T A A17-A0 E0 E1 E2 E3 Analog Device ADSP-2106x DQ31 DQ31 DQ16 DQ15 B U S W G WORD2 DQ16 DQ0 EDI8L32512C (Configured as 1Mx16) Databus D47-D0 DQ31 DQ47 DQ16 DQ15 B U S W G WORD3 DQ17 DQ0 EDI MCM-L UPGRADE PATH DQ16 A18 A17 E3\ E2\ E1\ E0\ NC VCC NC NC G\ W\ A16 A15 A14 DQ15 FIG. 13 D A T A A17-A0 E0 E1 E2 E3 128K x 32 8L32128C DQ16 NC NC E3\ E2\ E1\ E0\ NC VCC NC NC G\ W\ A16 A15 A14 DQ15 8L32256C 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 DQ16 NC NC BS3\ BS2\ BS1\ BS0\ E1\ VCC NC E0\ G\ W\ NC A15 A14 DQ15 256K x 32 DQ16 NC A17 B53\ B52\ B51\ B50\ E1\ VCC NC E0\ G\ W\ A16 A15 A14 DQ15 512K x 32 8L32512C DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A09 A08 A07 DQ00 DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A09 A08 A07 DQ00 DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A09 A08 A07 DQ00 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 DQ14 DQ13 DQ12 GND DQ11 DQ10 DQ09 DQ08 VCC DQ07 DQ06 DQ05 DQ04 GND DQ03 DQ02 DQ01 DQ14 DQ13 DQ12 GND DQ11 DQ10 DQ09 DQ08 VCC DQ07 DQ06 DQ05 DQ04 GND DQ03 DQ02 DQ01 DQ14 DQ13 DQ12 GND DQ11 DQ10 DQ09 DQ08 VCC DQ07 DQ06 DQ05 DQ04 GND DQ03 DQ02 DQ01 DQ14 DQ13 DQ12 GND DQ11 DQ10 DQ09 DQ08 VCC DQ07 DQ06 DQ05 DQ04 GND DQ03 DQ02 DQ01 DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A09 A08 A07 DQ00 DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A09 A08 A07 DQ00 DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A09 A08 A07 DQ00 DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A09 A08 A07 DQ00 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A09 A08 A07 DQ00 White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com 8 August 2000, Rev. 7