ETC STD60NF3LLT4

STD60NF3LL
N-CHANNEL 30V - 0.0075Ω - 60A DPAK
STripFET II POWER MOSFET
TYPE
STD60NF3LL
■
■
■
■
■
VDSS
RDS(on)
ID
30V
<0.0095Ω
60A
TYPICAL RDS(on) = 0.0075Ω
OPTIMAL RDS(ON) x Qg TRADE-OFF @ 4.5V
CONDUCTION LOSSES REDUCED
SWITCHING LOSSES REDUCED
ADD SUFFIX “T4” FOR ORDERING IN TAPE &
REEL
3
1
DPAK
TO-252
DESCRIPTION
This application specific Power Mosfet is the third
genaration of STMicroelectronics unique “Single
Feature Size ” strip-based process. The resulting transistor shows the best trade-off between onresistance ang gate charge. When used as high
and low side in buck regulators, it gives the best
performance in terms of both conduction and
switching losses. This is extremely important for
motherboards where fast switching and high efficiency are of paramount importance.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY DC/DC
CONVERTERS
■
ABSOLUTE MAXIMUM RATINGS
Symbol
VDS
VDGR
VGS
Value
Unit
Drain-source Voltage (VGS = 0)
Parameter
30
V
Drain-gate Voltage (RGS = 20 kΩ)
30
V
± 16
V
Gate- source Voltage
ID
Drain Current (continuos) at TC = 25°C
60
A
ID
Drain Current (continuos) at TC = 100°C
43
A
Drain Current (pulsed)
240
A
IDM (l )
PTOT
EAS (1)
Tstg
Tj
Total Dissipation at TC = 25°C
100
W
Derating Factor
0.67
W/°C
Single Pulse Avalanche Energy
700
mJ
– 55 to 175
°C
Storage Temperature
Operating Junction Temperature
( ●) Pulse width limi ted by safe operating area
April 2002
(1) Starting Tj=25°C, ID=30A, VDD=27.5V
1/9
STD60NF3LL
THERMAL DATA
Rthj-case
Thermal Resistance Junction-case Max
1.5
°C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
100
°C/W
Maximum Lead Temperature For Soldering Purpose
300
°C
Tl
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol
V(BR)DSS
IDSS
IGSS
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Drain-source
Breakdown Voltage
ID = 250 µA, VGS = 0
Zero Gate Voltage
Drain Current (V GS = 0)
VDS = Max Rating
1
µA
VDS = Max Rating, TC = 125 °C
10
µA
Gate-body Leakage
Current (VDS = 0)
VGS = ± 16V
±100
nA
Max.
Unit
30
V
ON (1)
Symbol
Parameter
Test Conditions
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250µA
R DS(on)
Static Drain-source On
Resistance
VGS = 10 V, I D = 30 A
VGS = 4.5 V , ID = 30 A
Min.
Typ.
1
V
0.0075
0.0085
0.0095
0.0105
Ω
Ω
Typ.
Max.
Unit
DYNAMIC
Symbol
gfs (1)
2/9
Parameter
Test Conditions
Forward Transconductance
VDS =15 V, ID =30 A
VDS = 25V, f = 1 MHz, VGS = 0
Min.
30
S
C iss
Input Capacitance
2210
pF
Coss
Output Capacitance
635
pF
Crss
Reverse Transfer
Capacitance
138
pF
STD60NF3LL
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol
td(on)
tr
Qg
Qgs
Q gd
Parameter
Turn-on Delay Time
Rise Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Test Conditions
Min.
VDD = 15V, ID = 30A
RG = 4.7Ω VGS = 4.5V
(see test circuit, Figure 3)
VDD = 24V, ID = 60A,
VGS = 4.5V
Typ.
Max.
Unit
22
ns
130
ns
30
9
12.5
40
nC
nC
nC
Typ.
Max.
Unit
SWITCHING OFF
Symbol
Parameter
Test Condit ions
Min.
td(off)
tf
Turn-off-Delay Time
Fall Time
VDD = 15V, ID = 30A,
R G = 4.7Ω, VGS = 4.5V
(see test circuit, Figure 3)
36.5
36.5
ns
ns
td(off)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
Vclamp =24V, I D =30A
R G = 4.7Ω, VGS = 4.5V
(see test circuit, Figure 5)
32
23
40
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
Max.
Unit
Source-drain Current
60
A
ISDM (1)
Source-drain Current (pulsed)
240
A
VSD (2)
Forward On Voltage
ISD = 60A, VGS = 0
1.2
V
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 60A, di/dt = 100A/µs,
VDD = 15V, Tj = 150°C
(see test circuit, Figure 5)
ISD
trr
Qrr
IRRM
Parameter
Test Conditions
Min.
Typ.
65
105
3.4
ns
nC
A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedence
3/9
STD60NF3LL
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
4/9
STD60NF3LL
Normalized Gate Thereshold Voltage vs Temp.
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/9
STD60NF3LL
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/9
STD60NF3LL
TO-252 (DPAK) MECHANICAL DATA
mm
DIM.
MIN.
TYP.
inch
MAX.
MIN.
TYP.
MAX.
A
2.20
2.40
0.087
0.094
A1
0.90
1.10
0.035
0.043
A2
0.03
0.23
0.001
0.009
B
0.64
0.90
0.025
0.035
B2
5.20
5.40
0.204
0.213
C
0.45
0.60
0.018
0.024
C2
0.48
0.60
0.019
0.024
D
6.00
6.20
0.236
0.244
E
6.40
6.60
0.252
0.260
G
4.40
4.60
0.173
0.181
H
9.35
10.10
0.368
0.398
L2
L4
V2
0.8
0.60
0
o
0.031
1.00
8
o
0.024
0
o
0.039
0o
P032P_B
7/9
STD60NF3LL
DPAK FOOTPRINT
TUBE SHIPMENT (no suffix)*
All dimensions
are in millimeters
All dimensions are in millimeters
TAPE AND REEL SHIPMENT (suffix ”T4”)*
REEL MECHANICAL DATA
DIM.
mm
MIN.
DIM.
mm
MIN.
MAX.
MIN.
6.8
10.4
7
10.6
0.267 0.275
0.409 0.417
B1
D
1.5
12.1
1.6
0.476
0.059 0.063
D1
1.5
E
1.65
1.85
0.065 0.073
F
K0
7.4
2.55
7.6
2.75
0.291 0.299
0.100 0.108
P0
P1
3.9
7.9
4.1
8.1
0.153 0.161
0.311 0.319
P2
1.9
2.1
0.075 0.082
A0
B0
R
40
W
15.7
* on sales type
8/9
inch
MAX.
0.059
1.574
16.3
0.618
0.641
inch
MIN.
330
MAX.
A
B
1.5
C
D
12.8
20.2
13.2
0.504 0.520
0.795
G
16.4
18.4
0.645 0.724
N
50
T
TAPE MECHANICAL DATA
MAX.
BASE QTY
2500
12.992
0.059
1.968
22.4
0.881
BULK QTY
2500
STD60NF3LL
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
 The ST logo is a registered trademark of STMicroelectronics
 2002 STMicroelectronics - Printed in Italy - All Rights Reserved
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