Revised September 2000 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a 3-3 AND-OR-INVERT function. Ordering Code: Order Number Package Number Package Description 74F51SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 74F51SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F51PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Unit Loading/Fan Out Pin Names Description Input IIH/IIL U.L. HIGH/LOW Output IOH/IOL An, Bn, Cn, Dn, En, Fn Inputs 1.0/1.0 20 µA/−0.6 mA On Outputs 50/33.3 −1 mA/20 mA Function Table for 3-Input Gates Inputs Function Table for 2-Input Gates Output Inputs Output A0 B0 C0 D0 E0 F0 O0 A1 B1 C1 D1 O1 H H H X X X L H H X X L X X X H H H L X X H H All other combinations H = HIGH Voltage Level H L = LOW Voltage Level © 2000 Fairchild Semiconductor Corporation DS009468 All other combinations L H X = Immaterial www.fairchildsemi.com 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate April 1988 74F51 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Free Air Ambient Temperature Junction Temperature under Bias −55°C to +150°C Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to +7.0V VCC Pin Potential to Ground Pin Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. Current Applied to Output in LOW State (Max) twice the rated IOL (mA) DC Electrical Characteristics Symbol Parameter Min Typ Max VCC Input HIGH Voltage VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage −1.2 V Min V Min VOH 2.0 Units VIH Output HIGH Voltage VOL Output LOW 10% VCC 2.5 5% VCC 2.7 10% VCC Input HIGH Current IBVI Input HIGH Current Breakdown Test ICEX Output HIGH Leakage Current VID Input Leakage IOD Recognized as a LOW Signal IIN = −18 mA IOH = −1 mA 0.5 V Min IOL = 20 mA 5.0 µA Max VIN = 2.7V 7.0 µA Max VIN = 7.0V 50 µA Max VOUT = VCC V 0.0 3.75 µA 0.0 −0.6 mA Max VIN = 0.5V −150 mA Max VOUT = 0V 4.75 Test Recognized as a HIGH Signal IOH = −1 mA Voltage IIH Conditions V Output Leakage Circuit Current IID = 1.9 µA All other pins grounded VIOD = 150 mV All other pins grounded IIL Input LOW Current IOS Output Short-Circuit Current ICCH Power Supply Current 1.9 3.0 mA Max VO = HIGH ICCL Power Supply Current 5.3 8.5 mA Max VO = LOW −60 AC Electrical Characteristics Symbol Parameter TA = +25°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 50 pF Min Typ Max Min Max tPLH Propagation Delay 2.0 3.7 6.0 1.5 6.5 tPHL An, Bn, Cn, Dn, En, Fn to O n 1.0 2.6 4.0 1.0 4.5 www.fairchildsemi.com 2 Units ns 74F51 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow Package Number M14A 3 www.fairchildsemi.com 74F51 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D www.fairchildsemi.com 4 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com