Revised October 2000 74F521 8-Bit Identity Comparator General Description Features The 74F521 is an expandable 8-bit comparator. It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA=B also serves as an active LOW enable input. ■ Compares two 8-bit words in 6.5 ns typ ■ Expandable to any word length ■ 20-pin package Ordering Code: Order Number 74F521SC 74F521SJ 74F521MSA Package Number Package Description M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 74F521PC Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC © 2000 Fairchild Semiconductor Corporation DS009545 www.fairchildsemi.com 74F521 8-Bit Identity Comparator April 1988 74F521 Unit Loading/Fan Out U.L. Pin Names Description Input IIH/IIL HIGH/LOW Output IOH/IOL 20 µA/−0.6 mA A0–A7 Word A Inputs 1.0/1.0 B0–B7 Word B Inputs 1.0/1.0 20 µA/−0.6 mA IA=B Expansion or Enable Input (Active LOW) 1.0/1.0 20 µA/−0.6 mA OA=B Identity Output (Active LOW) 50/33.3 −1 mA/20 mA Truth Table Inputs Output IA = B A, B OA = B L A = B (Note 1) L L A≠B H H A = B (Note 1) H H A≠B H H = HIGH Voltage Level L = LOW Voltage Level Note 1: A0 = B0, A1 = B1, A2 = B2, etc. Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 Recommended Operating Conditions Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Free Air Ambient Temperature Junction Temperature under Bias −55°C to +150°C Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to +7.0V VCC Pin Potential to Ground Pin Input Voltage (Note 3) −0.5V to +7.0V Input Current (Note 3) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Note 2: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 3: Either voltage limit or current limit is sufficient to protect inputs. Current Applied to Output in LOW State (Max) twice the rated IOL (mA) DC Electrical Characteristics Symbol Parameter Min Typ Max Input HIGH Voltage VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage −1.2 V VOH Output HIGH Voltage VOL Output LOW 2.0 Units VIH 10% VCC 2.5 5% VCC 2.7 10% VCC Voltage IIH Input HIGH Current IBVI Input HIGH Current Breakdown Test ICEX Output HIGH Leakage Current VID Input Leakage Test IOD Output Leakage Input LOW Current IOS Output Short-Circuit Current ICCH Power Supply Current −60 21 3 Conditions Recognized as a HIGH Signal Recognized as a LOW Signal Min IIN = −18 mA IOH = −1 mA V Min 0.5 V Min IOL = 20 mA 5.0 µA Max VIN = 2.7V 7.0 µA Max VIN = 7.0V 50 µA Max VOUT = VCC V 0.0 3.75 µA 0.0 4.75 Circuit Current IIL VCC V IOH = −1 mA IID = 1.9 µA All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded −0.6 mA Max VIN = 0.5V −150 mA Max VOUT = 0V 32 mA Max VO = HIGH www.fairchildsemi.com 74F521 Absolute Maximum Ratings(Note 2) 74F521 AC Electrical Characteristics Symbol Parameter TA = +25°C TA = −55°C to +125°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 50 pF CL = 50 pF Min Typ Max Min Max Min Max tPLH Propagation Delay 3.0 7.0 10.0 3.0 14.0 3.0 11.0 tPHL An or Bn to OA=B 4.5 7.0 10.0 4.0 15.0 4.0 11.0 tPLH Propagation Delay 3.0 5.0 6.5 3.0 8.5 3.0 7.5 tPHL IA=B to OA=B 3.5 6.5 9.0 3.5 13.5 3.5 10.0 Units ns ns Applications Ripple Expansion Parallel Expansion www.fairchildsemi.com 4 74F521 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com 74F521 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 6 74F521 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide Package Number MSA20 7 www.fairchildsemi.com 74F521 8-Bit Identity Comparator Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 8