ETC IMI145151YB

IMI145151
FREQUENCY SYNTHESIZER
CMOS LSI
PARALLEL PROGRAMMED PLL FREQUENCY SYNTHESIZER
PRODUCT DESCRIPTION
PRODUCT FEATURES
The IMI145151 is a member of a family of phaselock loop synthesizer
ICs from International Microcircuits. The IMI145151 is an improved
version of the Motorola MC145151 and will provide a synthesizer with
noticeably improved performance.
The IMI145151 is programmed with parallel input data lines. Since it
does not require a microcontroller as serial and bus programmed units
do, the IMI145151 is an excellent choice for synthesizers requiring
independence from digital controllers. Such applications include fixed
local oscillator signals, whose tuning never changes, and signal sources,
which have few operating frequencies.
Blocks in the IMI145151 include a programmable feedback divider, a
reference divider, phase detector, and charge pump. The reference
divider is programmed by three select lines to one of eight ROM
encoded values. Both counter inputs are biased for maximum sensitivity
to sinewave input signals. The reference divider input is also configured
to operate as a crystal oscillator if desired.
„
>200 Mhz typical input frequency.
„
-163 dBc/Hz total phase noise floor.
„
No dead zone, by design.
„
Unambiguous PLL acquisition.
„
The IMI145151 has a Type IV phase frequency detector which has
eliminated by the design the inherent dead zone which causes crossover
distortion at the critical center lock point. the IMI circuitry enables
consistent low noise loop designs using the simple single ended charge
pump output. Differential charge pump outputs are also provided for
those who require a more sophisticated differential active loop filter
design.
Performance improvements are in the operating bandwidth and phase
detector noise floor. With its extremely low phase noise foor and wider
input bandwith, prescaler ratios can be minimized to allow wide loop
bandwidths for faster settling and lower phase noise.
8 user-selectable reference divider ratios: 8, 128,
256, 512, 1024, 2048, 2410, 8192.
„
Lock detect signal.
„
14 bit N counter. Divider range = 3 to 16383.
„
On- or off-chip reference oscillator operation.
„
3-volt and 5-volt characterizations.
BLOCK DIAGRAM
RA0
5
RA1
6
RA2
7
OSCin
OSCout
Fin
T/R
VDD = Pin 3
VSS = Pin 2
14x8 ROM Reference
Decoder
Lock
Detect
28
LD
4
PDout
9
PHIV
PHIR
14 bit /8 Counter
27
Phase
Detector A
26
14 bit /N Counter
1
Phase
Detector B
Transmit Offset Adder
21
8
10
23
N13
22
N12
25
24
N11 N10
20
19
N9
N8
18
N7
17
16
N6
N5
15
N4
14
N3
13
12
N2
N1
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 276 FAX 408-263-6571
11
N0
fv
NOTE: N0 through N13 inputs have
pullup resistors not shown.
Rev 2.0
9/9/97
Page 1 of 7
IMI145151
FREQUENCY SYNTHESIZER
CMOS LSI
PARALLEL PROGRAMMED PLL FREQUENCY SYNTHESIZER
PIN DESCRIPTIONS
Pin No.
Name
Description
1
Fin
2
3
4
Vss
Vdd
Pdout
5
6
7
RA0
RA1
RA2
8
9
10
11
12
13
14
15
16
17
18
19
20
21
PHIR
PHIV
fv
N0
N1
N2
N3
N4
N5
N6
N7
N8
N9
T/R
22
23
24
25
26
27
28
N12
N13
N10
N11
OSCout
OSCin
LD
RF input signal. Applied to both the N and A counters. This signal is intended to be AC
coupled for low level sinewave input signals. For CMOS logic level input signals, DC
coupling can be used.
Circuit ground.
Circuit-positive power supply.
Single-ended charge pump output, usually used with passive loop filters. This signal
operates according to the following:
„ Frequency fv>fr at the phase detector: negative pulses.
„ Frequency fv<fr at the phase detector: positive pulses.
„ Frequency fv = fr at the phase detector: high-impedance state.
The three reference divisor ratio select pins. Pull-up resistors are included on each of
these pins to insure that, if left unconnected, they will remain at a logic ONE.
The reference divider ratio is set according to the following table:
RA2
RA1
RA0
Reference Divider Ratio
0
0
0
8
0
0
1
128
0
1
0
256
0
1
1
512
1
0
0
1024
1
0
1
2048
1
1
0
2410
1
1
1
8192
Phase detector output. This signal goes LOW when the feedback frequency is too low.
Phase detector output. This signal goes LOW when the feedback frequency is too high.
Output of the feedback divider.
LSB of the N counter programming input bits. Pull-up resistor included.
LSB+1 of the N counter programming input bits. Pull-up resitor included.
LSB+2 of the N counter programming input bits. Pull-up resitor included.
LSB+3 of the N counter programming input bits. Pull-up resitor included.
LSB+4 of the N counter programming input bits. Pull-up resitor included.
LSB+5 of the N counter programming input bits. Pull-up resitor included.
LSB+6 of the N counter programming input bits. Pull-up resitor included.
LSB+7 of the N counter programming input bits. Pull-up resitor included.
LSB+8 of the N counter programming input bits. Pull-up resitor included.
LSB+9 of the N counter programming input bits. Pull-up resitor included.
This input control an offset that can be added to the programming inputs. Thisoffset is
fixed at 856 when T/R is low. When T/R is high, there is no offset added. A pull-up
resistor is included.
LSB+12 of the N counter programming input bits. Pull-up resitor included.
LSB+13 of the N counter programming input bits. Pull-up resitor included.
LSB+10 of the N counter programming input bits. Pull-up resitor included.
LSB+11 of the N counter programming input bits. Pull-up resitor included.
Reference signal output or output of the oscillator inverter.
AC-coupled reference signal input or input to the oscillator inverter.
Lock detect output. When the PLL is locked, this signal will be essentially HIGH, with very
narrow negative spikes at the phase detection frequency. If the PLL is out of lock, this
signal will pusle LOW.
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 276 FAX 408-263-6571
Rev 2.0
9/9/97
Page 2 of 7
IMI145151
FREQUENCY SYNTHESIZER
CMOS LSI
PARALLEL PROGRAMMED PLL FREQUENCY SYNTHESIZER
MAXIMUM RATINGS
Voltage Relative to VSS:
-0.3V to 7V
Voltage Relative to VDD:
0.3V
Storage Temperature:
-65°C to 150°C
Ambient Temperature:
-55°C to 125°C
This device contains circuitry to protect the inputs
against damage due to high static voltages or electric
field; however, precaustions should be taken to avoid
application of any voltage higher than the maximum
rated voltages to this circuit. For proper operation, Vin
and Vout should be constrained to the range:
Vss<(Vin or Vout)<VDD
Unused inputs must always be tied to an appropriate
logic voltage level (either Vss or VDD).
PLL OPERATING CHARACTERISTICS
VDD = 5 VOLTS
-40°C
Characteristic
Operating
Frequency
25°C
70°C
85°C
Min
Max
Min
Max
Min
Typ
Max
Min
Max
Min
Max
Unit
Sin
210
-
200
-
200
250
-
180
-
180
-
MHz
Square
210
-
200
-
200
250
-
180
-
180
-
MHz
Symbol
Fin
0°C
Fosc
Dynamic
Synthesizer
Phase Noise
Floor
Pin
Capacitance
Input
Voltages
Output
Voltages
Static
Output
Current
MHz
PDNF
Cin
Cout
VIL
VIH
VOL
VOH
IOL
IOH
-160
Logic
OSCout
Logic
OSCout
1
3.5
4.95
2.4
1.2
-2.4
-1.2
10
10
1.5
0.05
-
3.5
4.95
1.5
0.05
-
3.5
4.95
2.0
1.0
-2.0
-1.0
Charge Pump
Current
Supply
Currents
IDD
ISB
IPU
Conditions
-
150
-
6
6
2.75
2.75
0.0
5.0
2.8
1.4
-2.8
-1.4
12.4
40
50
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 276 FAX 408-263-6571
10
10
1.5
0.05
-
3.5
4.95
1.5
.05
-
150
3.5
4.95
1.6
0.8
-1.6
-0.8
-
Rev 2.0
10
10
1.5
0.05
-
150
dBc/
Hz
pF
pF
Vdc
Vdc
Vdc
Vdc
VOL = 0.40
mA
mA
mA
mA
VOH = 4.0
VOH = 4.0
Vdd = 5.0V
mA
uA
uA
Fosc=Fin=
10 MHz
Fosc=Fin=0
VIL = 0
9/9/97
Page 3 of 7
IMI145151
FREQUENCY SYNTHESIZER
CMOS LSI
PARALLEL PROGRAMMED PLL FREQUENCY SYNTHESIZER
PLL OPERATING CHARACTERISTICS
VDD = 3 VOLTS
-40°C
Characteristic
70°C
85°C
Max
Min
Max
Min
Typ
Max
Min
Max
Min
Max
Unit
Sin
160
-
140
-
130
150
-
120
-
110
-
MHz
Square
160
-
140
-
130
150
-
120
-
110
-
MHz
Fin
Frequency
25°C
Min
Symbol
Operating
0°C
Fosc
Dynamic
Synthesizer
Phase Noise
Floor
Pin
Capacitance
Input
Voltages
Output
Voltages
Static
MHz
PDNF
-155
Cin
Cout
VIL
VIH
VOL
VOH
IOL
Output
Current
Logic
OSCout
Logic
OSCout
IOH
2.1
2.95
1.6
0.8
-1.6
-0.8
10
10
0.9
0.05
-
2.95
0.05
-
2.1
2.95
1.4
0.7
-1.4
-0.7
Charge Pump
Current
Supply
Currents
IDD
ISB
IPU
-
150
-
6
6
1.35
1.65
0.0
3.0
2.0
1.0
-1.0
-1.0
5.0
10
10
0.9
0.05
-
40
30
2.95
.05
-
150
5 VDC Input Sensitivity vs. Temp
2.1
2.95
0.8
0.4
-0.8
-0.4
-
10
10
0.9
0.05
-
150
dBc/
Hz
pF
pF
Vdc
Vdc
Vdc
Vdc
VOL = 0.30
mA
mA
mA
mA
VOH = 2.4
VOH = 2.4
Vdd = 3.0V
mA
uA
uA
Fosc=Fin=
10 MHz
Fosc=Fin=0
VIL = 0
3 VDC Input Sensitivity vs. Temp
20
5
10
0
-10
+85C
-20
+25C
-30
-40C
dBm (50 ohms)
dBm (50 ohms)
Conditions
0
-5
-10
-15
+85C
-20
+25C
-40C
-25
190
170
150
130
90
110
70
50
30
10
-40
0
50
150
200
MHz
MHz
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 276 FAX 408-263-6571
100
Rev 2.0
9/9/97
Page 4 of 7
IMI145151
FREQUENCY SYNTHESIZER
CMOS LSI
PARALLEL PROGRAMMED PLL FREQUENCY SYNTHESIZER
IDDvs VDD
Power Consumption vs. Frequency
Fin = OSCin = 10MHz
6
2.5
5
2
4
IDD (mA)
IDD (mA)
1.5
1
5 VDC
3
3 VDC
2
0.5
-40c
1
25c
0
3¸
4
5
6
7
85c
0
0
10
30
20
40
VDD
Operating Frequency (MHz)
PHASE NOISE FLOOR
152/HP 10811A Ref vs 8662 Loop/Residual Noise @ 145 MHZ
(hp) 3018R Carrier: 145.E+6 Hz 8 Nov 1994 13:07:47 - 13:16:37
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-120
-130
-140
-150
-160
-160
-170
Fosc = 1 Mhz
Fref = 125 Khz
fin = 145 Mhz
N = 1160
10
100
1K
10K
100K
1M
10M
Measured floor @ 500 Hz = -102 dBc/Hz
-20 log (N)
= - 61 dB
- 163 dBc/Hz
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 276 FAX 408-263-6571
Rev 2.0
9/9/97
Page 5 of 7
IMI145151
FREQUENCY SYNTHESIZER
CMOS LSI
PARALLEL PROGRAMMED PLL FREQUENCY SYNTHESIZER
CONNECTION DIAGRAMS
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 276 FAX 408-263-6571
N11
N10
N13
N12
T/R
N9
N8
24
23
22
21
20
19
N4
Vss
2
14
N3
VDD
3
13
N2
PDout
4
12
N1
Rev 2.0
11
15
N0
1
10
N5
Fin
Fv
16
9
28
PHIV
N6
LD
8
N7
17
PHIR
18
27
7
26
OSCin
RA2
Pin No. 1
Index
OSCout
6
LD
OSCin
OSCout
N11
N10
N13
N12
T/R
N9
N8
N7
N6
N5
N4
RA1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
RA0
fin
Vss
VDD
Pdout
RA0
RA1
RA2
PHIR
PHIV
fv
N0
N1
N2
N3
25
PLCC PACKAGE
SSOP, SOIC AND PDIP PACKAGES
9/9/97
Page 6 of 7
IMI145151
FREQUENCY SYNTHESIZER
CMOS LSI
PARALLEL PROGRAMMED PLL FREQUENCY SYNTHESIZER
ORDERING INFORMATION
Part Number
Package Type
Production Flow
IMI145151xPB
Plastic Dip
Commercial, 0°C to +70°C
IMI145151xXB
SOIC
Commercial, 0°C to +70°C
IMI145151xYB
SSOP
Commercial, 0°C to +70°C
IMI145151xQB
PLCC
Commercial, 0°C to +70°C
*Please contact factory for other options.
NOTE: The “x” following the IMI Device Number denotes the device revision. The ordering part number is formed by a
combinationof device number, device revision, package style, and screening as shown below.
Marking:
Example:
IMI
145151xPB
Date Code, Lot #
IMI145151xPB
Flow
B = Commercial, 0C to + 70C
Package
P = Plastic Dip
X = Small Outline
Y = SSOP
Q = PLCC
Revision
IMI Device Number
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 276 FAX 408-263-6571
Rev 2.0
9/9/97
Page 7 of 7