NLAST4501 Analog Switch The NLAST4501 is an analog switch manufactured in sub–micron silicon–gate CMOS technology. It achieves very low RON while maintaining extremely low power dissipation. The device is a bilateral switch suitable for switching either analog or digital signals, which may vary from zero to full supply voltage. The NLAST4501 is a low voltage, TTL (low threshold) compatible device, pin for pin compatible with the MAX4501. The Enable pin is compatible with standard TTL level outputs when supply voltage is nominal 5.0 Volts. It is also over–voltage tolerant, making it a very useful logic level translator. • • • • • http://onsemi.com MARKING DIAGRAMS Guaranteed RON of 32 at 5.5 V VEd Low Power Dissipation: ICC = 2 A SC–88A / SOT–353/SC–70 DF SUFFIX CASE 419A Low Threshold Enable pin TTL compatible at 5.0 Volts TTL version and pin for pin with NLAS4501 Provides Voltage translation for many different voltage levels 3.3 to 5.0 Volts, Enable pin may go as high as 5.5 Volts 1.8 to 3.3 Volts 1.8 to 2.5 Volts Improved version of MAX4501 (at any voltage between 2 and 5.5 Volts) • • Chip Complexity: FETs = 11 Pin 1 d = Date Code VEd TSOP–5/SOT–23/SC–59 DT SUFFIX CASE 483 Pin 1 d = Date Code PIN ASSIGNMENT COM 1 NO 2 GND 3 5 4 V+ Pin Function 1 COM 2 NO 3 GND 4 Enable 5 VCC IN FUNCTION TABLE Figure 1. Pinout (Top View) On/Off Enable Input State of Analog Switch L H Off On ORDERING INFORMATION See detailed ordering and shipping information on page 6 of this data sheet. Semiconductor Components Industries, LLC, 2001 May, 2001 – Rev. 0 1 Publication Order Number: NLAST4501/D NLAST4501 MAXIMUM RATINGS (Note 1) Symbol Parameter Value Unit VCC Positive DC Supply Voltage 0.5 to 7.0 V VIN Digital Input Voltage (Enable) 0.5 to 7.0 V VIS Analog Output Voltage (VNO or VCOM) IIK DC Current, Into or Out of Any Pin TSTG Storage Temperature Range TL Lead Temperature, 1 mm from Case for 10 Seconds TJ Junction Temperature under Bias JA Thermal Resistance PD Power Dissipation in Still Air at 85C MSL Moisture Sensitivity FR Flammability Rating VESD ESD Withstand Voltage Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) > 2000 > 100 N/A V ILatch–Up Latch–Up Performance Above VCC and Below GND at 85C (Note 5) 300 mA 0.5 to VCC 0.5 V 20 mA 65 to 150 C 260 C 150 C SC–88 TSOP–5 112 148 C/W SC–88 TSOP–5 500 450 mW Level 1 Oxygen Index: 30% – 35% UL–94–VO (0.125 in) 1. Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Extended exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum–rated conditions is not implied. 2. Tested to EIA/JESD22–A114–A. 3. Tested to EIA/JESD22–A115–A. 4. Tested to JESD22–C101–A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 2.0 5.5 V VCC Positive DC Supply Voltage VIN Digital Input Voltage (Enable) GND 5.5 V VIO Static or Dynamic Voltage Across an Off Switch GND VCC V VIS Analog Input Voltage (NO, COM) GND VCC V TA Operating Temperature Range, All Package Types 55 125 C tr, tf Input Rise or Fall Time, (Enable Input) 0 0 100 20 ns/V Vcc = 3.3 V 0.3 V Vcc = 5.0 V 0.5 V 90 419,300 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 TJ = 80C 117.8 TJ = 90C 1,032,200 TJ = 100C 80 TJ = 110C Time, Years TJ = 120C Time, Hours FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 130C Junction Temperature °C NORMALIZED FAILURE RATE DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES 1 1 10 100 1000 TIME, YEARS Figure 2. Failure Rate vs. Time Junction Temperature http://onsemi.com 2 NLAST4501 DC CHARACTERISTICS – Digital Section (Voltages Referenced to GND) Guaranteed Max Limit Symbol VIH VIL Parameter VCC 55C to 25C 85C 125C Unit 3.0 1.4 1.4 1.4 V 4.5 2.0 2.0 2.0 5.5 2.0 2.0 2.0 3.0 0.53 0.53 0.53 4.5 0.8 0.8 0.8 5.5 0.8 0.8 0.8 0 V to 5.5 V 0.1 1.0 1.0 A 5.5 1.0 1.0 2.0 A Condition Minimum High–Level Input Voltage, Enable Inputs Maximum Low–Level Input Voltage, Enable Inputs IIN Maximum Input Leakage Current, Enable Inputs VIN = 5.5 V or GND ICC Maximum Quiescent Supply Current (per package) Enable and VIS = VCC or GND V DC ELECTRICAL CHARACTERISTICS – Analog Section Guaranteed Max Limit Symbol RON Parameter VCC 55C to 25C 85C 125C Unit VIN = VIH VIS = VCC to GND IIsI = 10.0 mA 3.0 45 50 55 4.5 30 35 40 5.5 25 30 35 Condition Maximum ON Resistance (Figures 8 – 12) RFLAT(ON) ON Resistance Flatness VIN = VIH IIsI = 10.0 mA VIS = 1 V, 2 V, 3.5 V 4.5 4 4 5 INO(OFF) NO Off Leakage Current (Figure 3) VIN = VIL VNO = 1.0 V or 4.5 V VCOM = 4.5 V or 1.0 V 5.5 1 10 100 nA ICOM(OFF) COM Off Leakage Current (Figure 3) VIN = VIL VNO = 4.5 V or 1.0 V VCOM = 1.0 V or 4.5 V 5.5 1 10 100 nA AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) Guaranteed Max Limit 55C to 25C VCC Symbol tON tOFF Parameter Turn–On Time Turn–Off Time Min Typ 125C Test Conditions (V) Typ Max Max Unit RL = 300 CL = 35 pF (Figures 4, 5, and 13) 2.0 7.0 14 16 16 ns 3.0 5.0 10 12 12 4.5 4.5 9 11 11 5.5 4.5 9 11 11 2.0 11.0 22 24 24 3.0 7.0 14 16 16 4.5 5.0 10 12 12 5.5 5.0 10 12 12 RL = 300 CL = 35 pF (Figures 4, 5, and 13) Min 85C Max Min Typ ns Typical @ 25, VCC = 5.0 V CIN CNO or CNC CCOM(OFF) CCOM(ON) Maximum Input Capacitance, Select Input Analog I/O (switch off) Common I/O (switch off) Feedthrough (switch on) 8 10 10 20 http://onsemi.com 3 pF NLAST4501 ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted) BW VONL VISO Q THD Limit V 25°C Unit VIS = 0 dBm VIS centered between VCC and GND (Figures 6 and 14) 3.0 190 MHz 4.5 200 5.5 220 VIS = 0 dBm @ 10 kHz VIS centered between VCC and GND (Figure 6) 3.0 2 4.5 2 5.5 2 f = 100 kHz; VIS = 1 V RMS VIS centered between VCC and GND (Figures 6 and 15) 3.0 93 dB Charge Injection Enable Input to Common I/O VIS = VCC to GND, FIS = 20 kHz tr = tf = 3 ns RIS = 0 , CL = 1000 pF Q = CL * VOUT (Figures 7 and 16) 3.0 1.5 pC 5.5 3.0 Total Harmonic Distortion THD Noise FIS = 20 Hz to 1 MHz, RL = Rgen = 600 , CL = 50 pF VIS = 3.0 VPP sine wave VIS = 5.0 VPP sine wave (Figure 17) 3.3 0.3 5.5 0.15 Parameter Condition Maximum On–Channel –3dB Bandwidth or Minimum Frequency Response Maximum Feedthrough On Loss Off–Channel Isolation 1.00E+05 1.00E+04 1.00E+03 1.00E+02 LEAKAGE (pA) Symbol VCC 1.00E+01 ICOM(ON) 1.00E+00 1.00E–01 1.00E–02 1.00E–03 ICOM(OFF) 1.00E–04 1.00E–05 INO(OFF) 1.00E–06 1.00E–07 –55 –35 –15 5 25 45 65 85 105 125 145 TEMPERATURE (C) Figure 3. Switch Leakage vs. Temperature http://onsemi.com 4 dB 4.5 5.5 % NLAST4501 VCC DUT VCC Input NO 50% 50% 0V COM VOUT 0.1 F 300 VOH 35 pF 90% 90% Output VOL Input tON tOFF Figure 4. tON/tOFF VCC VCC Input DUT 300 NO 50% 50% 0V COM VOUT VOH 35 pF Output Input tOFF Figure 5. tON/tOFF http://onsemi.com 5 10% 10% VOL tON NLAST4501 DUT Reference Transmitted COM NO 50 Generator 50 Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction. VVOUT for VIN at 100 kHz IN VOUT for VIN at 100 kHz to 50 MHz VONL = On Channel Loss = 20 Log VIN VISO = Off Channel Isolation = 20 Log Bandwidth (BW) = the frequency 3 dB below VONL Figure 6. Off Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/VONL DUT NO VCC VIN COM GND CL Output Off VIN Figure 7. Charge Injection: (Q) http://onsemi.com 6 On Off ∆VOUT NLAST4501 80 80 70 70 60 VCC = 2.0 50 50 RON (Ω) RON (Ω) 60 40 VCC = 2.5 30 –55°C 30 25°C VCC = 3.0 20 40 20 85°C VCC = 4.5 10 10 0 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 125°C 0 5 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 VCOM (VOLTS) VIS (VOLTS) Figure 8. RON vs. VCOM and VCC (@25C) Figure 9. RON vs. VCOM and Temperature, VCC = 2.0 V 45 2 30 40 20 25 RON (Ω) RON (Ω) 30 –55°C 20 25°C 15 10 15 125°C 25°C 85°C 10 85°C 5 125°C 5 0 –55°C 25 35 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 0 2.2 2.4 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 VCOM (VOLTS) VCOM (VOLTS) Figure 10. RON vs. VCOM and Temperature, VCC = 2.5 V Figure 11. RON vs. VCOM and Temperature, VCC = 3.0 V 3 35.0 18 30.0 16 –55°C 25°C 25.0 12 TIME (nS) RON (Ω) 14 85°C 10 8 15.0 4 5.0 2 0.0 2.0 0 tON 10.0 125°C 6 20.0 tOFF 0 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2 3.6 4 4.4 3.0 4.5 5.0 5.5 VCC (V) VCOM (VOLTS) Figure 12. RON vs. VCOM and Temperature, VCC = 4.5 V Figure 13. Switching Time vs. Supply Voltage, T = 25C http://onsemi.com 7 NLAST4501 0 0 BANDWIDTH (dB/Div) 5 VCC = 5.0 V TA = 25°C 10 100 1 10 OFF ISOLATION (dB/Div) 0 Phase (Degrees) PHASE (Degrees) Bandwidth (On – Loss) 10 –50 VCC = 5.0 V TA = 25°C –100 10 100 300 100 FREQUENCY (MHz) 1 10 100 300 FREQUENCY (MHz) Figure 14. ON Channel Bandwidth and Phase Shift Over Frequency Figure 15. Off Channel Isolation 100 1.60 1.40 10 VCC = 5.0 V 1.20 0.80 THD (%) Q (pC) 1.00 VCC = 3.0 V 1 3.3 V 0.60 0.1 0.40 5.5 V 0.20 0.00 0.0 0.01 1.0 2.0 3.6 3.0 VCOM (V) 4.0 4.5 10 5.0 100 1000 10000 100000 FREQUENCY (Hz) Figure 16. Charge Injection vs. VCOM Figure 17. THD vs. Frequency http://onsemi.com 8 1000000 NLAST4501 DEVICE ORDERING INFORMATION Device Nomenclature Circuit Indicator Temp Range Identifier NLAST4501DFT2 NLAS NLAST4501DTT1 NLAS Device Order Number Technology Device Function Package Suffix Tape & Reel Suffix Package Type (Name/SOT#/ Common Name) 74 VHC1G 66 DF T2 SC–88A/ SOT–353/ SC–70 178 mm (7 in) 3000 Unit 74 VHC1G 66 DT T1 TSOPS/ SOT–23/ SC–59 178 mm (7 in) 3000 Unit http://onsemi.com 9 Tape & Reel Size NLAST4501 P0 K t 10 PITCHES CUMULATIVE TOLERANCE ON TAPE 0.2 mm (0.008 in) P2 D TOP COVER TAPE E A0 SEE NOTE 7 + K0 SEE NOTE 7 B1 F + B0 W + D1 FOR COMPONENTS 2.0 mm 1.2 mm AND LARGER P EMBOSSMENT FOR MACHINE REFERENCE ONLY INCLUDING DRAFT AND RADII CONCENTRIC AROUND B0 CENTER LINES OF CAVITY USER DIRECTION OF FEED *TOP COVER TAPE THICKNESS (t1) 0.10 mm (0.004 in) MAX R MIN TAPE AND COMPONENTS SHALL PASS AROUND RADIUS “R” WITHOUT DAMAGE EMBOSSED CARRIER BENDING RADIUS 100 mm (3.937 in) MAXIMUM COMPONENT ROTATION 10° EMBOSSMENT 1 mm MAX TYPICAL COMPONENT CAVITY CENTER LINE TAPE 1 mm (0.039 in) MAX TYPICAL COMPONENT CENTER LINE 250 mm (9.843 in) CAMBER (TOP VIEW) ALLOWABLE CAMBER TO BE 1 mm/100 mm NONACCUMULATIVE OVER 250 mm Figure 18. Carrier Tape Specifications EMBOSSED CARRIER DIMENSIONS (See Notes 6 and 7) Tape Size 8 mm B1 Max D D1 E 4.35 mm 1.5 0.1/ 0.0 mm 1.0 mm Min 1.75 3.5 2.4 mm 4.0 4.0 2.0 25 mm 0.3 8.0 0.1 mm 0.5 mm (0.094 in) 0.10 mm 0.1 mm 0.1 mm (0.98 in) 0.05 mm 0.3 mm (0.059 (0.039 in) (0.171 in) 0.004/ 0.0 in) F K P P0 P2 R T W (0.069 (1.38 (0.157 (0.156 (0.079 (0.01 (0.315 0.004 in) 0.002 in) 0.004 in) 0.004 in) 0.002 in) 0.0038/ 0.0002 in) 0.012 in) 6. Metric Dimensions Govern–English are in parentheses for reference only. 7. A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min to 0.50 mm max. The component cannot rotate more than 10° within the determined cavity. http://onsemi.com 10 NLAST4501 t MAX 1.5 mm MIN (0.06 in) A 13.0 mm 0.2 mm (0.512 in 0.008 in) 50 mm MIN (1.969 in) 20.2 mm MIN (0.795 in) FULL RADIUS G Figure 19. Reel Dimensions REEL DIMENSIONS Tape Size T&R Suffix A Max 8 mm T1, T2 178 mm (7 in) G t Max 8.4 mm, +1.5 mm, –0.0 14.4 mm (0.56 in) (0.33 in + 0.059 in, –0.0) DIRECTION OF FEED BARCODE LABEL POCKET Figure 20. Reel Winding Direction http://onsemi.com 11 HOLE NLAST4501 CAVITY TAPE TOP TAPE TAPE TRAILER (Connected to Reel Hub) NO COMPONENTS 160 mm MIN COMPONENTS DIRECTION OF FEED Figure 21. Tape Ends for Finished Goods “T2” PIN ONE AWAY FROM SPROCKET HOLE User Direction of Feed Figure 22. DFT2 (SC88A) Reel Configuration/Orientation “T1” PIN ONE AWAY FROM SPROCKET HOLE User Direction of Feed Figure 23. DTT1 (TSOP5) Reel Configuration/Orientation http://onsemi.com 12 TAPE LEADER NO COMPONENTS 400 mm MIN NLAST4501 PACKAGE DIMENSIONS SC–88A/SOT–353/SC–70 DF SUFFIX 5–LEAD PACKAGE CASE 419A–01 ISSUE E A G NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. V 5 DIM A B C D G H J K N S V 4 –B– S 1 2 3 D 5 PL 0.2 (0.008) M B M N INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 0.012 0.016 J C K H ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ 1.9 mm http://onsemi.com 13 0.65 mm 0.65 mm 0.4 mm (min) 0.5 mm (min) MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 0.30 0.40 NLAST4501 PACKAGE DIMENSIONS TSOP–5/SOT–23/SC–59 DT SUFFIX 5–LEAD PACKAGE CASE 483–01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. D S 5 4 1 2 3 B L DIM A B C D G H J K L M S G A J C 0.05 (0.002) H M K ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ 0.094 2.4 0.037 0.95 0.074 1.9 0.037 0.95 ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ 0.039 1.0 http://onsemi.com 14 MILLIMETERS MIN MAX 2.90 3.10 1.30 1.70 0.90 1.10 0.25 0.50 0.85 1.00 0.013 0.100 0.10 0.26 0.20 0.60 1.25 1.55 0 10 2.50 3.00 0.028 0.7 inches mm INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0 10 0.0985 0.1181 NLAST4501 Notes http://onsemi.com 15 NLAST4501 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: [email protected] Fax Response Line: 303–675–2167 or 800–344–3810 Toll Free USA/Canada N. American Technical Support: 800–282–9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor – European Support German Phone: (+1) 303–308–7140 (Mon–Fri 2:30pm to 7:00pm CET) Email: ONlit–[email protected] French Phone: (+1) 303–308–7141 (Mon–Fri 2:00pm to 7:00pm CET) Email: ONlit–[email protected] English Phone: (+1) 303–308–7142 (Mon–Fri 12:00pm to 5:00pm GMT) Email: [email protected] CENTRAL/SOUTH AMERICA: Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST) Email: ONlit–[email protected] Toll–Free from Mexico: Dial 01–800–288–2872 for Access – then Dial 866–297–9322 ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support Phone: 1–303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001–800–4422–3781 Email: ONlit–[email protected] JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone: 81–3–5740–2700 Email: [email protected] ON Semiconductor Website: http://onsemi.com EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781 *Available from Germany, France, Italy, UK, Ireland For additional information, please contact your local Sales Representative. http://onsemi.com 16 NLAST4501/D