a High Speed Active Load with Inhibit Mode AD53041 FUNCTIONAL BLOCK DIAGRAM FEATURES ⴞ50 mA Voltage Programmable Current Range Three Selectable Gain Ranges 1.7 ns Propagation Delay Inhibit Mode Function High Speed Differential Inputs for Maximum Flexibility Ultrasmall 20-Lead PSOP Package with Built-In Heatsink GAINA VOLTAGE-TO-CURRENT CONVERTER GAINB IOLPGM IOLOUT INH APPLICATIONS Automatic Test Equipment Semiconductor Test Systems Board Test Systems IOLRTN IOHRTN INH IOHOUT IOHPGM AD53041 PRODUCT DESCRIPTION The AD53041 is a complete, high speed, current switching load designed for use in linear, digital or mixed signal test systems. Combining a high speed monolithic process with a unique surface mount package, this product attains superb electrical performance while preserving optimum packaging densities in an ultrasmall 20-lead, PSOP package with a built-in heatsink. Featuring current programmability of up to ± 50 mA, the AD53041 is designed to force the device under test to source or sink the programmed IOH and IOL currents. IOH and IOL currents are determined by applying a corresponding voltage (5 V = 50 mA, 16 mA, 5 mA) to the IOHPGM and IOLPGM pins. The voltage-to-current conversion is performed within the AD53041, thus allowing the current levels to be set by a standard voltage out digital-to-analog converter. The AD53041 transition from IOH to IOL occurs when the output voltage of the device under test slews above or below the programmed threshold or commutation voltage. The commutation voltage is programmable from –2 V to +7 V, covering the large spectrum of logic devices while able to support the large current specifications (48 mA) typically associated with line drivers. To test I/O devices, the active load can be switched into a high impedance state (Inhibit Mode), electrically removing the active load from the path through the Inhibit Mode feature. The active load leakage current in Inhibit is typically 100 nA. The Inhibit input circuitry is implemented using high speed differential inputs with a common-mode voltage range of –2 V to +3 V and a maximum differential voltage of 3 V. This allows for direct interface to precision differential ECL timing or the simplicity of switching active load from a single ended TTL or CMOS logic source. With switching speeds from IOH or IOL into Inhibit of less than 2.0 ns, the AD53041 can be electrically removed from the signal path “on the fly.” VOLTAGE-TO-CURRENT CONVERTER VCOMIN VCOMOUT VCOM BUFFER OUT_SENSE GAINA 0 0 1 1 GAINB 0 1 0 1 FULL-SCALE CURRENT 50mA 16mA 5mA NOT VALID The AD53041 is available in a 20-lead, PSOP package with a built-in-heatsink and is specified to operate over the ambient commercial temperature range from –25°C to +85°C. INH VCC AD53041 INH AGND VCOMIN TO DUT VCOMOUT OUT_SENSE 1Ω 0.1F GAINA GAINB VEE 0.1F IOLOUT IOHPGM IOLPGM 0.1F IOHOUT GND HSMS-2818 OR EQUIV. IOLRTN IOHRTN NOT SHOWN: THE AGND PINS ARE THE HIGH QUALITY GROUND REFERENCE FOR THE VOLTAGE-TO-CURRENT CONVERTERS. THE GND PINS PROVIDE RETURN PATHS FOR INTERNAL CURRENTS. VCC IS THE POSITIVE SUPPLY, VEE IS THE NEGATIVE SUPPLY. ALL GROUND PINS SHOULD BE CONNECTED TO THE SYSTEM ANALOG GROUND PLANE. Figure 1. Typical Application Circuit REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1998 (All specifications apply at T = +85ⴗC ⴞ 5ⴗC. +V = +10.5 V ⴞ 3%, –V = AD53041–SPECIFICATIONS –5.2 V ⴞ 3% unless otherwise specified. V is bypassed to ground with a series RC consisting of a 1 ⍀ resistor and a 0.1 F capacitor, J S S COMOUT and is also connected directly to OUT_SENSE. All temperature coefficients are characterized over TJ = 75ⴗC–95ⴗC.) Parameter INPUT CHARACTERISTICS INH, INH Input Voltage Bias Current GAINA, GAINB Input Voltage Bias Current IOHPGM, IOLPGM Voltage Range IOH, 0 to + Full Scale, Any Gain Range IOL, 0 to – Full Scale, Any Gain Range IOHPGM, IOLPGM Bias Current VCOM BUFFER Voltage Range Offset Offset Drift Nonlinearity Input Bias Current Output Resistance OUTPUT CHARACTERISTICS Full-Scale Current Range Range 0 Range 1 Range 2 Offset Error Range 0 Range 1 Range 2 Offset Drift Range 0 Range 1 Range 2 Gain Error Range 0 Range 1 Range 2 Gain Drift Range 0 Range 1 Range 2 Gain Ratio Drift Range 1 to Range 0 Range 2 to Range 0 Nonlinearity Common-Mode Error PSRR OUTPUT VOLTAGE RANGE IOHOUT, IOHRTN IOLOUT, IOLRTN Min Typ Max Units Test Conditions –2 –1 ECL 0 1 V mA INH, INH = –2 V, 0 V 0 0 TTL/CMOS 5 2 V mA GAINA, GAINB = 5 V 5.2 5.2 300 V V µA V(IOHOUT) = –2 V, 7 V V(IOLOUT) = –2 V, 7 V V(IOHPGM) = +5 V, V(IOLPGM) = 0 V 7 <1 V mV mV/°C mV µA Ω ± 50 mA Output Current VCOM = 0 V VCOM = 0 V VCOM = –2 V to 7 V VCOM = –2 V to 7 V VCOM = 0 V, IOUT = ± 50 mA 50 16 5 mA mA mA –0.1 –0.1 –300 –2 ±5 0.1 ±5 –50 50 See Functional Block Diagram –1 –0.3 –0.3 1 0.3 0.3 mA mA mA 1 1 1 µA/°C µA/°C µA/°C <1 <5 <8 % FSR % FSR % FSR 1 0.5 0.3 µA/°C µA/°C µA/°C 0.01 0.01 ± 0.05 ± 0.05 ± 0.1 %/°C %/°C % FSR %FSR %FSR/V –2.5 –2.5 7.5 7.5 –2– V V V(IOHPGM) = V(IOLPGM) = 100 mV, V(IOHOUT) = ±2 V, V(IOLOUT) = ±2 V V(IOHPGM) = V(IOLPGM) = 100 mV, V(IOHOUT) = V(IOLOUT) = 0 V Range 0 Range 0 Range 0, V(IOHPGM) = V(IOLPGM) = 100 mV, Either Supply Over Operating Range IOH = 50 mA IOL = 50 mA REV. A AD53041 Parameter Min LEAKAGE CURRENTS IOH Inhibit-Mode Leakage IOL Inhibit-Mode Leakage IOH Off-State Leakage IOL Off-State Leakage Max Units –1 –1 –3 1 1 3 µA µA µA –3 3 µA DYNAMIC PERFORMANCE Propagation Delays ± IMAX to Inhibit Part-to-Part Skew Inhibit to ± IMAX Part-to-Part Skew Propagation Delay Drift Capacitance Typ 1.4 1 1.9 1 10 3 POWER SUPPLIES –VS to +VS Range Positive Supply Range Negative Supply Range Positive Supply Current 15.2 10.2 –5.4 15.7 10.5 –5.2 10 Negative Supply Current 10 Power Dissipation 2.1 ns ns ns ns ps/°C pF 16.2 10.8 –5.0 160 V V V mA 60 mA 160 mA 60 mA 2.3 W Test Conditions Range 0, Bridge Diode Leakage Not Included V(IOHOUT) = –2.5 V to 7.5 V, Inhibited V(IOLOUT) = –2.5 V to 7.5 V, Inhibited V(IOHOUT) = –2.5 V to 7.5 V, V(IOHPGM) = –0.2 V V(IOLOUT) = –2.5 V to 7.5 V, V(IOLPGM) = –0.2 V Range 0, IMAX, RLOAD = 50 Ω Range 0, IMAX, RLOAD = 50 Ω ± IMAX to Inhibit, Inhibit to ± IMAX IOHOUT or IOLOUT Without Diodes Range 0, V(IOHPGM) = V(IOLPGM) = 5.0 V, Active Range 0, V(IOHPGM) = V(IOLPGM) = 200 mV, Active Range 0, V(IOHPGM) = V(IOLPGM) = 5.0 V, Active Range 0, V(IOHPGM) = V(IOLPGM) = 200 mV, Active IOH = 50 mA, IOL = –50 mA, Active, V(IOHOUT) = 7 V, V(IOLOUT) = –2 V NOTES Typical values are not tested or guaranteed. Specifications subject to change without notice. Table I. Active Load Truth Table (Including External Diode Bridge per Figure 1; Scale Factors per Functional Block Diagram) V(DUT) INH INH OUTPUT STATES (IFS Is Full-Scale Current Set by GAINA, GAINB) IOH IOL I(VDUT) < VCOM > VCOM X 0 0 1 1 1 0 [V(IOHPGM) ÷ 5 V] × IFS [V(IOHPGM) ÷ 5 V] × IFS 0 [V(IOLPGM) ÷ 5 V] × IFS [V(IOLPGM) ÷ 5 V] × IFS 0 VDUT tpdAH tpdIH Vact– Vact+ tpdIL tpdAL VDUT PROPAGATION DELAY LOAD AND TEST CONDITIONS PARAMETER DESCRIPTION IOL VDUT MEASURE POINT tpdAH IOL Inh → Act 50mA 50mA 0V 0.50V tpdIL IOL Act → Inh 50mA 50mA 0V 2.00V tpdAH IOH Inh → Act 50mA 50mA 5V 4.50V tpdIH IOH Act → Inh 50mA 50mA 5V 3.00V IOH ECL+ ECL– Figure 2. Inhibit Propagation Delay Measurement REV. A –3– IOL IOH 0 AD53041 ABSOLUTE MAXIMUM RATINGS 1 PIN CONFIGURATION Power Supply Voltage +VS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +12 V –VS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –7 V +VS to –VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +17 V GND to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 0.4 V Inputs INH, INH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6 V, –3 V INH to INH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 3 V GAINA, GAINB . . . . . . . . . . . . . . . . . . . . . . . . +6 V, –3 V GAINA to GAINB . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 5 V VCOMIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8 V, –3 V IOHPGM, IOLPGM . . . . . . . . . . . . . . . . . . . . . . . . . +6 V, –1 V Outputs IOHOUT, IOHRTN . . . . . . . . . . . . . . . . . . . . . . . . +9 V, –2.5 V IOLOUT, IOLRTN . . . . . . . . . . . . . . . . . . . . . . . . . +8 V, –3.5 V VCOMOUT Short Circuit Duration . . . . . . . . . Not Protected2 Environmental Operating Temperature (Junction) . . . . . . . . . . . . . . +175°C Storage Temperature . . . . . . . . . . . . . . . . –65°C to +150°C Lead Temperature (Soldering, 10 sec)3 . . . . . . . . . . +260°C 19 GAINA IOLOUT 3 18 DGND VCOMIN 5 16 INH IOHRTN 7 14 VEE IOHOUT 8 13 DGND DGND 9 12 AGND DGND 10 11 IOHPGM NOTES: AGND IS THE HIGH-QUALITY GROUND REFERENCE FOR IOLPGM AND IOHPGM. DGND IS THE SUPPLY GROUND. PACKAGE THERMAL CHARACTERISTICS Air Flow, FM JC, ⴗC/W JA, ⴗC/W 0 50 400 4 4 4 50 49 34 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 20-Lead Thermally Enhanced Power Small Outline Package (PSOP) (RP-20) 0.5118 (13.00) 0.4961 (12.60) Shipment Method, Quantity per Shipping Package Container Option 20 11 RP-20 0.1890 (4.80) 0.4193 (10.65) 0.1791 (4.55) 0.3937 (10.00) HEAT SINK 0.2992 (7.60) 0.2914 (7.40) 1 AD53041KRP 20-Lead Power SOIC Tube, 38 Pieces 17 VCC AD53041 TOP VIEW VCOMOUT 6 (Not to Scale) 15 INH ORDERING GUIDE Package Description 20 GAINB IOLRTN 4 NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause per manent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Absolute maximum limits apply individually, not in combination. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Short circuit to ground or to either supply will result in the destruction of the device. 3 To ensure lead coplanarity (± 0.002 inches) and solderability, handling with bare hands should be avoided and the device should be stored in environments at 24 °C ± 5°C (75°F ± 10°F) with relative humidity not to exceed 65%. Model AGND 1 IOLPGM 2 C3004a–0–11/98 DIMPLE ON BOTTOM OF PACKAGE 10 PIN 1 0.3340 (8.61) 0.3287 (8.35) 0.1043 (2.65) 0.0926 (2.35) 8° 0° 0.0201 (0.51) SEATING 0.0500 (1.27) 0.0130 (0.33) PLANE 0.0057 (0.40) CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD53041 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. –4– 0.0295 (0.75) x 45° 0.0098 (0.25) PRINTED IN U.S.A. 0.0118 (0.30) 0.0500 (1.27) 0.0040 (0.10) BSC STANDOFF WARNING! ESD SENSITIVE DEVICE REV. A