NSC SM72501

SM72501
SolarMagic Precision, CMOS Input, RRIO, Wide Supply
Range Amplifier
General Description
Features
The SM72501 is a low offset voltage, rail-to-rail input and output precision amplifier with a CMOS input stage and a wide
supply voltage range. The SM72501 is ideal for sensor interface and other instrumentation applications.
The guaranteed low offset voltage of less than ±200 µV along
with the guaranteed low input bias current of less than ±1 pA
makes the SM72501 ideal for precision applications. The
SM72501 is built utilizing VIP50 technology, which allows the
combination of a CMOS input stage and a 12V common mode
and supply voltage range. This makes the SM72501 a great
choice in many applications where conventional CMOS parts
cannot operate under the desired voltage conditions.
The SM72501 has a rail-to-rail input stage that significantly
reduces the CMRR glitch commonly associated with rail-torail input amplifiers. This is achieved by trimming both sides
of the complimentary input stage, thereby reducing the difference between the NMOS and PMOS offsets. The output of
the SM72501 swings within 40 mV of either rail to maximize
the signal dynamic range in applications requiring low supply
voltage.
The SM72501 is offered in the space saving 5-Pin SOT23.
This small package is an ideal solution for area constrained
PC boards and portable electronics.
■ Renewable Energy Grade
Unless otherwise noted, typical values at VS = 5V
±200 µV (max)
■ Input offset voltage
±200 fA
■ Input bias current
9 nV/√Hz
■ Input voltage noise
130 dB
■ CMRR
130 dB
■ Open loop gain
−40°C to 125°C
■ Temperature range
2.5 MHz
■ Unity gain bandwidth
715 µA
■ Supply current (SM72501)
2.7V to 12V
■ Supply voltage range
■ Rail-to-rail input and output
Applications
■
■
■
■
■
■
High impedance sensor interface
Battery powered instrumentation
High gain amplifiers
DAC buffer
Instrumentation amplifier
Active filters
Typical Application
30142105
Precision Current Source
© 2011 National Semiconductor Corporation
301421
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SM72501 SolarMagic Precision, CMOS Input, RRIO, Wide Supply Range Amplifier
May 10, 2011
SM72501
Storage Temperature Range
Junction Temperature (Note 3)
Soldering Information
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2)
Human Body Model
Machine Model
2000V
Charge-Device Model
VIN Differential
Supply Voltage (VS = V+ – V−)
Voltage at Input/Output Pins
Input Current
200V
1000V
±300 mV
13.2V
V++ 0.3V, V− − 0.3V
10 mA
3V Electrical Characteristics
−65°C to +150°C
+150°C
Infrared or Convection (20 sec)
Wave Soldering Lead Temp. (10
235°C
sec)
260°C
Operating Ratings
(Note 1)
Temperature Range (Note 3)
Supply Voltage (VS = V+ – V−)
−40°C to +125°C
2.7V to 12V
Package Thermal Resistance (θJA (Note 3))
5-Pin SOT23
265°C/W
(Note 4)
Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 3V, V− = 0V, VCM = V+/2, and RL > 10 kΩ to V+/2.
Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
VOS
Input Offset Voltage
TCVOS
Input Offset Voltage Temperature
Drift
(Note 7)
IB
Input Bias Current
(Note 7, Note 8)
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
±37
±200
±500
μV
±1
±5
μV/°C
±0.2
±1
±50
±0.2
±1
±400
−40°C ≤ TA ≤ 85°C
(Note 7, Note 8)
−40°C ≤ TA ≤ 125°C
IOS
Input Offset Current
40
CMRR
Common Mode Rejection Ratio
0V ≤ VCM ≤ 3V
86
80
130
PSRR
Power Supply Rejection Ratio
2.7V ≤ V+ ≤ 12V, Vo = V+/2
86
82
98
CMVR
Common Mode Voltage Range
CMRR ≥ 80 dB
–0.2
–0.2
RL = 2 kΩ
VO = 0.3V to 2.7V
100
96
114
RL = 10 kΩ
VO = 0.2V to 2.8V
100
96
124
CMRR ≥ 77 dB
AVOL
VOUT
Open Loop Voltage Gain
Output Voltage Swing High
Output Voltage Swing Low
IOUT
Output Current
(Note 3, Note 9)
IS
Supply Current
SR
Slew Rate (Note 10)
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fA
dB
dB
3.2
3.2
40
80
120
RL = 10 kΩ to V+/2
30
40
60
RL = 2 kΩ to V+/2
40
60
80
RL = 10 kΩ to V+/2
20
40
50
25
15
42
Sinking VO = V+/2
VIN = −100 mV
25
20
42
0.670
AV = +1, VO = 2 VPP
10% to 90%
2
0.9
V
dB
RL = 2 kΩ to V+/2
Sourcing VO = V+/2
VIN = 100 mV
pA
mV
from V+
mV
mA
1.0
1.2
mA
V/μs
Parameter
Conditions
Min
(Note 6)
Typ
(Note 5)
GBW
Gain Bandwidth
THD+N
Total Harmonic Distortion + Noise
f = 1 kHz, AV = 1, R.L = 10 kΩ
en
Input Referred Voltage Noise
Density
f = 1 kHz
9
in
Input Referred Current Noise
Density
f = 100 kHz
1
5V Electrical Characteristics
Max
(Note 6)
Units
2.5
MHz
0.02
%
nV/
fA/
(Note 4)
Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = 0V, VCM = V+/2, and RL > 10 kΩ to V+/2.
Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
VOS
Input Offset Voltage
TCVOS
Input Offset Voltage Temperature Drift
(Note 7)
IB
Input Bias Current
(Note 7, Note 8)
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
±37
±200
±500
μV
μV/°C
±1
±5
±0.2
±1
±50
±0.2
±1
±400
−40°C ≤ TA ≤ 85°C
(Note 7, Note 8)
−40°C ≤ TA ≤ 125°C
IOS
Input Offset Current
CMRR
Common Mode Rejection Ratio
PSRR
CMVR
40
0V ≤ VCM ≤ 5V
88
83
130
Power Supply Rejection Ratio
2.7V ≤ V+ ≤ 12V, VO = V+/2
86
82
100
Common Mode Voltage Range
CMRR ≥ 80 dB
–0.2
–0.2
RL = 2 kΩ
VO = 0.3V to 4.7V
100
96
119
RL = 10 kΩ
VO = 0.2V to 4.8V
100
96
130
CMRR ≥ 78 dB
AVOL
VOUT
Open Loop Voltage Gain
Output Voltage Swing High
Output Voltage Swing Low
IOUT
Output Current
(Note 3, Note 9)
IS
Supply Current
SR
Slew Rate (Note 10)
GBW
Gain Bandwidth
THD+N
Total Harmonic Distortion + Noise
fA
dB
dB
5.2
5.2
60
110
130
RL = 10 kΩ to V+/2
40
50
70
RL = 2 kΩ to V+/2
50
80
90
RL = 10 kΩ to V+/2
30
40
50
40
28
66
Sinking VO = V+/2
VIN = −100 mV
40
28
76
0.715
AV = +1, VO = 4 VPP
10% to 90%
f = 1 kHz, AV = 1, RL = 10 kΩ
3
1.0
V
dB
RL = 2 kΩ to V+/2
Sourcing VO = V+/2
VIN = 100 mV
pA
mV
from V+
mV
mA
1.0
1.2
mA
V/μs
2.5
MHz
0.02
%
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SM72501
Symbol
SM72501
Symbol
Parameter
Conditions
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
en
Input Referred Voltage Noise Density
f = 1 kHz
9
nV/
in
Input Referred Current Noise Density
f = 100 kHz
1
fA/
±5V Electrical Characteristics
(Note 4)
Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = −5V, VCM = 0V, and RL > 10 kΩ to 0V. Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
VOS
Input Offset Voltage
TCVOS
Input Offset Voltage Temperature Drift
(Note 7)
IB
Input Bias Current
(Note 7, Note 8)
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
±37
±200
±500
μV
±1
±5
μV/°C
±0.2
1
±50
±0.2
1
±400
−40°C ≤ TA ≤ 85°C
(Note 7, Note 8)
−40°C ≤ TA ≤ 125°C
IOS
Input Offset Current
40
CMRR
Common Mode Rejection Ratio
−5V ≤ VCM ≤ 5V
92
88
138
PSRR
Power Supply Rejection Ratio
2.7V ≤ V+ ≤ 12V, VO = 0V
86
82
98
CMVR
Common Mode Voltage Range
CMRR ≥ 80 dB
−5.2
−5.2
RL = 2 kΩ
VO = −4.7V to 4.7V
100
98
121
RL = 10 kΩ
VO = −4.8V to 4.8V
100
98
134
CMRR ≥ 78 dB
AVOL
VOUT
Open Loop Voltage Gain
Output Voltage Swing High
Output Voltage Swing Low
IOUT
Output Current
(Note 3, Note 9)
IS
Supply Current
SR
Slew Rate (Note 10)
GBW
Gain Bandwidth
THD+N
fA
dB
dB
5.2
5.2
90
RL = 2 kΩ to 0V
150
170
40
80
100
RL = 2 kΩ to 0V
90
130
150
RL = 10 kΩ to 0V
40
50
60
50
35
86
Sinking VO = 0V
VIN = −100 mV
50
35
84
0.790
V
dB
RL = 10 kΩ to 0V
Sourcing VO = 0V
VIN = 100 mV
pA
mV
from V+
mV
from V–
mA
1.1
1.3
mA
AV = +1, VO = 9 VPP
10% to 90%
1.1
V/μs
2.5
MHz
Total Harmonic Distortion + Noise
f = 1 kHz, AV = 1, RL = 10 kΩ
0.02
%
en
Input Referred Voltage Noise Density
f = 1 kHz
9
nV/
in
Input Referred Current Noise Density
f = 100 kHz
1
fA/
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics
Tables.
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Note 3: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.
Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating
of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ >
TA.
Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using the Statistical Quality
Control (SQC) method.
Note 7: This parameter is guaranteed by design and/or characterization and is not tested in production.
Note 8: Positive current corresponds to current flowing into the device.
Note 9: The short circuit test is a momentary test.
Note 10: The number specified is the slower of positive and negative slew rates.
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SM72501
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) FieldInduced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
SM72501
Connection Diagram
5-Pin SOT23
30142102
Top View
Ordering Information
Package
Part Number
Package Marking
5-Pin SOT23
SM72501MFE
5-Pin SOT23
SM72501MF
5-Pin SOT23
SM72501MFX
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Transport Media
NSC Drawing
S501
250 Units Tape and Reel
MF05A
S501
1000 Units Tape and Reel
MF05A
S501
3000 Units Tape and Reel
MF05A
6
Unless otherwise noted: TA = 25°C, VCM = VS/2, RL > 10 kΩ.
Offset Voltage Distribution
TCVOS Distribution
30142136
30142141
Offset Voltage Distribution
TCVOS Distribution
30142137
30142142
Offset Voltage Distribution
TCVOS Distribution
30142138
30142143
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SM72501
Typical Performance Characteristics
SM72501
Offset Voltage vs. Temperature
CMRR vs. Frequency
30142106
30142150
Offset Voltage vs. Supply Voltage
Offset Voltage vs. VCM
30142107
30142110
Offset Voltage vs. VCM
Offset Voltage vs. VCM
30142108
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30142109
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SM72501
Input Bias Current vs. VCM
Input Bias Current vs. VCM
30142130
30142146
Input Bias Current vs. VCM
Input Bias Current vs. VCM
30142131
30142147
Input Bias Current vs. VCM
Input Bias Current vs. VCM
30142148
30142149
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SM72501
PSRR vs. Frequency
Supply Current vs. Supply Voltage (Per Channel)
30142145
30142111
Sinking Current vs. Supply Voltage
Sourcing Current vs. Supply Voltage
30142113
30142112
Output Voltage vs. Output Current
Slew Rate vs. Supply Voltage
30142116
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30142117
10
SM72501
Open Loop Frequency Response
Open Loop Frequency Response
30142115
30142114
Large Signal Step Response
Small Signal Step Response
30142118
30142120
Large Signal Step Response
Small Signal Step Response
30142126
30142119
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SM72501
Input Voltage Noise vs. Frequency
Open Loop Gain vs. Output Voltage Swing
30142127
30142152
Output Swing High vs. Supply Voltage
Output Swing Low vs. Supply Voltage
30142133
30142135
Output Swing High vs. Supply Voltage
Output Swing Low vs. Supply Voltage
30142132
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30142134
12
SM72501
THD+N vs. Frequency
THD+N vs. Output Voltage
30142128
30142129
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SM72501
INPUT CAPACITANCE
CMOS input stages inherently have low input bias current and
higher input referred voltage noise. The SM72501 enhances
this performance by having the low input bias current of only
±200 fA, as well as, a very low input referred voltage noise of
. In order to achieve this a larger input stage has
9 nV/
been used. This larger input stage increases the input capacitance of the SM72501. The typical value of this input capacitance, CIN, for the SM72501 is 25 pF. The input capacitance
will interact with other impedances such as gain and feedback
resistors, which are seen on the inputs of the amplifier, to form
a pole. This pole will have little or no effect on the output of
the amplifier at low frequencies and DC conditions, but will
play a bigger role as the frequency increases. At higher frequencies, the presence of this pole will decrease phase margin and will also cause gain peaking. In order to compensate
for the input capacitance, care must be taken in choosing the
feedback resistors. In addition to being selective in picking
values for the feedback resistor, a capacitor can be added to
the feedback path to increase stability.
The DC gain of the circuit shown in Figure 2 is simply –R2/
R1.
Application Information
SM72501
The SM72501 is a low offset voltage, rail-to-rail input and output precision amplifier with a CMOS input stage and wide
supply voltage range of 2.7V to 12V. The SM72501 has a very
low input bias current of only ±200 fA at room temperature.
The wide supply voltage range of 2.7V to 12V over the extensive temperature range of −40°C to 125°C makes the
SM72501 an excellent choice for low voltage precision applications with extensive temperature requirements.
The SM72501 has only ±37 μV of typical input referred offset
voltage and this offset is guaranteed to be less than ±500 μV
over temperature. This minimal offset voltage allows more
accurate signal detection and amplification in precision applications.
The low input bias current of only ±200 fA along with the low
gives the SM72501
input referred voltage noise of 9 nV/
superiority for use in sensor applications. Lower levels of
noise from the SM72501 means better signal fidelity and a
higher signal-to-noise ratio.
National Semiconductor is heavily committed to precision
amplifiers and the market segment they serve. Technical support and extensive characterization data is available for sensitive applications or applications with a constrained error
budget.
The SM72501 is offered in the space saving 5-Pin SOT23.
This small package is an ideal solution for area constrained
PC boards and portable electronics.
CAPACITIVE LOAD
The SM72501 can be connected as a non-inverting unity gain
follower. This configuration is the most sensitive to capacitive
loading.
The combination of a capacitive load placed on the output of
an amplifier along with the amplifier's output impedance creates a phase lag which in turn reduces the phase margin of
the amplifier. If the phase margin is significantly reduced, the
response will be either underdamped or it will oscillate.
In order to drive heavier capacitive loads, an isolation resistor,
RISO, in Figure 1 should be used. By using this isolation resistor, the capacitive load is isolated from the amplifier's
output, and hence, the pole caused by CL is no longer in the
feedback loop. The larger the value of RISO, the more stable
the output voltage will be. If values of RISO are sufficiently
large, the feedback loop will be stable, independent of the
value of CL. However, larger values of RISO result in reduced
output swing and reduced output current drive.
30142144
FIGURE 2. Compensating for Input Capacitance
For the time being, ignore CF. The AC gain of the circuit in
Figure 2 can be calculated as follows:
This equation is rearranged to find the location of the two
poles:
(1)
As shown in Equation 1, as values of R1 and R2 are increased,
the magnitude of the poles is reduced, which in turn decreases the bandwidth of the amplifier. Whenever possible, it is
best to choose smaller feedback resistors. Figure 3 shows the
effect of the feedback resistor on the bandwidth of the
SM72501.
30142121
FIGURE 1. Isolating Capacitive Load
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30142154
FIGURE 3. Closed Loop Gain vs. Frequency
Equation 1 has two poles. In most cases, it is the presence of
pairs of poles that causes gain peaking. In order to eliminate
this effect, the poles should be placed in Butterworth position,
since poles in Butterworth position do not cause gain peaking.
To achieve a Butterworth pair, the quantity under the square
root in Equation 1 should be set to equal −1. Using this fact
and the relation between R1 and R2, R2 = −AV R1, the optimum
value for R1 can be found. This is shown in Equation 2. If R1
is chosen to be larger than this optimum value, gain peaking
will occur.
30142125
FIGURE 5. Input of SM72501
(2)
In Figure 2, CF is added to compensate for input capacitance
and to increase stability. Additionally, CF reduces or eliminates the gain peaking that can be caused by having a larger
feedback resistor. Figure 4 shows how CF reduces gain peaking.
30142155
FIGURE 4. Closed Loop Gain vs. Frequency with
Compensation
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SM72501
DIODES BETWEEN THE INPUTS
The SM72501 has a set of anti-parallel diodes between the
input pins, as shown in Figure 5. These diodes are present to
protect the input stage of the amplifier. At the same time, they
limit the amount of differential input voltage that is allowed on
the input pins. A differential signal larger than one diode voltage drop might damage the diodes. The differential signal
between the inputs needs to be limited to ±300 mV or the input
current needs to be limited to ±10 mA.
SM72501
combination. This is because each individual amplifier acts as
an independent noise source, and the average noise of independent sources is the quadrature sum of the independent
sources divided by the number of sources. For N identical
amplifiers, this means:
PRECISION CURRENT SOURCE
The SM72501 can be used as a precision current source in
many different applications. Figure 6 shows a typical precision current source. This circuit implements a precision voltage controlled current source. Amplifier A1 is a differential
amplifier that uses the voltage drop across RS as the feedback
signal. Amplifier A2 is a buffer that eliminates the error current
from the load side of the RS resistor that would flow in the
feedback resistor if it were connected to the load side of the
RS resistor. In general, the circuit is stable as long as the
closed loop bandwidth of amplifier A2 is greater then the
closed loop bandwidth of amplifier A1. Note that if A1 and A2
are the same type of amplifiers, then the feedback around A1
will reduce its bandwidth compared to A2.
Figure 7 shows a schematic of this input voltage noise reduction circuit. Typical resistor values are:
RG = 10Ω, RF = 1 kΩ, and RO = 1 kΩ.
30142105
FIGURE 6. Precision Current Source
The equation for output current can be derived as follows:
Solving for the current I results in the following equation:
LOW INPUT VOLTAGE NOISE
The SM72501 has a very low input voltage noise of 9 nV/
. This input voltage noise can be further reduced by placing N amplifiers in parallel as shown in Figure 7. The total
voltage noise on the output of this circuit is divided by the
square root of the number of amplifiers used in this parallel
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30142156
FIGURE 7. Noise Reduction Circuit
16
The input current noise of the SM72501 is so low that it will
not become the dominant factor in the total noise unless
source resistance exceeds 300 MΩ, which is an unrealistically high value.
As is evident in Figure 8, at lower RS values, total noise is
dominated by the amplifier's input voltage noise. Once RS is
larger than a few kilo-Ohms, then the dominant noise factor
becomes the thermal noise of RS. As mentioned before, the
current noise will not be the dominant noise factor for any
practical application.
30142159
FIGURE 9. Noise Due to IBIAS
pH electrodes are very high impedance sensors. As their
name indicates, they are used to measure the pH of a solution. They usually do this by generating an output voltage
which is proportional to the pH of the solution. pH electrodes
are calibrated so that they have zero output for a neutral solution, pH = 7, and positive and negative voltages for acidic
or alkaline solutions. This means that the output of a pH electrode is bipolar and has to be level shifted to be used in a
single supply system. The rate of change of this voltage is
usually shown in mV/pH and is different for different pH sensors. Temperature is also an important factor in a pH electrode reading. The output voltage of the senor will change with
temperature.
Figure 10 shows a typical output voltage spectrum of a pH
electrode. Note that the exact values of output voltage will be
different for different sensors. In this example, the pH electrode has an output voltage of 59.15 mV/pH at 25°C.
30142158
FIGURE 8. Total Input Noise
30142160
FIGURE 10. Output Voltage of a pH Electrode
The temperature dependence of a typical pH electrode is
shown in Figure 11. As is evident, the output voltage changes
with changes in temperature.
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SM72501
HIGH IMPEDANCE SENSOR INTERFACE
Many sensors have high source impedances that may range
up to 10 MΩ. The output signal of sensors often needs to be
amplified or otherwise conditioned by means of an amplifier.
The input bias current of this amplifier can load the sensor's
output and cause a voltage drop across the source resistance
as shown in Figure 9, where VIN+ = VS – IBIAS*RS
The last term, IBIAS*RS, shows the voltage drop across RS. To
prevent errors introduced to the system due to this voltage,
an op amp with very low input bias current must be used with
high impedance sensors. This is to keep the error contribution
by IBIAS*RS less than the input voltage noise of the amplifier,
so that it will not become the dominant noise factor.
TOTAL NOISE CONTRIBUTION
The SM72501 has very low input bias current, very low input
current noise, and very low input voltage noise. As a result,
these amplifiers are ideal choices for circuits with high
impedance sensor applications.
Figure 8 shows the typical input noise of the SM72501 as a
function of source resistance where:
en denotes the input referred voltage noise
ei is the voltage drop across source resistance due to input
referred current noise or ei = RS * in
et shows the thermal noise of the source resistance
eni shows the total noise on the input.
Where:
SM72501
mation is used by the ADC to calculate the temperature
effects on the pH readings. The LM35 needs to have a resistor, RT in Figure 12, to –V+ in order to be able to read
temperatures below 0°C. RT is not needed if temperatures are
not expected to go below zero.
The output of pH electrodes is usually large enough that it
does not require much amplification; however, due to the very
high impedance, the output of a pH electrode needs to be
buffered before it can go to an ADC. Since most ADCs are
operated on single supply, the output of the pH electrode also
needs to be level shifted. Amplifier A1 buffers the output of
the pH electrode with a moderate gain of +2, while A2 provides the level shifting. VOUT at the output of A2 is given by:
VOUT = −2VpH + 1.024V.
The LM4140A is a precision, low noise, voltage reference
used to provide the level shift needed. The ADC used in this
application is the ADC12032 which is a 12-bit, 2 channel converter with multiplexers on the inputs and a serial output. The
12-bit ADC enables users to measure pH with an accuracy of
0.003 of a pH unit. Adequate power supply bypassing and
grounding is extremely important for ADCs. Recommended
bypass capacitors are shown in Figure 12. It is common to
share power supplies between different components in a circuit. To minimize the effects of power supply ripples caused
by other components, the op amps need to have bypass capacitors on the supply pins. Using the same value capacitors
as those used with the ADC are ideal. The combination of
these three values of capacitors ensures that AC noise
present on the power supply line is grounded and does not
interfere with the amplifiers' signal.
30142161
FIGURE 11. Temperature Dependence of a pH Electrode
The schematic shown in Figure 12 is a typical circuit which
can be used for pH measurement. The LM35 is a precision
integrated circuit temperature sensor. This sensor is differentiated from similar products because it has an output voltage
linearly proportional to Celcius measurement, without the
need to convert the temperature to Kelvin. The LM35 is used
to measure the temperature of the solution and feeds this
reading to the Analog to Digital Converter, ADC. This infor-
30142162
FIGURE 12. pH Measurement Circuit
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SM72501
Physical Dimensions inches (millimeters) unless otherwise noted
5-Pin SOT23
NS Package Number MF05A
19
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SM72501 SolarMagic Precision, CMOS Input, RRIO, Wide Supply Range Amplifier
Notes
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