LMV641 10 MHz, 12V, Low Power Amplifier General Description Features The LMV641 is a low power, wide bandwidth operational amplifier with an extended power supply voltage range of 2.7V to 12V. It features 10 MHz of gain bandwidth product with unity gain stability on a typical supply current of 138 μA. Other key specifications are a PSRR of 105 dB, CMRR of 120 dB, VOS of , and a THD 500 μV, input referred voltage noise of 14 nV/ of 0.002%. This amplifier has a rail-to-rail output stage, and a common mode input voltage which includes the negative supply. The LMV641 operates over a temperature range of −40°C to +125°C and is offered in the board space saving 5-Pin SC70 and 8-Pin SOIC packages. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Applications ■ ■ ■ ■ 20203319 Offset Voltage Distribution © 2007 National Semiconductor Corporation 202033 Guaranteed 2.7V, and ±5V performance Low power supply current 138 µA High unity gain bandwidth 10 MHz Max input offset voltage 500 µV CMRR 120 dB PSRR 105 dB Input referred voltage noise 14 nV/√Hz 1/f corner frequency 4 Hz Output swing with 2 kΩ load 40 mV from rail Total harmonic distortion 0.002% @ 1 kHz, 2 kΩ Temperature range −40°C to 125°C Portable equipment Automotive Battery powered systems Sensors and instrumentation 20203326 Open Loop Gain and Phase vs. Frequency www.national.com LMV641 10 MHz, 12V, Low Power Amplifier September 2007 LMV641 Junction Temperature (Note 3) Soldering Information Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Infrared or Convection (20 sec) Wave Soldering Lead Temp (10 sec) ESD Tolerance (Note 2) Human Body Model Machine Model Differential Input VID Supply Voltage (VS = V+ - V−) Input/Output Pin Voltage Storage Temperature Range +150°C Operating Ratings 2000V 260°C (Note 1) Temperature Range (Note 3) Supply Voltage (VS = V+ - V−) 200V ±0.3V 13.2V V+ +0.3V, V− −0.3V −65°C to +150°C 235°C −40°C to 125°C 2.7V to 12V Package Thermal Resistance (θJA)(Note 3) 5-Pin SC70 8-Pin SOIC 456°C/W 166°C/W 2.7V DC Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 2.7V, V− = 0V, VO = VCM = V+/2, and RL > 1 MΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 5) Typ (Note 4) Max (Note 5) 500 750 VOS Input Offset Voltage 30 TC VOS Input Offset Average Drift 0.1 IB Input Bias Current IOS Input Offset Current CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 1.7V PSRR Power Supply Rejection Ratio CMVR AVOL (Note 6) 0.9 5 nA 94.5 92.5 105 2.7V ≤ V+ ≤ 12V, VCM = 0.5 94 92 100 Input Common-Mode Voltage Range CMRR ≥ 80 dB 0 Large Signal Voltage Gain 0.3V ≤ VO ≤ 2.4V, RL = 2 kΩ to V+/2 V+/2 0.4V ≤ VO ≤ 2.3V, RL = 10 kΩ to V+/2 Sourcing and Sinking Output Current IS Supply Current SR Slew Rate GBW Gain Bandwidth Product en Input-Referred Voltage Noise www.national.com dB dB 1.8 V CMRR ≥ 68 dB 0.4V ≤ VO ≤ 2.3V, RL = 2 kΩ to IOUT nA 2.7V ≤ V+ ≤ 10V, VCM = 0.5 Output Swing Low μV/°C 95 110 114 Output Swing High µV 75 89 84 0.3V ≤ VO ≤ 2.4V, RL = 10 kΩ to V+/2 VO Units 82 78 88 86 82 98 dB RL = 2 kΩ to V+/2, VIN = 100 mV 42 58 68 RL = 10 kΩ to V+/2, VIN = 100 mV 22 35 40 RL = 2 kΩ to V+/2, VIN = 100 mV 38 48 58 RL = 10 kΩ to V+/2, VIN = 100 mV 18 30 35 VIN_DIFF = 100 mV to VO = V+/2 (Note 7) Sourcing 22 Sinking 25 138 AV = +1, VO = 1 VPP Rising (10% to 90%) 2.3 Falling (90% to 10%) 1.6 10 f = 1 kHz 14 2 mV from rail mA 170 220 μA V/μs MHz nV/ Parameter in Input-Referred Current Noise THD Total Harmonic Distortion Conditions Min (Note 5) Typ (Note 4) f = 1 kHz 0.15 f = 1 kHz, AV = 2, RL = 2 kΩ 0.014 Max (Note 5) Units pA/ % 10V DC Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 10V, V− = 0V,VO = VCM = V+/2, and RL > 1 MΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions VOS Input Offset Voltage TC VOS Input Offset Average Drift IB Input Bias Current IOS Input Offset Current CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 9V PSRR Power Supply Rejection Ratio Min (Note 5) Typ (Note 4) Max (Note 5) 5 500 750 70 90 105 nA 0.7 5 nA 94 90 120 2.7V ≤ V+ ≤ 10V, VCM = 0.5V 94.5 92.5 105 2.7V ≤ V+ ≤ 12V, VCM = 0.5V 94 92 100 CMVR Input Common-Mode Voltage Range CMRR ≥ 80 dB 0 AVOL Large Signal Voltage Gain 0.3V ≤ VO ≤ 9.7V, RL = 2 kΩ to V+/2 90 85 99 0.3V ≤ VO ≤ 9.7V, RL = 10 kΩ to V+/2 97 92 104 0.4V ≤ VO ≤ 9.6V, RL = 10 kΩ to V+/2 Output Swing High Output Swing Low IOUT Sourcing and Sinking Output Current IS Supply Current SR Slew Rate dB dB 9.1 V CMRR ≥ 76 dB 0.4V ≤ VO ≤ 9.6V, RL = 2 kΩ to V+/2 VO µV μV/°C 0.1 (Note 6) Units dB RL = 2 kΩ to V+/2, VIN = 100 mV 68 95 125 RL = 10 kΩ to V+/2, VIN = 100 mV 37 55 65 RL = 2 kΩ to V+/2, VIN = 100 mV 65 90 110 RL = 10 kΩ to V+/2, VIN = 100 mV 32 42 52 VIN_DIFF = 100 mV to VO = V+/2 (Note 7) Sourcing 26 Sinking 112 158 AV = +1, VO = 2V to 8 Rising (10% to 90%) VPP Falling (90% to 10%) 2.6 1.6 10 mV from rail mA 190 240 μA V/μs GBW Gain Bandwidth Product en Input-Referred Voltage Noise f = 1 kHz 14 nV/ in Input-Referred Current Noise f = 1 kHz 0.15 pA/ THD Total Harmonic Distortion f = 1 kHz, AV = 2, RL = 2 kΩ 0.002 3 MHz % www.national.com LMV641 Symbol LMV641 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables. Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Note 3: The maximum power dissipation is a function of TJ(MAX, θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA. All numbers apply for packages soldered directly onto a PC board. Note 4: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Note 5: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using Statistical Quality Control (SQC) method. Note 6: Positive current corresponds to current flowing into the device. Note 7: The part is not short circuit protected and is not recommended for operation with low resistive loads. Typical sourcing and sinking output current curves are provided in the Typical Performance Characteristics and should be consulted before designing for heavy loads. Connection Diagrams 5-Pin SC70 8-Pin SOIC 20203339 Top View 20203340 Top View Ordering Information Package Part Number Package Marking Transport Media LMV641MG 5-Pin SC70 LMV641MGE A99 250 Units Tape and Reel LMV641MGX LMV641MAE 95 Units/Rail LMV641MA 250 Units Tape and Reel LMV641MAX www.national.com MAA05A 3k Units Tape and Reel LMV641MA 8-Pin SOIC NSC Drawing 1k Units Tape and Reel 2.5k Tape and Reel 4 M08A Unless otherwise specified, TA = 25°C, V+ = 10V, V− = 0V, Supply Current vs. Supply Voltage Offset Voltage vs. Supply Voltage 20203307 20203308 Offset Voltage vs. VCM Offset Voltage vs. VCM 20203310 20203309 Offset Voltage vs. VCM Offset Voltage vs. VCM 20203311 20203312 5 www.national.com LMV641 Typical Performance Characteristics VCM = VS/2. LMV641 Offset Voltage Distribution Offset Voltage Distribution 20203321 20203319 CMRR vs. Frequency PSRR vs. Frequency 20203367 20203366 Input Bias Current vs. VCM Input Bias Current vs. VCM 20203317 www.national.com 20203318 6 Open Loop Gain and Phase with Capacitive Load 20203327 20203328 Open Loop Gain and Phase with Resistive Load Open Loop Gain and Phase with Supply Voltage 20203329 20203330 Input Referred Noise Voltage vs. Frequency Close Loop Output Impedance vs. Frequency 20203335 20203325 7 www.national.com LMV641 Open Loop Gain and Phase with Capacitive Load LMV641 THD+N vs. Frequency THD+N vs. Frequency 20203369 20203368 THD+N vs. VOUT THD+N vs. VOUT 20203370 20203371 Sourcing Current vs. Supply Voltage Sinking Current vs. Supply Voltage 20203334 www.national.com 20203365 8 LMV641 Sourcing Current vs. VOUT Sinking Current vs. VOUT 20203332 20203331 Sourcing Current vs. VOUT Large Signal Transient 20203324 20203333 Small Signal Transient Response Small Signal Transient Response 20203323 20203322 9 www.national.com LMV641 Output Swing High vs. Supply Voltage Output Swing Low vs. Supply voltage 20203313 20203314 Output Swing High vs. Supply Voltage Output Swing Low and Supply Voltage 20203315 20203316 Slew Rate vs. Supply Voltage 20203372 www.national.com 10 LMV641 Application Information ADVANTAGES OF THE LMV641 Low Voltage and Low Power Operation The LMV641 has performance guaranteed at supply voltages of 2.7V and 10V. It is guaranteed to be operational at all supply voltages between 2.7V and 12.0V. The LMV641 draws a low supply current of 138 µA. The LMV641 provides the low voltage and low power amplification which is essential for portable applications. Wide Bandwidth Despite drawing the very low supply current of 138 µA, the LMV641 manages to provide a wide unity gain bandwidth of 10 MHz. This is easily one of the best bandwidth to power ratios ever achieved, and allows this op amp to provide wideband amplification while using the minimum amount of power. This makes the LMV641 ideal for low power signal processing applications such as portable media players and other accessories. 20203359 FIGURE 1. Gain vs. Frequency for an Op Amp An op amp, ideally, has a dominant pole close to DC which causes its gain to decay at the rate of 20 dB/decade with respect to frequency. If this rate of decay, also known as the rate of closure (ROC), remains the same until the op amp's unity gain bandwidth, then the op amp is stable. If, however, a large capacitance is added to the output of the op amp, it combines with the output impedance of the op amp to create another pole in its frequency response before its unity gain frequency (Figure 1). This increases the ROC to 40 dB/ decade and causes instability. In such a case, a number of techniques can be used to restore stability to the circuit. The idea behind all these schemes is to modify the frequency response such that it can be restored to an ROC of 20 dB/decade, which ensures stability. Low Input Referred Noise The LMV641 provides a flatband input referred voltage noise , which is significantly better than the density of 14 nV/ noise performance expected from a low power op amp. This op amp also feature exceptionally low 1/f noise, with a very low 1/f noise corner frequency of 4 Hz. Because of this the LMV641 is ideal for low power applications which require decent noise performance, such as PDAs and portable sensors. Ground Sensing and Rail-to-Rail Output The LMV641 has a rail-to-rail output stage, which provides the maximum possible output dynamic range. This is especially important for applications requiring a large output swing. The input common mode range of this part includes the negative supply rail which allows direct sensing at ground in a single supply operation. In The Loop Compensation Figure 2 illustrates a compensation technique, known as in the loop compensation, that employs an RC feedback circuit within the feedback loop to stabilize a non-inverting amplifier configuration. A small series resistance, RS, is used to isolate the amplifier output from the load capacitance, CL, and a small capacitance, CF, is inserted across the feedback resistor to bypass CL at higher frequencies. Small Size The small footprint of the packages for the LMV641 saves space on printed circuit boards, and enables the design of smaller and more compact electronic products. Long traces between the signal source and the op amp make the signal path susceptible to noise. By using a physically smaller package, these op amps can be placed closer to the signal source, reducing noise pickup and enhancing signal integrity. STABILITY OF OP AMP CIRCUITS If the phase margin of the LMV641 is plotted with respect to the capacitive load (CL) at its output, and if CL is increased beyond 100 pF then the phase margin reduces significantly. This is because the op amp is designed to provide the maximum bandwidth possible for a low supply current. Stabilizing the LMV641 for higher capacitive loads would have required either a drastic increase in supply current, or a large internal compensation capacitance, which would have reduced the bandwidth. Hence, if this device is to be used for driving higher capacitive loads, it will have to be externally compensated. 20203358 FIGURE 2. In the Loop Compensation 11 www.national.com LMV641 The values for RS and CF are decided by ensuring that the zero attributed to CF lies at the same frequency as the pole attributed to CL. This ensures that the effect of the second pole on the transfer function is compensated for by the presence of the zero, and that the ROC is maintained at 20 dB/ decade. For the circuit shown in Figure 2 the values of RS and CF are given by Equation 1. Values of RS and CF required for maintaining stability for different values of CL, as well as the phase margins obtained, are shown in Table 1. RF and RIN are 10 kΩ, RL is 2 kΩ, while ROUT is 680Ω. Although this methodology provides circuit stability for any load capacitance, it does so at the price of bandwidth. The closed loop bandwidth of the circuit is now limited by RF and CF. Compensation by External Resistor In some applications it is essential to drive a capacitive load without sacrificing bandwidth. In such a case, in the loop compensation is not viable. A simpler scheme for compensation is shown in Figure 3. A resistor, RISO, is placed in series between the load capacitance and the output. This introduces a zero in the circuit transfer function, which counteracts the effect of the pole formed by the load capacitance, and ensures stability. The value of RISO to be used should be decided depending on the size of CL and the level of performance desired. Values ranging from 5Ω to 50Ω are usually sufficient to ensure stability. A larger value of RISO will result in a system with less ringing and overshoot, but will also limit the output swing and the short circuit current of the circuit. (1) TABLE 1. CL (nF) RS (Ω) CF (pF) Phase Margin (°) 0.5 680 10 17.4 1 680 20 12.4 1.5 680 30 10.1 The LMV641 is capable of driving heavy capacitive loads of up to 1 nF without oscillating, however it is recommended to use compensation should the load exceed 1 nF. Using this methodology will reduce any excessive ringing and help maintain the phase margin for stability. The values of the compensation network tabulated above illustrate the phase margin degradation as a function of the capacitive load. 20203360 FIGURE 3. Compensation by Isolation Resistor Typical Applications magnetoresistive (AMR) sensor. The sensor is arranged in the form of a Wheatstone bridge. This type of sensor can be used to accurately measure the current (either DC or AC) flowing in a wire by measuring the magnetic flux density, B, emanating from the wire. ANISOTROPIC MAGNETORESISTIVE SENSOR The low operating current of the LMV641 makes it a good choice for battery operated applications. Figure 4 shows two LMV641s in a portable application with a magnetic field sensor. The LMV641s condition the output from an anisotropic 20203341 FIGURE 4. A Battery Operated System for Contact-Less Current Sensing Using an Anisotropic Magnetoresistive Sensor www.national.com 12 Since ΔR is proportional to the field strength, BS, the amount of output voltage from the sensor is a function of sensor sensitivity, S. This expression can rewritten as VSIG = VEXC · S · BS, where S = material constant (nominally 1 mV/V/gauss) BS = magnetic flux in gauss A simplified schematic of a single op amp, differential amplifier is shown in Figure 6. The Thevenin equivalent circuit of the sensor can be used to calculate the gain of this amplifier. 20203344 20203342 FIGURE 6. Differential Input Amplifier The Honeywell HMC1051Z AMR sensor has nominal 1 kΩ elements and a sensitivity of 1 mV/V/gauss and is being used with 9V of excitation with a full scale magnetic field range of ±6 gauss. At full-scale, the resistors will have ΔR ≈ 12Ω and 108 mV will be seen from Sig− to Sig+ (refer to Figure 7). 20203343 FIGURE 5. Anisotropic Magnetoresistive Wheatstone Bridge Sensor, (a), and Thevenin Equivalent Circuit, (b) 13 www.national.com LMV641 Using Thevenin’s Theorem, the bridge can be reduced to two voltage sources with series resistances. ΔR is normally very small in comparison to R, thus the Thevenin equivalent resistance, commonly called the source resistance, can be taken to be R. When a bias voltage is applied between VEXC and ground, in the absence of a magnetic field, all of the resistances are considered equal. The voltage at Sig+ and Sig − is half VEXC, or 4.5V, and Sig+ - Sig− = 0. Bridges are designed such that, when immersed in a magnetic field, opposite resistances in the bridge change by ±ΔR with an amount proportional to the strength of the magnetic field. This causes the bridge's output differential voltage, to change from its half VEXC value. Thus Sig+ - Sig− = Vsig ≠ 0. With four active elements, the output voltage is: In this circuit, the use of a 9-volt alkaline battery exploits the LMV641’s high voltage and low supply current for a low power, portable current sensing application. The sensor converts an incident magnetic field (via the magnetic flux linkage) in the sensitive direction, to a balanced voltage output. The LMV641 can be utilized for moderate to high current sensing applications (from a few milliamps and up to 20A) using a nearby external conductor providing the sensed magnetic field to the bridge. The circuit shows a Honeywell HMC1051Z used as a current sensor. Note that the circuit must be calibrated based on the final displacement of the sensed conductor relative to the measurement bridge. Typically, once the sensor has been oriented properly, with respect to the conductor to be measured, the conductor can be placed about one centimeter away from the bridge and have reasonable capability of measuring from tens of milliamperes to beyond 20 amperes. In Figure 4, U1 is configured as a single differential input amplifier. Its input impedance is relatively low, however, and requires that the source impedance of the sensor be considered in the gain calculations. Also, the asymmetrical loading on the bridge will produce a small offset voltage that can be cancelled out with the offset trim circuit shown in Figure 4. Figure 5 shows a typical magnetoresistive Wheatstone bridge and the Thevenin equivalent of its resistive elements. As we shall see, the Thevenin equivalent model of the sensor is useful in calculating the gain needed in the differential amplifier. LMV641 performs a temperature compensation function for the bridge so that it will have greater accuracy over a wide range of operational temperatures. With mangetoresistive sensors, temperature drift of the bridge sensitivity is negative and linear, and in the case of the sensor used here, is nominally −3000 PP/M. Thus the gain of U2 needs to increase proportionally with increasing temperature, suggesting a thermistor with a positive temperature coefficient. Selection of the temperature compensation resistor, RTH, depends on the additional gain required, on the thermistor chosen, and is dependent on the thermistor’s %/°C shift in resistance. For best op amp compatibility, the thermistor resistance should be greater than 1000Ω. RTH should also be much less than RA, the feedback resistor. Because the temperature coefficient of the AMR bridge is largely linear, RTH also needs to behave in a linear fashion with temperature, thus RA is placed in parallel with RTH, which acts to linearize the thermistor. 20203346 FIGURE 7. Sensor Output with No Load Gain Error and Bandwidth Consideration if Using an Analog to Digital Converter The bandwidth available from Figure 4 is dependent on the system closed loop gain required and the maximum gain-error allowed if driving an analog to digital converter (ADC). If the output from the sensor is intended to drive an ADC, the bandwidth will be considerably reduced from the closed-loop corner frequency. This is because the gain error of the preamplifier stage needs to be taken into account when calculating total error budget. Good practice dictates that the gain error of the amplifier be less than or equal to half LSB (preferably less in order to allow for other system errors that will eat up a portion of the available error budget) of the ADC. However, at the −3 dB corner frequency the gain error for any amplifier is 29.3%. In reality, the gain starts rolling off long before the −3 dB corner is reached. For example, if the amplifier is driving an 8-bit ADC, the minimum gain error allowed for half LSB would be approximately 0.2%. To achieve this gain error with the op amp, the maximum frequency of interest can be no higher than Referring to the simplified diagram in Figure 6, and assuming that required full scale at the output of the amplifier is 2.5V, a gain of 23.2 is needed for U1. It is clear from the Thevenin equivalent circuit in Figure 8 that a sensor Thevenin equivalent source resistance, RTHEV, of 500Ω will be in series with both the inverting and non-inverting inputs of the LMV641. Therefore, the required gain is: Choosing R1 = R2 = 24.5 kΩ, then R4 will be approximately 580 kΩ. The actual values chosen will depend on the fullscale needs of the succeeding circuitry as well as bandwidth requirements. The values shown here provide a −3 dB bandwidth of approximately 431 kHz, and are found as follows. where n is the bit resolution of the ADC and f−3 dB is the closed loop corner frequency. Given that the LMV641 has a GBW of 10 MHz, and is operating with a closed loop gain of 26.3, its closed loop bandwidth is 380 kHZ, therefore 20203347 FIGURE 8. Thevenin Equivalent Showing Required Gain By choosing input resistor values for R1 and R2 that are four to ten times the bridge element resistance, the bridge is minimally loaded and the offset errors induced by the op amp stages are minimized. These resistors should have 1% tolerance, or better, for the best noise rejection and offset minimization. Referring once again to Figure 4, U2 is an additional gain stage with a thermistor element, RTH, in the feedback loop. It www.national.com which is the highest frequency that can be measured with required accuracy. 14 20203373 FIGURE 9. Low Power Voice In-Band Receive Filter for Battery-Powered Portable Use 15 www.national.com LMV641 to add gain. The op amp is powered from a single supply, hence the need for offset (common-mode) adjustment of its output, which is set to ½ VS via its non-inverting input. This filter is also useful in applications for battery operated talking toys and games. VOICEBAND FILTER The majority of the energy of recognizable speech is within a band of frequencies between 200 Hz and 4 kHz. Therefore it is beneficial to design circuits which transmit telephone signals that pass only certain frequencies and eliminate unwanted signals (noise) that could interfere with conversations and introduce error into control signals. The pass band of these circuits is defined as the ranges of frequencies that are passed. A telephone system voice frequency (VF) channel has a pass band of 0 Hz to 4 kHz. Specifically for human voices most of the energy content is found from 300 Hz to 3 kHz and any signal within this range is considered an in-band signal. Alternatively, any signal outside this range but within the VF channel is considered an out-of-band signal. To properly recover a voice signal in applications such as cellular phones, cordless phones, and voice pagers, a low power bandpass filter that is matched to the human voice spectrum can be implemented using an LMV641 op amp. Figure 9 shows a multi-feedback, multi-pole filter (2nd order response) with a gain of −1. The lower 3 dB cutoff frequency which is set by the DC blocking capacitor C1 and resistor R1 is 60 Hz and the upper cutoff frequency is 3.5 kHz. The total current consumption is a mere 138 µA. The LV641 is operating with a gain of −1, but the circuit is easily modified LMV641 Physical Dimensions inches (millimeters) unless otherwise noted 5-Pin SC70 NS Package Number MAA05A 8-Pin SOIC NS Package Number M08A www.national.com 16 LMV641 Notes 17 www.national.com LMV641 10 MHz, 12V, Low Power Amplifier Notes THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. 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