AD AD22151YR

a
Linear Output
Magnetic Field Sensor
AD22151
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Adjustable Offset to Unipolar or Bipolar Operation
Low Offset Drift Over Temperature Range
Gain Adjustable Over Wide Range
Low Gain Drift Over Temperature Range
Adjustable First Order Temperature Compensation
Ratiometric to VCC
REF
VCC/2
TEMP REF
OUT AMP
AD22151
APPLICATIONS
Automotive
Throttle Position Sensing
Pedal Position Sensing
Suspension Position Sensing
Valve Position Sensing
Industrial
Absolute Position Sensing
Proximity Sensing
ISOURCE
SWITCHES
DEMOD
VCC
GENERAL DESCRIPTION
The AD22151 is a linear magnetic field transducer. The sensor
output is a voltage proportional to a magnetic field applied
perpendicularly to the package top surface.
NC
R1
R2
The sensor combines integrated bulk Hall cell technology and
instrumentation circuitry to minimize temperature related drifts
associated with silicon Hall cell characteristics. The architecture
maximizes the advantages of a monolithic implementation while
allowing sufficient versatility to meet varied application requirements with a minimum number of components.
Principle features include dynamic offset drift cancellation and a
built-in temperature sensor. Designed for single +5 volt supply
operation, the AD22151 achieves low drift offset and gain operation over –40°C to +150°C. Temperature compensation can
accommodate a number of magnetic materials commonly utilized in economic position sensor assemblies.
0.1mF
R3
OUTPUT
NC = NO CONNECT
GND
AD22151
Figure 1. Typical Bipolar Configuration with Low
(< –500 ppm) Compensation
VCC
The transducer may be configured for specific signal gains dependent upon application requirements. Output voltage can be
adjusted from fully bipolar (reversible) field operation to fully
unipolar field sensing.
R1
R4
NC
The voltage output achieves near rail-to-rail dynamic range,
capable of supplying 1 mA into large capacitive loads. The signal is ratiometric to the positive supply rail in all configurations.
R2
0.1mF
R3
OUTPUT
GND
NC = NO CONNECT
AD22151
Figure 2. Typical Unipolar Configuration with High
(≈ –2000 ppm) Compensation
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1997
AD22151–SPECIFICATIONS
(TA = +258C and V+ = +5 V unless otherwise noted)
Parameters
Min
Typ
Max
Units
OPERATION
VCC Operating
ICC Operating
4.5
5.0
6.0
6.0
10
V
mA
INPUT
TC3 (Pin 3) Sensitivity/Volt
Input Range1
OUTPUT2
Sensitivity (External Adjustment, Gain = 1)
Linear Output Range
Output Min
Output Max (Clamp)
Drive Capability
µV/G/V
V CC
± 0.5
2
V
0.4
10
mV/G
% of VCC
% of VCC
% of VCC
mA
90
5
93
1.0
V CC
2
Offset @ 0 Gauss
Offset Adjust Range
Output Short Circuit Current
160
V
5
95
ACCURACIES
Nonlinearity (10% to 90% Range)
Gain Error (Over Temperature Range)
Offset Error (Over Temperature Range)
Uncompensated Gain TC (GTCU)
5.0
% of VCC
mA
0.1
±1
± 6.0
950
% FS
%
G
ppm
RATIOMETRICITY ERROR
1
%V/VCC
3 dB ROLL-OFF (5 mV/G)
5.7
kHz
OUTPUT NOISE FIGURE (6 kHz BW)
2.4
mV/rms
PACKAGE
8-Lead SOIC
OPERATING TEMPERATURE RANGE
–40
°C
+150
NOTES
1
–40°C to +150°C.
2
RL = 4.7 kΩ.
Specifications subject to change without notice.
ORDERING GUIDE
ABSOLUTE MAXIMUM RATING*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 V
Package Power Dissipation . . . . . . . . . . . . . . . . . . . . . 25 mW
Storage Temperature . . . . . . . . . . . . . . . . . . –50°C to +160°C
Output Sink Current, IO . . . . . . . . . . . . . . . . . . . . . . . 15 mA
Magnetic Flux Density . . . . . . . . . . . . . . . . . . . . . . Unlimited
Lead Temperature (Soldering 10 sec) . . . . . . . . . . . . . +300°C
Model
Temperature
Range
Package
Description
Package
Option
AD22151YR
–40°C to +150°C
8-Lead SOIC
SO-8
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; the functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to the absolute maximum
rating conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD22151 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–2–
WARNING!
ESD SENSITIVE DEVICE
REV. 0
AD22151
PIN CONFIGURATION
TC1 1
AD22151
TC2 2
8
VCC
7
REF
PIN FUNCTION DESCRIPTIONS
TOP VIEW
TC3 3 (Not to Scale) 6 GAIN
GND 4
5
OUTPUT
AREA OF SENSITIVITY*
1
8
2
7
3
4
Pin No.
Description
Connection
1
2
3
4
5
6
7
8
Temperature Compensation 1
Temperature Compensation 2
Temperature Compensation 3
Ground
Output
Gain
Reference
Positive Power Supply
Output
Output
Input/Output
Output
Input
Output
6
(Not to Scale)
5
* SHADED AREA REPRESENTS
MAGNETIC FIELD AREA OF
SENSITIVITY (20MILS 3 20MILS)
• POSITIVE B FIELD INTO TOP OF
PACKAGE RESULTS IN A POSITIVE
VOLTAGE RESPONSE
“valleys” of the silicon crystal. Mechanical force on the sensor
is attributable to package-induced stress. The package material
acts to distort the encapsulated silicon altering the Hall cell gain
by ± 2% and GTCU by ± 200 ppm.
CIRCUIT OPERATION
The AD22151 consists of epi Hall plate structures located at
the center of the die. The Hall plates are orthogonally sampled
by commutation switches via a differential amplifier. The two
amplified Hall signals are synchronously demodulated to provide a resultant offset cancellation (see Figure 3). The demodulated signal passes through a noninverting amplifier to provide
final gain and drive capability. The frequency at which the
output signal is refreshed is 50 kHz.
Figure 4 shows the typical GTCU characteristic of the AD22151.
This is the observable alteration of gain with respect to temperature with Pin 3 (TC3) held at a constant 2.5 V (uncompensated).
If a permanent magnet source used in conjunction with the
sensor also displays an intrinsic TC (BTC), it will require factoring into the total temperature compensation of the sensor
assembly.
0.005
0.004
Figures 5 and 6 represent typical overall temperature/gain performance for a sensor and field combination (BTC = –200 ppm).
Figure 5 is the total drift in volts over a –40°C to +150°C temperature range with respect to applied field. Figure 6 represents
typical percentage gain variation from +25°C. Figures 7 and 8
show similar data for a BTC = –2000 ppm.
0.003
OFFSET – Volts
0.002
0.001
0
–0.001
14
–0.002
12
–0.003
8
120
100
80
60
40
20
TEMPERATURE – 8C
0
–20
–40
% GAIN
–0.004
140
10
Figure 3. Relative Quiescent Offset vs. Temperature
6
4
2
TEMPERATURE DEPENDENCIES
0
The uncompensated gain temperature coefficient (GTCU) of the
AD22151 is the result of fundamental physical properties associated with silicon bulk Hall plate structures. Low doped Hall
plates operated in current bias mode exhibit a temperature
relationship determined by the action of scattering mechanisms
and doping concentration.
–2
–4
–6
–40
60
TEMPERATURE – 8C
110
160
Figure 4. Uncompensated Gain Variation (from +25 °C) vs.
Temperature
The relative value of sensitivity to magnetic field can be altered
by the application of mechanical force upon silicon. The mechanism is principally the redistribution of electrons throughout the
REV. 0
10
–3–
AD22151
0.025
2.0
1.8
0.020
1.4
0.015
1.2
% GAIN
DELTA SIGNAL – Volts
1.6
0.010
1.0
0.8
0.6
0.005
0.4
0.2
0
–600
0
–400
–200
0
200
FIELD – Gauss
400
600
–0.2
–40
Figure 5. Signal Drift Over Temperature (–40 °C to +150 °C)
vs. Field (–200 ppm); +5 V Supply
110
160
TEMPERATURE COMPENSATION
The AD22151 incorporates a “thermistor” transducer that
detects relative chip temperature within the package. This
function provides a compensation mechanism for the various
temperature dependencies of the Hall cell and magnet combinations. The temperature information is accessible at Pins 1 and 2
(≈ +2900 ppm /°C) and Pin 3 (≈ –2900 ppm/°C) as represented
by Figure 9. The compensation voltages are trimmed to converge at VCC/2 at +25°C. Pin 3 is internally connected to the
negative TC voltage via an internal resistor (see Functional
Block Diagram). An external resistor connected between Pin 3
and Pins 1 or 2 will produce a potential division of the two complementary TC voltages to provide optimal compensation. The
aforementioned Pin 3 internal resistor provides a secondary TC
designed to reduce second order Hall cell temperature sensitivity.
0.20
0.15
0.10
0.05
0
–0.05
–40
10
60
TEMPERATURE – 8C
110
160
Figure 6. Gain Variation from +25 °C vs. Temperature
(–200 ppm) Field; R1 –15 kΩ
1.0
0.8
TC1, TC2 VOLTS
0.6
VOLTS – Reference
0.045
0.040
0.035
DELTA SIGNAL – Volts
60
TEMPERATURE – 8C
Figure 8. Gain Variation (from +25 °C) vs. Temperature
(–2000 ppm Field; R1 = 12 kΩ)
0.25
% GAIN
10
0.030
0.4
0.2
0
–0.2
–0.4
TC3 VOLTS
0.025
–0.6
0.020
–0.8
0.015
–1.0
150
0.010
36
74
TEMPERATURE – 8C
–2
–40
Figure 9. TC1, TC2 and TC3 with Respect to Reference vs.
Temperature
0.005
0
–800
112
–600
–400
–200
0
200
FIELD – Gauss
400
600
800
The voltages present at Pins 1, 2 and 3 are proportional to the
supply voltage. The presence of the Pin 2 internal resistor
distinguishes the effective compensation ranges of Pins 1 and 2
(see temperature configuration in Figures 1 and 2, and typical
resistor values in Figures 10 and 11).
Figure 7. Signal Drift Over Temperature (–40 °C to +150 °C)
vs. Field (–2000 ppm); +5 V Supply
Variation occurs in the operation of the gain temperature
compensation for two reasons. First, the die temperature within
–4–
REV. 0
AD22151
the package is somewhat higher than the ambient temperature
due to self-heating as a function of power dissipation. Second,
package stress effect alters the specific operating parameters of
the gain compensation, particularly the specific cross over
temperature of TC1, TC3 ( ≈ ± 10°C).
800
600
DRIFT – ppm
400
CONFIGURATION AND COMPONENT SELECTION
There are three areas of sensor operation that require external
component selection. Temperature compensation (R1), signal
gain (R2 and R3), and offset (R4).
200
0
–200
Temperature
–400
If the internal gain compensation is used, an external resistor is
required to complete the gain TC circuit at Pin 3. A number of
factors contribute to the value of this resistor.
–600
0
a. The intrinsic Hall cell sensitivity TC ≈ 950 ppm.
b. Package induced stress variation in a. ≈ ± 150 ppm.
c. Specific field TC ≈ –200 ppm (Alnico), –2000 ppm
(Ferrite), 0 ppm (electromagnet) etc.
d. R1, TC.
10
15
20
25
30
R1 – kV
35
40
45
GAIN AND OFFSET
The operation of the AD22151 can be bipolar (i.e., 0 Gauss =
VCC/2) or a ratiometric offset can be implemented to Position
Zero Gauss point at some other potential (i.e., 0.25 V).
The gain of the sensor can be set by the appropriate R2 and R3
resistor values (see Figure 1) such that:
Pin 2 uses an internal resistive TC to optimize smaller field
coefficients such as Alnico, down to 0 ppm coefficients when
only the sensor gain TC itself is dominant. The TC of R1 itself
will also effect the compensation and as such a low TC resistor
(± 50 ppm) is recommended.
Gain = 1+
R3
× 0.4 mV /G
R2
(1)
However, if an offset is required to position the quiescent output at some other voltage then the gain relationship is modified
to:
Figures 10 and 11 indicate R1 resistor values and their associated effectiveness for Pins 1 and 2 respectively. Note that the
indicated drift response in both cases incorporates the intrinsic
Hall sensitivity TC (BTCU).
Gain = 1+
For example, the AD22151 sensor is to be used in conjunction
with an Alnico material permanent magnet. The TC of such
magnets is ≈ –200 ppm (see Figures 5 and 6). Figure 11 indicates that a compensating drift of +200 ppm at Pin 3 requires a
nominal value of R1 = 18 kΩ (assuming negligible drift of R1
itself).
R3
× 0.4 mV /G
(R2iR4)
(2)
The offset that R4 introduces is:
Offset =
(
R3
× V CC –V OUT
(R3 + R4)
)
(3)
For example:
At VCC = 5 V at room temperature, the internal gain of the
sensor is approximately 0.4 mV/Gauss. If a sensitivity of 6 mV/
Gauss is required with a quiescent output voltage of 1 V, the
following calculations apply (see Figure 2 ).
3500
3000
A value for R3 would be selected that complied with the various
considerations of current and power dissipation, trim ranges (if
applicable), etc. For the purpose of example assume a value of
85 kΩ.
2500
2000
1500
To achieve a quiescent offset of 1 V requires a value for R4 as:
1000
V CC 
 2  –1


500
V CC –1
0
0
5
10
15
R1 – kV
20
25
= 0.375
(4)
30
Thus:
Figure 10. Typical Resistor Value R1 vs. (Pins 1 and 3)
Drift Compensation
 85 kΩ
R4 = 
 – 85 kΩ = 141.666 kΩ
 0.375 
The gain required would be 6/0.4 (mV/Gauss) = 15
REV. 0
50
Figure 11. Typical Resistor Value R1 (Pins 2 and 3) vs.
Drift Compensation
The final value of target compensation also dictates the use of
either Pin 1 or Pin 2. Pin 1 is provided to allow for large negative field TC such as ferrite magnets, thus R1 would be connected to Pins 1 and 3.
DRIFT – ppm
5
–5–
(5)
AD22151
Knowing the values of R3 and R4 from above, and noting Equation 2, the parallel combination of R2 and R4 required is:
7
6
(15 –1)
3dB FREQ. (kHz)
= 6.071 kΩ
5
FREQUENCY– kHz
85 kΩ
Thus:




1
 = 6.342 kΩ
R2 = 

 

1
1

 –

  6.071 kΩ 141.666 kΩ 
4
3
2
1
0
1
NOISE
The principle noise component in the sensor is thermal noise
from the Hall cell. Clock feedthrough into the output signal is
largely suppressed with application of a supply bypass capacitor.
5
6
[
CH2 PK-PK
19.2mV
2
T
CH2 10.0mV
BW
M2.00ms
Figure 14a. Peak-to-Peak Full Bandwidth (10 mV/Division)
Note: Measurements taken with 0.1 µF decoupling capacitor
between VCC and GND at +25°C.
7ACQS
T
TEK STOP: 25.0 kS/s [
[
Y: 3.351 mH
CH2 PK-PK
4.4mV
LOGMAG
5 dB
/div
2
T
CH2 10.0mV
1
mH
3ACQS
T
TEK STOP: 25.0 kS/s [
In many position sensing applications bandwidth requirements
can be as low as 100 Hz. Passing the output signal through an
LP filter, for example 100 Hz, would reduce the rms noise voltage to ≈1 mV. A dominant pole may be introduced into the
output amplifier response by connection of a capacitor across
feedback resistor R3, as a simple means of reducing noise at the
expense of bandwidth. Figure 14b indicates the output signal of
a 5 mV/G sensor bandwidth limited to 180 Hz with a 0.01 µF
feedback capacitor.
B MARKER X 64Hz
3
4
GAIN – mV/GAUSS
Figure 13. Small-Signal Gain Bandwidth
Figure 12 shows the power spectral density (PSD) of the output
signal for a gain of 5 mV/Gauss. The effective bandwidth of the
sensor is approximately 5.7 kHz. This is shown by Figure 13
small signal bandwidth vs. gain. The PSD indicates an rms
noise voltage of 2.8 mV within the 3 dB bandwidth of the sensor. A wideband measurement of 250 MHz indicates 3.2 mV
rms (see Figure 14a).
100
mH
2
BW
M2.00ms
Figure 14b. Peak-to-Peak 180 Hz Bandwidth
(10 mV/Division)
START: 64 Hz
NOISE: PSD (8 mV/GAUSS)
STOP: 25.6 kHz
RMS: 64
Figure 12. Power Spectral Density (5 mV/G)
–6–
REV. 0
AD22151
0.06
2.496
0.05
2.494
0.04
0.03
2.492
% ERROR
0.02
VOLTS
0.01
0
2.490
GAIN = 3.78mV/G
–0.01
2.488
–0.02
–0.03
2.486
–0.04
–0.05
–600
–400
–200
0
200
FIELD – Gauss
400
2.484
140
600
Figure 15. Integral Nonlinearity vs. Field
REV. 0
120
100
80
60
40
20
TEMPERATURE – 8C
0
–20
–40
Figure 16. Absolute Offset Volts vs. Temperature
–7–
AD22151
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead SOIC
(SO-8)
0.1574 (4.00)
0.1497 (3.80)
PIN 1
SEATING
PLANE
5
1
4
0.2440 (6.20)
0.2284 (5.80)
0.0688 (1.75)
0.0532 (1.35)
0.0500 0.0192 (0.49)
(1.27) 0.0138 (0.35)
BSC
0.0196 (0.50)
x 45°
0.0099 (0.25)
0.0098 (0.25)
0.0075 (0.19)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
PRINTED IN U.S.A.
0.0098 (0.25)
0.0040 (0.10)
8
C3213–8–10/97
0.1968 (5.00)
0.1890 (4.80)
–8–
REV. 0