NSC SM72482MAE-4

SM72482
SolarMagic Dual 5A Compound Gate Driver
General Description
The SM72482 Dual Gate Driver replaces industry standard
gate drivers with improved peak output current and efficiency.
Each “compound” output driver stage includes MOS and bipolar transistors operating in parallel that together sink more
than 5A peak from capacitive loads. Combining the unique
characteristics of MOS and bipolar devices reduces drive current variation with voltage and temperature. Under-voltage
lockout protection is also provided. The drivers can be operated in parallel with inputs and outputs connected to double
the drive current capability. This device is available in the
SOIC-8 package.
Features
■ Renewable Energy Grade
■ Independently drives two N-Channel MOSFETs
■ Compound CMOS and bipolar outputs reduce output
■ Fast rise and fall times (14 ns/12 ns rise/fall with 2 nF load)
■ Available in dual non-inverting, dual inverting and
combination configurations
■ Supply rail under-voltage lockout protection (UVLO)
■ SM72482 UVLO configured to drive PFET through OUT_A
and NFET through OUT_B
■ Pin compatible with industry standard gate drivers
Typical Applications
■ Synchronous Rectifier Gate Drivers
■ Switch-mode Power Supply Gate Driver
■ Solenoid and Motor Drivers
Packages
■ SOIC-8
■ Thermally Enhanced MSOP8–EP
current variation
■ 5A sink/3A source current capability
■ Two channels can be connected in parallel to double the
drive current
■ Independent inputs (TTL compatible)
■ Fast propagation times (25 ns typical)
Connection Diagram
30142201
SOIC-8, eMSOP-8
© 2011 National Semiconductor Corporation
301422
www.national.com
SM72482 SolarMagic Dual 5A Compound Gate Driver
May 9, 2011
SM72482
Ordering Information
Package Type
NSC Package Drawing
Package Marking
SM72482MY-1
Order Number
MSOP–8–EP
MUY08A
SD8B
Supplied As
1000 Units in Tape and Reel
SM72482MYE-1
MSOP–8–EP
MUY08A
SD8B
250 Units in Tape and Reel
SM72482MYX-1
MSOP–8–EP
MUY08A
SD8B
3500 Units in Tape and Reel
SM72482MA-4
SOIC-8
M08A
S482
95 Units in Rail
SM72482MAE-4
SOIC-8
M08A
S482
250 Units in Tape and Reel
SM72482MAX-4
SOIC-8
M08A
S482
2500 Units in Tape and Reel
Pin Descriptions
Pin
Name
Description
Application Information
1
NC
No Connect
2
IN_A
‘A’ side control input
TTL compatible thresholds.
3
VEE
Ground reference for both inputs and
outputs
Connect to power ground.
4
IN_B
‘B’ side control input
TTL compatible thresholds.
5
OUT_B
Output for the ‘B’ side driver.
Voltage swing of this output is from VCC to VEE. The output
stage is capable of sourcing 3A and sinking 5A.
6
VCC
Positive output supply
Locally decouple to VEE.
7
OUT_A.
Output for the ‘A’ side driver.
Voltage swing of this output is from VCC to VEE. The output
stage is capable of sourcing 3A and sinking 5A.
8
NC
No Connect
Configuration Table
“A” Output Configuration
“B” Output Configuration
Package
SM72482MY-1
Non-Inverting (Low in UVLO)
Non-Inverting (Low in UVLO)
MSOP8–EP
SM72482MA-4
Inverting (High in UVLO)
Non-Inverting (Low in UVLO)
SOIC-8
Part Number
www.national.com
2
SM72482
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VCC to VEE
IN to VEE
Storage Temperature Range, (TSTG)
Maximum Junction Temperature,
(TJ(max))
Operating Junction Temperature
ESD Rating
−0.3V to 15V
−0.3V to 15V
−55°C to +150°C
+150°C
+125°C
2kV
Electrical Characteristics
TJ = −40°C to +125°C, VCC = 12V, VEE = 0V, No Load on OUT_A or OUT_B, unless otherwise specified.
Symbol
Parameter
Conditions
Min
VCC Operating Range
VCC−VEE
3.5
VCCR
VCC Under Voltage Lockout
(rising)
VCC−VEE
2.3
VCCH
VCC Under Voltage Lockout
Hysteresis
ICC
VCC Supply Current (ICC)
Typ
2.9
Max
Units
14
V
3.5
V
230
mV
IN_A = IN_B = 0V (SM72482MY-1)
1
2
IN_A = VCC, IN_B = 0V
(SM72482MA-4)
1
2
mA
CONTROL INPUTS
VIH
Logic High
VIL
Logic Low
VthH
High Threshold
1.3
VthL
Low Threshold
0.8
HYS
Input Hysteresis
IIL
Input Current Low
IN_A=IN_B=VCC
−1
0.1
1
IIH
Input Current High
IN_A=IN_B=VCC(SM72482MY-1)
10
18
25
IN_B=VCC (SM72482MA-4)
10
18
25
IN_A=VCC (SM72482MA-4)
-1
0.1
1
2.2
V
0.8
V
1.75
2.2
V
1.35
2.0
V
400
mV
µA
OUTPUT DRIVERS
ROH
Output Resistance High
IOUT = −10 mA (Note 2)
30
50
Ω
ROL
Output Resistance Low
IOUT = + 10 mA (Note 2)
1.4
2.5
Ω
ISource
Peak Source Current
OUTA/OUTB = VCC/2,
200 ns Pulsed Current
3
A
ISink
Peak Sink Current
OUTA/OUTB = VCC/2,
200 ns Pulsed Current
5
A
3
www.national.com
SM72482
Symbol
Parameter
Conditions
Min
Typ
Max
Units
SWITCHING CHARACTERISTICS
td1
Propagation Delay Time Low to
High, IN rising (IN to OUT)
CLOAD = 2 nF, see Figure 1
25
40
ns
td2
Propagation Delay Time High to
Low, IN falling (IN to OUT)
CLOAD = 2 nF, see Figure 1
25
40
ns
tr
Rise Time
CLOAD = 2 nF, see Figure 1
14
25
ns
tf
Fall Time
CLOAD = 2 nF, see Figure 1
12
25
ns
TJ = 150°C
500
Junction to Ambient,
0 LFPM Air Flow
SOIC-8 Package
170
MSOP8–EP Package
60
Junction to Case
SOIC-8 Package
70
MSOP8–EP Package
4.7
LATCHUP PROTECTION
AEC - Q100, Method 004
mA
THERMAL RESISTANCE
θJA
θJC
°C/W
°C/W
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: The output resistance specification applies to the MOS device only. The total output current capability is the sum of the MOS and Bipolar devices.
Timing Waveforms
30142206
30142205
(b)
(a)
FIGURE 1. (a) Inverting, (b) Non-Inverting
www.national.com
4
SM72482
Typical Performance Characteristics
Supply Current vs Frequency
Supply Current vs Capacitive Load
30142211
30142210
Rise and Fall Time vs Supply Voltage
Rise and Fall Time vs Temperature
30142212
30142213
5
www.national.com
SM72482
Rise and Fall Time vs Capacitive Load
Delay Time vs Supply Voltage
30142214
30142215
Delay Time vs Temperature
RDSON vs Supply Voltage
30142217
30142216
UVLO Thresholds and Hysteresis vs Temperature
30142218
www.national.com
6
SM72482
Block Diagram
30142203
Block Diagram of SM72482
7
www.national.com
SM72482
Detailed Operating Description
Layout Considerations
The SM72482 dual gate driver consists of two independent
and identical driver channels with TTL compatible logic inputs
and high current totem-pole outputs that source or sink current to drive MOSFET gates. The driver output consist of a
compound structure with MOS and bipolar transistor operating in parallel to optimize current capability over a wide output
voltage and operating temperature range. The bipolar device
provides high peak current at the critical threshold region of
the MOSFET VGS while the MOS devices provide rail-to-rail
output swing. The totem pole output drives the MOSFET gate
between the gate drive supply voltage VCC and the power
ground potential at the VEE pin.
The control inputs of the drivers are high impedance CMOS
buffers with TTL compatible threshold voltages. The
SM72482 pinout was designed for compatibility with industry
standard gate drivers in single supply gate driver applications.
The input stage of each driver should be driven by a signal
with a short rise and fall time. Slow rising and falling input
signals, although not harmful to the driver, may result in the
output switching repeatedly at a high frequency.
The two driver channels of the SM72482 are designed as
identical cells. Transistor matching inherent to integrated circuit manufacturing ensures that the AC and DC peformance
of the channels are nearly identical. Closely matched propagation delays allow the dual driver to be operated as a single
with inputs and output pins connected. The drive current capability in parallel operation is precisely 2X the drive of an
individual channel. Small differences in switching speed between the driver channels will produce a transient current
(shoot-through) in the output stage when two output pins are
connected to drive a single load. Differences in input thresholds between the driver channels will also produce a transient
current (shoot-through) in the output stage. Fast transition input signals are especially important while operating in a parallel configuration. The efficiency loss for parallel operation
has been characterized at various loads, supply voltages and
operating frequencies. The power dissipation in the SM72482
increases less than 1% relative to the dual driver configuration
when operated as a single driver with inputs/ outputs connected.
An Under Voltage Lock Out (UVLO) circuit is included in the
SM72482, which senses the voltage difference between
VCC and the chip ground pin, VEE. When the VCC to VEE voltage difference falls below 2.8V both driver channels are disabled. The UVLO hysteresis prevents chattering during
brown-out conditions and the driver will resume normal operation when the VCC to VEE differential voltage exceeds approximately 3.0V.
The SM72482MY –1 device hold both outputs in the low state
in the under-voltage lockout (UVLO) condition. The
SM72482MA–4 has an active high output state of OUT_A
during UVLO. When VCC is less than the UVLO threshold
voltage, OUT_A will be locked in the high state while OUT_B
will be disabled in the low state. This configuration allows the
SM72482MY –4 to drive a PFET through OUT_A and an
NFET through OUT_B with both FETs safely turned off during
UVLO.
Attention must be given to board layout when using SM72482.
Some important considerations include:
1. A Low ESR/ESL capacitor must be connected close to
the IC and between the VCC and VEE pins to support high
peak currents being drawn from VCC during turn-on of the
MOSFET.
2. Proper grounding is crucial. The drivers need a very low
impedance path for current return to ground avoiding
inductive loops. The two paths for returning current to
ground are a) between SM72482 VEE pin and the ground
of the circuit that controls the driver inputs, b) between
SM72482 VEE pin and the source of the power MOSFET
being driven. All these paths should be as short as
possible to reduce inductance and be as wide as possible
to reduce resistance. All these ground paths should be
kept distinctly separate to avoid coupling between the
high current output paths and the logic signals that drive
the SM72482. A good method is to dedicate one copper
plane in a multi-layered PCB to provide a common
ground surface.
3. With the rise and fall times in the range of 10 ns to 30 ns,
care is required to minimize the lengths of current
carrying conductors to reduce their inductance and EMI
from the high di/dt transients generated by the SM72482.
4. The SM72482 footprint is compatible with other industry
standard drivers including the TC4426/27/28 and
UCC27323/4/5.
5. If either channel is not being used, the respective input
pin (IN_A or IN_B) should be connected to either VEE or
VCC to avoid spurious output signals.
www.national.com
Thermal Performance
INTRODUCTION
The primary goal of thermal management is to maintain the
integrated circuit (IC) junction temperature (TJ) below a specified maximum operating temperature to ensure reliability. It
is essential to estimate the maximum TJ of IC components in
worst case operating conditions. The junction temperature is
estimated based on the power dissipated in the IC and the
junction to ambient thermal resistance θJA for the IC package
in the application board and environment. The θJA is not a
given constant for the package and depends on the printed
circuit board design and the operating environment.
DRIVE POWER REQUIREMENT CALCULATIONS IN
SM72482
The SM72482 dual low side MOSFET driver is capable of
sourcing/sinking 3A/5A peak currents for short intervals to
drive a MOSFET without exceeding package power dissipation limits. High peak currents are required to switch the
MOSFET gate very quickly for operation at high frequencies.
8
PD = 0.216 + 0.008 + 0.012 = 0.236W.
We know that the junction temperature is given by
TJ = PD x θJA + TA
Or the rise in temperature is given by
TRISE = TJ − TA = PD x θJA
For SOIC-8 package θJA is estimated as 170°C/W for the
conditions of natural convection. For MSOP8-EP θJA is typically 60°C/W.
Therefore for SOIC TRISE is equal to
30142207
FIGURE 2.
The schematic above shows a conceptual diagram of the
SM72482 output and MOSFET load. Q1 and Q2 are the
switches within the gate driver. RG is the gate resistance of
the external MOSFET, and CIN is the equivalent gate capacitance of the MOSFET. The gate resistance Rg is usually very
small and losses in it can be neglected. The equivalent gate
capacitance is a difficult parameter to measure since it is the
combination of CGS (gate to source capacitance) and CGD
(gate to drain capacitance). Both of these MOSFET capacitances are not constants and vary with the gate and drain
voltage. The better way of quantifying gate capacitance is the
total gate charge QG in coloumbs. QG combines the charge
required by CGS and CGD for a given gate drive voltage
VGATE.
Assuming negligible gate resistance, the total power dissipated in the MOSFET driver due to gate charge is approximated by
TRISE = 0.236 x 170 = 40.1°C
CONTINUOUS CURRENT RATING OF SM72482
The SM72482 can deliver pulsed source/sink currents of 3A
and 5A to capacitive loads. In applications requiring continuous load current (resistive or inductive loads), package power
dissipation, limits the SM72482 current capability far below
the 5A sink/3A source capability. Rated continuous current
can be estimated both when sourcing current to or sinking
current from the load. For example when sinking, the maximum sink current can be calculated as:
where R DS(on) is the on resistance of lower MOSFET in the
output stage of SM72482.
Consider TJ(max) of 125°C and θJA of 170°C/W for an SO-8
package under the condition of natural convection and no air
flow. If the ambient temperature (TA) is 60°C, and the RDS(on)
of the SM72482 output at TJ(max) is 2.5Ω, this equation yields
ISINK(max) of 391mA which is much smaller than 5A peak
pulsed currents.
Similarly, the maximum continuous source current can be
calculated as
PDRIVER = VGATE x QG x FSW
Where
FSW = switching frequency of the MOSFET.
For example, consider the MOSFET MTD6N15 whose gate
charge specified as 30 nC for VGATE = 12V.
The power dissipation in the driver due to charging and discharging of MOSFET gate capacitances at switching frequency of 300 kHz and VGATE of 12V is equal to
PDRIVER = 12V x 30 nC x 300 kHz = 0.108W.
If both channels of the SM72482 are operating at equal frequency with equivalent loads, the total losses will be twice as
this value which is 0.216W.
In addition to the above gate charge power dissipation, - transient power is dissipated in the driver during output transitions. When either output of the SM72482 changes state,
current will flow from VCC to VEE for a very brief interval of time
through the output totem-pole N and P channel MOSFETs.
The final component of power dissipation in the driver is the
power associated with the quiescent bias current consumed
by the driver input stage and Under-voltage lockout sections.
where VDIODE is the voltage drop across hybrid output stage
which varies over temperature and can be assumed to be
about 1.1V at TJ(max) of 125°C. Assuming the same parameters as above, this equation yields ISOURCE(max) of 347mA.
9
www.national.com
SM72482
Characterization of the SM72482 provides accurate estimates of the transient and quiescent power dissipation components. At 300 kHz switching frequency and 30 nC load used
in the example, the transient power will be 8 mW. The 1 mA
nominal quiescent current and 12V VGATE supply produce a
12 mW typical quiescent power.
Therefore the total power dissipation
SM72482
Physical Dimensions inches (millimeters) unless otherwise noted
NOTES: UNLESS OTHERWISE SPECIFIED
1. STANDARD LEAD FINISH TO BE 200 MICROINCHES/5.08 MICROMETERS MINIMUM LEAD/TIN(SOLDER) ON COPPER.
2.
3.
DIMENSION DOES NOT INCLUDE MOLD FLASH.
REFERENCE JEDEC REGISTRATION MS-012, VARIATION AA, DATED MAY 1990.
8-Lead SOIC Package
NS Package Number M08A
8-Lead Exposed Pad MSOP Package
NS Package Number MUY08A
www.national.com
10
SM72482
11
www.national.com
SM72482 SolarMagic Dual 5A Compound Gate Driver
Notes
For more National Semiconductor product information and proven design tools, visit the following Web sites at:
www.national.com
Products
Design Support
Amplifiers
www.national.com/amplifiers
WEBENCH® Tools
www.national.com/webench
Audio
www.national.com/audio
App Notes
www.national.com/appnotes
Clock and Timing
www.national.com/timing
Reference Designs
www.national.com/refdesigns
Data Converters
www.national.com/adc
Samples
www.national.com/samples
Interface
www.national.com/interface
Eval Boards
www.national.com/evalboards
LVDS
www.national.com/lvds
Packaging
www.national.com/packaging
Power Management
www.national.com/power
Green Compliance
www.national.com/quality/green
Switching Regulators
www.national.com/switchers
Distributors
www.national.com/contacts
LDOs
www.national.com/ldo
Quality and Reliability
www.national.com/quality
LED Lighting
www.national.com/led
Feedback/Support
www.national.com/feedback
Voltage References
www.national.com/vref
Design Made Easy
www.national.com/easy
www.national.com/powerwise
Applications & Markets
www.national.com/solutions
Mil/Aero
www.national.com/milaero
PowerWise® Solutions
Serial Digital Interface (SDI) www.national.com/sdi
Temperature Sensors
www.national.com/tempsensors SolarMagic™
www.national.com/solarmagic
PLL/VCO
www.national.com/wireless
www.national.com/training
PowerWise® Design
University
THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION
(“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY
OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO
SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS,
IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS
DOCUMENT.
TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT
NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL
PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR
APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND
APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE
NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS.
EXCEPT AS PROVIDED IN NATIONAL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO
LIABILITY WHATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE
AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR
PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY
RIGHT.
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and
whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected
to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform
can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness.
National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other
brand or product names may be trademarks or registered trademarks of their respective holders.
Copyright© 2011 National Semiconductor Corporation
For the most current product information visit us at www.national.com
National Semiconductor
Americas Technical
Support Center
Email: [email protected]
Tel: 1-800-272-9959
www.national.com
National Semiconductor Europe
Technical Support Center
Email: [email protected]
National Semiconductor Asia
Pacific Technical Support Center
Email: [email protected]
National Semiconductor Japan
Technical Support Center
Email: [email protected]