DG408/409 Vishay Siliconix 8-Ch/Dual 4-Ch High-Performance CMOS Analog Multiplexers Low On-Resistance—rDS(on): 100 Low Charge Injection—Q: 20 pC Fast Transition Time—tTRANS: 160 ns Low Power—ISUPPLY: 10 A Single Supply Capability 44-V Supply Max Rating TTL Compatible Logic Reduced Switching Errors Reduced Glitching Improved Data Throughput Reduced Power Consumption Increased Ruggedness Wide Supply Ranges (5 V to 20 V) Data Acquisition Systems Audio Signal Routing ATE Systems Battery Powered Systems High Rel Systems Single Supply Systems Medical Instrumentation The DG408 is an 8-channel single-ended analog multiplexer designed to connect one of eight inputs to a common output as determined by a 3-bit binary address (A0, A1, A2). The DG409 is a dual 4-channel differential analog multiplexer designed to connect one of four differential inputs to a common dual output as determined by its 2-bit binary address (A0, A1). Break-before-make switching action protects against momentary crosstalk between adjacent channels. An on channel conducts current equally well in both directions. In the off state each channel blocks voltages up to the power supply rails. An enable (EN) function allows the user to reset the multiplexer/demultiplexer to all switches off for stacking several devices. All control inputs, address (Ax) and enable (EN) are TTL compatible over the full specified operating temperature range. Applications for the DG408/409 include high speed data acquisition, audio signal switching and routing, ATE systems, and avionics. High performance and low power dissipation make them ideal for battery operated and remote instrumentation applications. Designed in the 44-V silicon-gate CMOS process, the absolute maximum voltage rating is extended to 44 V. Additionally, single supply operation is also allowed. An epitaxial layer prevents latchup. For additional information please see Technical Article TA201 (FaxBack Number 70600). DG408 DG409 Dual-In-Line SOIC and TSSOP A0 EN V– S1 S2 S3 S4 D 16 1 2 Decoders/Drivers 15 3 14 4 13 5 12 6 11 7 10 8 9 Dual-In-Line SOIC and TSSOP A1 A0 A2 EN GND V– V+ S1a S5 S2a S6 S3a S7 S4a S8 Da Top View Document Number: 70062 S-52433—Rev. E, 06-Sep-99 Powered by ICminer.com Electronic-Library Service CopyRight 2003 16 1 2 Decoders/Drivers 15 3 14 4 13 5 12 6 11 7 10 8 9 A1 GND V+ S1b S2b S3b S4b Db Top View www.siliconix.com FaxBack 408-970-5600 5-1 DG408/409 Vishay Siliconix TRUTH TABLES AND ORDERING INFORMATION TRUTH TABLE Ċ DG408 TRUTH TABLE Ċ DG409 A2 A1 A0 EN On Switch A1 A0 EN On Switch X X X 0 None X X 0 None 0 0 0 1 1 0 0 1 1 0 0 1 1 2 0 1 1 2 0 1 0 1 3 1 0 1 3 0 1 1 1 4 1 1 1 4 1 0 0 1 5 1 0 1 1 6 1 1 0 1 7 1 1 1 1 8 ORDERING INFORMATION Ċ DG408 Temp Range –40 40 to 85_C 85 C Package Part Number 16-Pin Plastic DIP DG408DJ 16-Pin SOIC DG408DY 16-Pin TSSOP DG408DQ Logic “0” = VAL v 0.8 V 1 = VAH w 2.4 V Logic “1” X = Don’t Care ORDERING INFORMATION Ċ DG409 Temp Range –40 40 to 85_C 85 C Package 16-Pin Plastic DIP DG409DJ 16-Pin SOIC DG409DY 16-Pin TSSOP DG409DQ DG408AK 16 Pi CerDIP C DIP 16-Pin DG409AK DG408AK/883 55 to 125 C –55 125_C Part Number 16 Pi CerDIP C DIP 16-Pin DG409AK/883 55 to 125 C –55 125_C 5962-9204201MEA LCC-20* 5962-9204201M2A 5962-9204202MEA LCC-20* 5962-9204202M2A *Block Diagram and Pin Configuration not shown. ABSOLUTE MAXIMUM RATINGS Voltage Referenced to V– V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V Digital Inputsa, VS, VD . . . . . . . . . . . . . . . . . . . . . . . . (V–) –2 V to (V+) +2 V or 20 mA, whichever occurs first Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA Peak Current, S or D (Pulsed at 1 ms, 10% Duty Cycle Max) . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Storage Temperature (AK Suffix) . . . . . . . . . . . . . . . . . . –65 to 150_C (DJ, DY Suffix) . . . . . . . . . . . . . . –65 to 125_C Power Dissipation (Package)b 16-Pin Plastic DIPc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW www.siliconix.com S FaxBack 408-970-5600 5-2 Powered by ICminer.com Electronic-Library Service CopyRight 2003 16-Pin Narrow SOIC and TSSOPd . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mW 16-Pin CerDIPe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW LCC-20f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 750 mW Notes a. Signals on SX, DX or INX exceeding V+ or V– will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads soldered or welded to PC board. c. Derate 6 mW/_C above 75_C. d. Derate 7.6 mW/_C above 75_C. e. Derate 12 mW/_C above 75_C. f. Derate 10 mW/_C above 75_C. Document Number: 70062 S-52433—Rev. E, 06-Sep-99 DG408/409 Vishay Siliconix SPECIFICATIONSa Test Conditions Unless Otherwise Specified A Suffix D Suffix –55 to 125_C –40 to 85_C V+ = 15 V, V– = –15 V VAL = 0.8 V, VAH = 2.4 Vf Tempb VANALOG Full rDS(on) VD = "10 V, IS = –10 mA Room Full DrDS(on) VD = "10 V Room Source Off Leakage Current IS(off) VS = "10 V, VD = #10 V VEN = 0 V Room Full –0.5 –50 0.5 50 –0.5 –5 0.5 5 ID(off) VD = "10 V VS = #10 V VEN = 0 V DG408 Drain Off Leakage Current Room Full –1 –100 1 100 –1 –20 1 20 DG409 Room Full –1 –50 1 50 –1 –10 1 10 VS = VD = "10 V Sequence Each Switch On DG408 Room Full –1 –100 1 100 –1 –20 1 20 DG409 Room Full –1 –50 1 50 –1 –10 1 10 2.4 Parameter Symbol Typc Mind Maxd Mind Maxd Unit Analog Switch Analog Signal Rangee Drain-Source On-Resistance rDS(on) Matching Between Channelsg Drain On Leakage Current ID(on) –15 40 15 V 100 125 15 –15 100 125 W 15 15 % nA A Digital Control Logic High Input Voltage VINH Full Logic Low Input Voltage VINL Full 2.4 Logic High Input Current IAH VA = 2.4 V, 15 V Full –10 10 –10 10 Logic Low Input Current IAL VEN = 0 V, 2.4 V, VA = 0 V Full –10 10 –10 10 Logic Input Capacitance Cin f = 1 MHz Room 8 Transition Time tTRANS See Figure 2 Full 160 Break-Before-Make Interval tOPEN See Figure 4 Room Enable Turn-On Time tON(EN) Room Full 115 150 225 150 See Figure g 3 Enable Turn-Off Time tOFF(EN) 150 150 0.8 0.8 V mA pF Dynamic Characteristics 250 10 250 10 ns Room 105 Q CL = 10 nF, VS = 0 V Room 20 pC Off Isolationh OIRR VEN = 0 V, RL = 1 kW f = 100 kHz Room –75 dB Source Off Capacitance CS(off) VEN = 0 V, VS = 0 V, f = 1 MHz Charge Injection Drain Off Capacitance CD(off) VEN = 0 V, V, VD = 0 V f = 1 MHz MH Drain On Capacitance CD(on) Room 3 DG408 Room 26 DG409 Room 14 DG408 Room 37 DG409 Room 25 Full 10 Full 1 Room Full 0.2 pF F Power Supplies Positive Supply Current I+ Negative Supply Current I– Positive Supply Current I+ Negative Supply Current I– VEN = VA = 0 V or 5 V VEN = 2.4 V,, VA = 0 V Document Number: 70062 S-52433—Rev. E, 06-Sep-99 Powered by ICminer.com Electronic-Library Service CopyRight 2003 Full 75 –75 75 –75 0.5 2 –500 0.5 2 –500 mA mA mA www.siliconix.com S FaxBack 408-970-5600 5-3 DG408/409 Vishay Siliconix Test Conditions Unless Otherwise Specified Symbol V+ = 12 V, V– = 0 V VAL = 0.8 V, VAH = 2.4 Vf Tempb Typc rDS(on) VD = 3 V, 10 V, IS = – 1 mA Room 90 Switching Time of Multiplexere tTRANS VS1 = 8 V, VS8 = 0 V, VIN = 2.4 V Room 180 Enable Turn On Timee tON(EN) 180 Timee tOFF(EN) VINH = 2.4 V,, VINL = 0 V VS1 = 5 V Room Room 120 Q CL = 1 nF, VS= 6 V, RS = 0 Room 5 Parameter A Suffix D Suffix –55 to 125_C –40 to 85_C Mind Maxd Mind Maxd Unit Analog Switch Drain-Source On-Resistancee, f W Dynamic Characteristics Enable Turn Off Charge Injectione ns pC Notes a. Refer to PROCESS OPTION FLOWCHART. b. Room = 25_C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. DrDS(on) = rDS(on) Max – rDS(on) Min. h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin. www.siliconix.com S FaxBack 408-970-5600 5-4 Powered by ICminer.com Electronic-Library Service CopyRight 2003 Document Number: 70062 S-52433—Rev. E, 06-Sep-99 DG408/409 Vishay Siliconix _ Drain Leakage Current vs. Source/Drain Voltage (Single 12-V Supply) Source/Drain Capacitance vs. Analog Voltage 80 60 VS = 0 V for ID(off) VS = VD for ID(on) V+ = 15 V V– = –15 V 40 60 CD(on) DG408 ID(off) CD(off) I D (pA) C S, D (pF) 20 40 DG409 ID(off) DG409 ID(on) 0 –20 20 DG408 ID(on) CS(off) –40 0 –60 –15 –10 –5 0 5 10 15 0 4 6 8 VD – Drain Voltage (V) 2 VANALOG – Analog Voltage (V) Drain Leakage Current vs. Source/DrainVoltage 100 Source Leakage Current vs. Source Voltage 15 –20 –60 –10 –10 –5 0 5 10 VD or VS — Drain or Source Voltage (V) 15 –15 Input Switching Threshold vs. Supply Voltage V TH (V) 1.5 1.0 0.5 ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ 0 –5 5 VS – Source Voltage (V) –10 10 15 Negative Supply Current vs. Switching Frequency –100 mA VSUPPLY = 15 V –10 mA –1 mA VEN = 2.4 V I– 2.0 V+ = 12 V V– = 0 V –5 DG408 ID(on), ID(off) –140 –15 5 0 DG409 ID(on) –100 V+ = 15 V V– = –15 V 10 DG409 ID(off) I S(off) (nA) I D (pA) 20 12 20 V+ = 15 V V– = –15 V VS = –VD for ID(off) VD = VS(open) for ID(on) 60 10 –100 A –10 A VEN = 0 V or 5 V –1 A –0.1 A 0.0 4 8 12 16 +VSUPPLY (V) Document Number: 70062 S-52433—Rev. E, 06-Sep-99 Powered by ICminer.com Electronic-Library Service CopyRight 2003 20 100 1k 10 k 100 k 1M 10 M Switching Frequency (Hz) www.siliconix.com S FaxBack 408-970-5600 5-5 DG408/409 Vishay Siliconix _ Positive Supply Current vs. Switching Frequency ISUPPLY vs. Temperature 100 mA 100 mA VSUPPLY = 15 V 10 mA 10 mA I+, I– 1 mA VEN = 2.4 V I+ I+ 1 mA 100 nA 10 nA 1 nA 100 A VSUPPLY = 15 V VA = 0 V VEN = 0 V –(I–) VEN = 0 V or 5 V 100 pA 10 A 10 pA 100 1k 10 k 100 k 1M –55 –35 10 M –15 25 5 Switching Frequency (Hz) 45 65 85 105 125 Temperature (_C) Positive Supply Current vs. Temperature (DG408) Charge Injection vs. Analog Voltage 90 CL = 10,000 pF VIN = 5 Vp-p 80 20 70 60 10 Q (pC) I+ ( A) 15 V+ = 15 V V– = –15 V VIN = 0 V VEN = 0 V 50 V+ = 15 V V– = –15 V 40 30 20 5 10 V+ = 12 V V– = 0 V 0 0 –55 5 –35 –15 45 25 85 65 –10 –15 125 105 –10 Temperature (_C) 5 15 10 VS – Source Voltage (V) rDS(on) vs. VD and Supply 120 0 –5 rDS(on) vs. VD and Supply (Single Supply) 160 140 V+ = 7.5 V 5 V 120 80 r DS(on) ( ) r DS(on) ( ) 100 8 V 10 V 12 V 60 10 V 100 12 V 80 15 V 60 20 V 40 22 V 40 20 V 20 0 –20 V– = 0 V 15 V 20 0 –16 –12 –8 –4 0 4 8 12 VD – Drain Voltage (V) www.siliconix.com S FaxBack 408-970-5600 5-6 Powered by ICminer.com Electronic-Library Service CopyRight 2003 16 20 0 4 8 12 16 20 22 VD – Drain Voltage (V) Document Number: 70062 S-52433—Rev. E, 06-Sep-99 DG408/409 Vishay Siliconix _ rDS(on) vs. VS and Temperature 80 130 rDS(on) vs. VS and Temperature (Single Supply) V+ = 15 V V– = –15 V 70 125_C 110 85_C 60 125_C r DS(on) ( ) r DS(on) ( ) 90 50 85_C 40 25_C 30 25_C 70 0_C –40_C 50 20 0_C –40_C –55_C –55_C 30 10 0 V+ = 12 V V– = 0 V 10 –15 –10 0 –5 5 15 10 0 8 6 10 12 VS – Source Voltage (V) Off Isolation and Crosstalk vs. Frequency Insertion Loss vs. Frequency –150 1 RL = 1 k V+ = 15 V V– = –15 V RL = 1 k –130 0 V+ = 15 V V– = –15 V Ref. 1 Vrms –1 LOSS (dB) –110 (dB) 4 2 VS – Source Voltage (V) –90 Off-Isolation –70 –2 –3 –4 Crosstalk –50 RL = 50 –5 –30 –6 100 1k 10 k 100 k 1M 10 M 10 100 M 100 1k f – Frequency (Hz) 10 k 100 k 1M 10 M 100 M f – Frequency (Hz) Switching Time vs. Bipolar Supply Switching Time vs. Single Supply 275 200 tTRANS 250 175 225 t (ns) t (ns) 150 200 tTRANS 175 125 tOFF(EN) tOFF(EN) 150 tON(EN) 100 tON(EN) 75 10 12 14 125 16 18 20 VSUPPLY (V) Document Number: 70062 S-52433—Rev. E, 06-Sep-99 Powered by ICminer.com Electronic-Library Service CopyRight 2003 22 100 8 9 10 11 12 13 14 15 VSUPPLY (V) www.siliconix.com S FaxBack 408-970-5600 5-7 DG408/409 Vishay Siliconix V+ VREF GND D A0 V+ Level Shift AX V– Decode/ Drive S1 V+ EN Sn V– FIGURE 1. +15 V V+ A2 "10 V S1 A1 S2 – S7 A0 DG408 #10 V S8 VO D EN GND Logic Input V– 50% 0V 35 pF 300 50 tr <20 ns tf <20 ns 3V –15 V VS1 90% Switch Output VO 0V +15 V 90% VS8 V+ A1 A0 S1 ON S1a – S4a, Da DG409 VO Db GND S8 ON #10 V S4b EN tTRANS tTRANS "10 V S1 V– 300 50 35 pF –15 V FIGURE 2. Transition Time www.siliconix.com FaxBack 408-970-5600 5-8 Powered by ICminer.com Electronic-Library Service CopyRight 2003 Document Number: 70062 S-52433—Rev. E, 06-Sep-99 DG408/409 Vishay Siliconix +15 V V+ S1 –5V EN S2 – S8 A0 DG408 A1 A2 GND D V– 50 Logic Input VO 50% 0V 35 pF 1 k tr <20 ns tf <20 ns 3V tON(EN) –15 V tOFF(EN) 0V 10% Switch Output +15 V VO 90% VO V+ S1b –5V EN S1a – S4a, Da S2b – S4b A0 DG409 A1 Db GND VO V– 50 35 pF 1 k –15 V FIGURE 3. Enable Switching Time +15 V EN +2.4 V V+ Logic Input All S and Da A0 +5 V tr <20 ns tf <20 ns 3V 50% 0V DG408 DG409 A1 Db, D A2 GND 50 VO VS V– –15 V 300 80% Switch Output 35 pF VO 0V tOPEN FIGURE 4. Break-Before-Make Interval Document Number: 70062 S-52433—Rev. E, 06-Sep-99 Powered by ICminer.com Electronic-Library Service CopyRight 2003 www.siliconix.com FaxBack 408-970-5600 5-9 DG408/409 Vishay Siliconix +15 V Rg V+ SX Logic Input EN OFF ON OFF 0V A0 Channel Select 3V VO D A1 CL 10 nF A2 GND DVO Switch Output V– DVO is the measured voltage due to charge transfer error Q, when the channel turns off. Q = CL x DVO –15 V FIGURE 5. Charge Injection +15 V +15 V VIN VIN VS Rg = 50 W V+ S1 V+ SX SX VS S8 S8 A0 D VO A0 Rg = 50 W A1 A2 GND EN RL 1 kW V– D A2 EN GND –15 V –15 V Crosstalk = 20 log VIN FIGURE 7. Crosstalk +15 V +15 V V+ V+ Rg = 50 W S1 Meter A2 A0 D VO A1 Channel Select S8 A1 A0 A2 GND EN V– VOUT VIN FIGURE 6. Off Isolation S1 RL 1 kW V– VOUT Off Isolation = 20 log VS VO A1 RL 1 kW –15 V Insertion Loss = 20 log D GND VOUT EN V– HP4192A Impedance Analyzer or Equivalent f = 1 MHz –15 V VIN FIGURE 8. Insertion Loss www.siliconix.com FaxBack 408-970-5600 5-10 Powered by ICminer.com Electronic-Library Service CopyRight 2003 FIGURE 9. Source Drain Capacitance Document Number: 70062 S-52433—Rev. E, 06-Sep-99 DG408/409 Vishay Siliconix Overvoltage Protection supply of the IC. From the point of view of the chip, nothing has changed, as long as the difference VS – (V–) doesn’t exceed +44 V. The addition of these diodes will reduce the analog signal range to 1 V below V+ and 1 V above V–, but it preserves the low channel resistance and low leakage characteristics. A very convenient form of overvoltage protection consists of adding two small signal diodes (1N4148, 1N914 type) in series with the supply pins (see Figure 10). This arrangement effectively blocks the flow of reverse currents. It also floats the supply pin above or below the normal V+ or V– value. In this case the overvoltage signal actually becomes the power V+ 1N4148 SX D Vg DG408 1N4148 V– FIGURE 10.Overvoltage Protection Using Blocking Diodes Differential 4-Channel Sequential Multiplexer/Demultiplexer 8-Channel Sequential Multiplexer/Demultiplexer +15 V V+ S1 GND Analog Output (Input) S3 S4 V+ S1a V– S2 Analog Inputs (Outputs) +15 V –15 V DG408 D S5 Clock In NC DM7493 QB QC QA r01 Differential Analog Outputs (Inputs) DG409 S1b S2b Db S3b A1 A2 S4b A0 EN QD AIN Da S4a +15 V BIN V– S3a Differential Analog Inputs (Outputs) S7 +15 V GND S2a S6 S8 A0 –15 V NC r02 GND Clock In J Q 1/2 MM74C73 CLK K CLEAR +15 V Q GND A1 EN J Q 1/2 MM74C73 CLK NC Q K NC CLEAR 6 Enable In Reset Enable (MUX On-Off Control) FIGURE 11. Document Number: 70062 S-52433—Rev. E, 06-Sep-99 Powered by ICminer.com Electronic-Library Service CopyRight 2003 www.siliconix.com FaxBack 408-970-5600 5-11