ETC LM117WG/883

MICROCIRCUIT DATA SHEET
Original Creation Date: 09/12/00
Last Update Date: 09/22/00
Last Major Revision Date:
MNLM117-X REV 0A0
POSITIVE THREE-TERMINAL ADJUSTABLE VOLTAGE REGULATOR
General Description
The LM117 adjustable 3-terminal positive voltage regulator is capable of supplying in
excess of 0.5A over a 1.2V to 37V output range. It is exceptionally easy to use and
requires only two external resistors to set the output voltage. Further, both line and
load regulation are better than standard fixed regulators.
In addition to higher performance than fixed regulators, the LM117 offers full overload
protection available only in IC's. Included on the chip are current limit, thermal
overload protection and safe area protection. All overload protection circuitry remains
fully functional even if the adjustment terminal is disconnected.
Normally, no capacitors are needed unless the device is situated more than 6 inches from
the input filter capacitors in which case an input bypass is needed. An optional output
capacitor can be added to improve transient response. The adjustment terminal can be
bypassed to achieve very high ripple rejection ratios which are difficult to achieve with
standard 3-terminal regulators.
Besides replacing fixed regulators, the LM117 is useful in a wide variety of other
applications. Since the regulator is "floating" and sees only the input-to-output
differential voltage, supplies of several hundred volts can be regulated as long as the
maximum input to output differential is not exceeded, (i.e., avoid short-circuiting the
output).
Also, it makes an especially simple adjustable switching regulator, a programmable output
regulator, or by connecting a fixed resistor between the adjustment pin and output, the
LM117 can be used as a precision current regulator. Supplies with electronic shutdown can
be achieved by clamping the adjustment terminal to ground which programs the output to
1.2V where most loads draw little current.
Industry Part Number
NS Part Numbers
LM117H
LM117H/883
LM117WG/883
Prime Die
LM117H
Processing
Subgrp Description
MIL-STD-883, Method 5004
1
2
3
4
5
6
7
8A
8B
9
10
11
Quality Conformance Inspection
MIL-STD-883, Method 5005
1
Static tests at
Static tests at
Static tests at
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
Temp ( oC)
+25
+125
-55
+25
+125
-55
+25
+125
-55
+25
+125
-55
MICROCIRCUIT DATA SHEET
MNLM117-X REV 0A0
Features
-
Guaranteed 0.5A output current
Adjustable output down to 1.2V
Current limit constant with temperature
80 dB ripple rejection
Output is short-circuit protected
2
MICROCIRCUIT DATA SHEET
MNLM117-X REV 0A0
(Absolute Maximum Ratings)
(Note 1)
Power Dissipation
(Note 2)
Internally Limited
Input-Output Voltage Differential
+40V, -0.3V
Maximum Junction Temperature
150 C
Storage Temperature Range
-65 C < Ta < +150 C
Lead Temperature (Soldering, 10 seconds)
300 C
Thermal Resistance
ThetaJA
Metal Can
(Still Air)
(500LF/Min Air Flow)
CERAMIC SOIC
(Still Air)
(500LF/Min Air Flow)
186 C/W
64 C/W
115 C/W
66 C/W
ThetaJC
Metal Can
CERAMIC SOIC
(Note 3, 4)
Package Weight
(Typical)
Metal Can
CERAMIC SOIC
ESD Tolerance
(Note 5)
21 C/W
3.4 C/W
TBD
365mg
3000V
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Operating Ratings indicate conditions for which the device is functional, but do not
guarantee specific performance limits. For guaranteed specifications and test
conditions, see the Electrical Characteristics. The guaranteed specifications apply
only for the test conditions listed. Some performance characteristics may degrade
when the device is not operated under the listed test conditions.
The maximum power dissipation must be derated at elevated temperatures and is
dictated by Tjmax (maximum jnnction temperature), ThetaJA (package junction to
ambient thermal resistance), and TA (ambient temperature). The maximum allowable
power dissipation at any temperature is Pdmax = (Tjmax - TA)/ ThetaJA or the number
given in the Absolute Maximum Ratings, whichever is lower.
For the CERAMIC SOIC device to function properly, the "Output" and "Output/Sense"
pins must be connected on the users printed circuit board.
The package material for these devices allows much improved heat transfer over our
standard ceramic packages. In order to take full advantage of this improved heat
transfer, heat sinking must be provided between the package base (directly beneath
the die), and either metal traces on, or thermal vias through, the printed circuit
board. Without this additional heat sinking, device power dissipation must be
calculated using junction-to-ambient, rather than junction-to-case, thermal
resistance. It must not be assumed that the device leads will provide substantial
heat transfer out of the package, since the thermal resistance of the leadframe
materical is very poor, relatvie to the materical of the package base. The stated
junction-to-case thermal resistance is for the package material only, and does not
account for the additional thermal resistance between the package base and the
printed circuit board. The user must determine the value of the additional thermal
resistance and must combine this with the stated value for the package, to calculate
the total allowed power dissipation for the device.
Human body model, 1.5K Ohms in series with 100pF.
3
MICROCIRCUIT DATA SHEET
MNLM117-X REV 0A0
Recommended Operating Conditions
Operating Temperature Range
-55 C < Ta < +125 C
4
MICROCIRCUIT DATA SHEET
MNLM117-X REV 0A0
Electrical Characteristics
DC PARAMETERS
(The following conditions apply to all the following parameters, unless otherwise specified.)
DC: Vdiff = Vin - Vout, Il = 8mA
SYMBOL
Iadj
Iq
Vref
Rline
Rload
Delta Iadj
PARAMETER
Adjustment Pin
Current
Minimum Load
Current
Reference Voltage
Line Regulation
Load Regulation
Adjustment
Current Change
CONDITIONS
NOTES
PINNAME
MIN
MAX
UNIT
SUBGROUPS
Vdiff = 3V
100
uA
1
Vdiff = 3.3V
100
uA
2, 3
Vdiff = 40V
100
uA
1, 2,
3
Vdiff = 3V, Vout = 1.7V
5
mA
1
Vdiff = 3.3V, Vout = 1.7V
5
mA
2, 3
Vdiff = 40V, Vout = 1.7V
5
mA
1, 2,
3
Vdiff = 3V
1.2
1.3
V
1
Vdiff = 3.3V
1.2
1.3
V
2, 3
Vdiff = 40V
1.2
1.3
V
1, 2,
3
3V < Vdiff < 40V, Vout = 1.2V
-8.9
8.9
mV
1
3.3V < Vdiff < 40V, Vout = 1.2V
-22.2
22.2
mV
2, 3
Vdiff= 3V, Il = 10mA to 500mA
-15
15
mV
1
Vdiff= 3.3V, Il = 10mA to 500mA
-15
15
mV
2, 3
Vdiff= 40V, Il = 10mA to 150mA
-15
15
mV
1
Vdiff= 40V, Il = 10mA to 100mA
-15
15
mV
2, 3
Vdiff = 3V, Il = 10mA to 500mA
-5
5
uA
1
Vdiff = 3.3V, Il = 10mA to 500mA
-5
5
uA
2, 3
Vdiff = 40V, Il = 10mA to 150mA
-5
5
uA
1
Vdiff = 40V, Il = 10mA to 100mA
-5
5
uA
2, 3
3V < Vdiff < 40V
-5
5
uA
1
3.3V < Vdiff < 40V
-5
5
uA
2, 3
Ios
Short Circuit
Current
Vdiff = 10V
.45
1.6
A
1
Theta R
Thermal
Regulation
TA = 25 C, t = 20mS, Vdiff = 40V,
Il = 150mA
-6
6
mV
1
Icl
Current Limit
Vdiff < 15V
1
0.5
A
1, 2,
3
Vdiff = 40V
1
0.15
A
1
5
MICROCIRCUIT DATA SHEET
MNLM117-X REV 0A0
Electrical Characteristics
AC PARAMETERS
SYMBOL
Rr
PARAMETER
Ripple Rejection
CONDITIONS
NOTES
Vin =+6.25V, Vout = Vref, f = 120Hz,
ei = 1Vrms, Il = 125mA
PINNAME
2
MIN
MAX
66
SUBGROUPS
UNIT
dB
4, 5,
6
DC PARAMETERS: DRIFT VALUES
(The following conditions apply to all the following parameters, unless otherwise specified.)
DC: Vdiff = Vin - Vout, Il = 8mA. "Deltas not required on B-Level product. Deltas required for S-Level
product ONLY as specified on Internal Processing Instructions (IPI)."
Iadj
Adjustment Pin
Current
Vdiff = 40V
-10
10
uA
1
Vref
Reference Voltage
Vdiff = 3V
-0.01
0.01
V
1
Note 1:
Note 2:
Guaranteed parameter not tested
Tested at +25 C; guaranteed, but not tested at +125 C and -55 C.
6
MICROCIRCUIT DATA SHEET
MNLM117-X REV 0A0
Graphics and Diagrams
GRAPHICS#
DESCRIPTION
06368HRA1
CERAMIC SOIC (WG), 16 LEAD (B/I CKT)
09784HRB3
METAL CAN (H), TO-39, 3LD, .200 DIA P.C. (B/I CKT)
H03ARD
METAL CAN (H), TO-39, 3LD, .200 DIA P.C. (P/P DWG)
P000174A
METAL CAN (H), TO-39, 3LD, .200 DIA P.C. (PINOUT)
P000385B
CERAMIC SOIC (WG), 16 LEAD (PINOUT)
WG16ARC
CERAMIC SOIC (WG), 16 LEAD (P/P DWG)
See attached graphics following this page.
7
N
NC
1
16
NC
NC
2
15
NC
ADJ
3
14
N/C
NC
4
13
OUTPUT/SENSE
INPUT
5
12
OUTPUT
NC
6
11
NC
NC
7
10
NC
NC
8
9
NC
LM117WG
16 - LEAD CERAMIC SOIC
CONNECTION DIAGRAM
TOP VIEW
P000385B
N
MIL/AEROSPACE OPERATIONS
2900 SEMICONDUCTOR DRIVE
SANTA CLARA, CA 95050
MICROCIRCUIT DATA SHEET
MNLM117-X REV 0A0
Revision History
Rev
ECN #
0A0
M0003046 09/22/00
Rel Date
Originator
Changes
Rose Malone
Initial MDS Release: MNLM117-X, Rev. 0A0. Replaced
MNLM117-H, Rev. 1A0.
8