UTRON UT61256C 32K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.4 REVISION HISTORY DESCRIPTION DATE May 3 ,2001 Jul 27,2001 Sep 27,2001 Feb 1,2002 Nov 27,2002 Jan 10,2003 Original Delete STSOP package Add STSOP package Revised STSOP package Add under/overshoot range of VIL & VIH Add package 28-pin 300 mil skinny PDIP & Package outline dimension w w w .IC m in er .c om REVISION Preliminary Rev. 0.1 Rev. 1.0 Rev. 1.1 Rev. 1.2 Rev. 1.3 Rev. 1.4 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 P80031 1 ICminer.com Electronic-Library Service UTRON UT61256C 32K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.4 GENERAL DESCRIPTION FEATURES Fast access time : 8/10/12/15 ns (max.) Low power operating : 80 mA (typical) Single 5V power supply All inputs and outputs TTL compatible Fully static operation Three state outputs Package : 28-pin 300 mil SOJ 28-pin 8mm×13.4mm STSOP 28-pin 300 mil skinny PDIP The UT61256C is a 262,144-bit high-speed CMOS static random access memory organized as 32,768 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology. om The UT61256C is designed for high-speed system applications. It is particularly suited for use in high-density high-speed system applications. The UT61256C operates from a single 5V power supply and all inputs and outputs are fully TTL compatible. 32K × 8 MEMORY ARRAY er DECODER in A0-A14 .c FUNCTIONAL BLOCK DIAGRAM .IC m Vcc Vss I/O DATA CIRCUIT COLUMN I/O w w w I/O1-I/O8 CE OE CONTROL CIRCUIT WE UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 P80031 2 ICminer.com Electronic-Library Service UTRON UT61256C 32K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.4 PIN CONFIGURATION 1 28 Vcc A12 2 27 WE A7 3 26 A6 4 25 A5 5 24 A4 6 23 A11 7 A2 8 OE 1 28 A11 2 27 CE A9 3 26 I/O8 A8 A8 4 25 I/O7 A9 A13 5 24 I/O6 WE 6 23 I/O5 Vcc 7 22 I/O4 A14 8 21 Vss A12 9 20 I/O3 A7 10 19 I/O2 A6 11 18 I/O1 17 A0 16 A1 15 A2 A13 22 OE 21 A10 9 A0 10 20 CE 19 I/O8 I/O1 11 18 I/O7 A5 12 I/O2 12 17 I/O6 A4 13 I/O3 13 16 I/O5 A3 14 Vss 14 15 I/O4 SOJ 2 WE A7 3 26 A13 A6 4 25 A8 A5 5 A4 6 A3 7 A2 8 A1 9 A0 10 24 A9 23 A11 22 OE 21 A10 CE 19 I/O8 11 18 I/O2 12 17 I/O3 13 16 Vss 14 15 I/O7 I/O6 I/O5 I/O4 w I/O1 .IC 20 in A12 m Vcc 27 UT61256C 28 er STSOP 1 A14 A10 .c A1 UT61256C om A3 UT61256C A14 w skinny PDIP w PIN DESCRIPTION SYMBOL A0 - A14 I/O1 - I/O8 CE WE OE VCC VSS DESCRIPTION Address Inputs Data Inputs/Outputs Chip Enable Input Write Enable Input Output Enable Input Power Supply Ground UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 P80031 3 ICminer.com Electronic-Library Service UTRON UT61256C 32K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.4 ABSOLUTE MAXIMUM RATINGS* PARAMETER Terminal Voltage with Respect to Vss Operating Temperature Storage Temperature Power Dissipation DC Output Current Soldering Temperature (under 10 sec) SYMBOL VTERM TA TSTG PD IOUT Tsolder RATING -0.5 to +6.5 0 to +70 -65 to +150 1 50 260 UNIT V ℃ ℃ W mA ℃ TRUTH TABLE I/O OPERATION WE X H H L High - Z High - Z DOUT DIN SUPPLY CURRENT ISB,ISB1 ICC ICC ICC .c Standby Output Disable Read Write OE X H L X CE H L L L er MODE om *Stress greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability. Note: H = VIH, L=VIL, X = Don't care. Output Leakage Current m w Operating Power Supply Current Standby Current (TTL) w ISB VSS ≦VI/O ≦VCC CE =VIH or OE =VIH or WE =VIL IOH = - 4mA IOL = 8mA - 8 Cycle time=Min. - 10 - 12 CE = VIL , II/O = 0mA - 15 CE = VIH ISB1 CE ≧VCC-0.2V ILO VOH VOL w Output High Voltage Output Low Voltage SYMBOL TEST CONDITION VIH VIL ILI VSS ≦VIN ≦VCC .IC PARAMETER Input High Voltage Input Low Voltage Input Leakage Current in DC ELECTRICAL CHARACTERISTICS (VCC = 5V± 10%, TA = 0℃ to 70℃) Standby Current (CMOS) ICC MIN. 2.2 - 0.5 -1 MAX. VCC+0.5 0.8 1 UNIT V V µA -1 1 µA 2.4 - 0.4 190 180 160 140 30 V V mA mA mA mA mA - 5 mA Notes: 1. Overshoot : Vcc+2.0v for pulse width less than 6ns. 2. Undershoot : Vss-2.0v for pulse width less than 6ns. 3. Overshoot and Undershoot are sampled, not 100% tested. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 P80031 4 ICminer.com Electronic-Library Service UTRON UT61256C 32K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.4 CAPACITANCE (TA=25℃, f=1.0MHz) PARAMETER Input Capacitance Input/Output Capacitance SYMBOL CIN CI/O MIN. MAX. 8 10 - UNIT pF pF Note : These parameters are guaranteed by device characterization, but not production tested. AC TEST CONDITIONS 0V to 3.0V 3ns 1.5V CL=30pF, IOH/IOL=-4mA/8mA om Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Levels Output Load AC ELECTRICAL CHARACTERISTICS (VCC = 5V± 10% , TA = 0℃ to 70℃) (1) READ CYCLE .IC (2) WRITE CYCLE PARAMETER w w w Write Cycle Time Address Valid to End of Write Chip Enable to End of Write Address Set-up Time Write Pulse Width Write Recovery Time Data to Write Time Overlap Data Hold from End of Write Time Output Active from End of Write Write to Output in High Z SYMBOL tWC tAW tCW tAS tWP tWR tDW tDH tOW* tWHZ* 8 8 4 4 4 - .c 8 2 0 3 10 2 0 3 10 10 5 5 5 - 12 3 0 3 er tRC tAA tACE tOE tCLZ* tOLZ* tCHZ* tOHZ* tOH UT61256C UT61256C UT61256C UT61256C -8 -10 -12 -15 UNIT MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. in Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Access Time Chip Enable to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z Output Hold from Address Change SYMBOL m PARAMETER 12 12 6 6 6 - 15 4 0 3 15 15 7 7 7 - ns ns ns ns ns ns ns ns ns UT61256C UT61256C UT61256C UT61256C -8 -10 -12 -15 UNIT MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. 8 6.5 6.5 0 6.5 0 5 0 1.5 5 - 10 8 8 0 8 0 6 0 2 - 6 12 10 10 0 9 0 7 0 3 - 7 15 12 12 0 10 0 8 0 4 - 8 ns ns ns ns ns ns ns ns ns ns *These parameters are guaranteed by device characterization, but not production tested. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 P80031 5 ICminer.com Electronic-Library Service UTRON UT61256C 32K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.4 TIMING WAVEFORMS READ CYCLE 1 (Address Controlled) (1,2,4) tRC Address tAA tOH DOUT Data Valid RC er t m CE .IC OE t CLZ HIGH-Z t OE t t OLZ t CHZ t OHZ OH HIGH-Z Data Valid w Dout in Address t AA t ACE .c READ CYCLE 2 ( CE and OE Controlled) (1,3,5,6) om tOH w Notes : 1. WE is HIGH for read cycle. 2. Device is continuously selected CE =VIL. w 3. Address must be valid prior to or coincident with CE transition; otherwise tAA is the limiting parameter. 4. OE is LOW. 5. tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ± 500mV from steady state. 6. At any given temperature and voltage condition, tCHZ is less than tCLZ, tOHZ is less than tOLZ. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 P80031 6 ICminer.com Electronic-Library Service UTRON UT61256C 32K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.4 WRITE CYCLE 1 ( WE Controlled) (1,2,3,5,6) t WC Address t AW CE t CW t AS t WE t Dout WR WP om t t WHZ High-Z (4) t t (4) DH .c Din DW OW WRITE CYCLE 2 ( CE Controlled) (1,2,5) t WC in Address er Data Valid CE t CW .IC t AS m t AW WE t WR t WP t WHZ 1. Data Valid w Notes : t DH t DW w Din High-Z w Dout WE and CE must be HIGH during all address transitions. 2. A write occurs during the overlap of a low CE and a low WE . 3. During a WE controlled with write cycle with OE LOW, tWP must be greater than tWHZ+tDW to allow the drivers to turn off and data to be placed on the bus. 4. During this period, I/O pins are in the output state, and input singals must not be applied. 5. If the CE low transition occurs simultaneously with or after WE low transition, the outputs remain in a high impedance state. 6. tOW and tWHZ are specified with CL = 5pF. Transition is measured ± 500mV from steady state. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 P80031 7 ICminer.com Electronic-Library Service UTRON UT61256C 32K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.4 PACKAGE OUTLINE DIMENSION 15 1 14 .c 28 om 28 pin 300 mil SOJ Package Outline Dimension .IC m in er A2 X XX Note: w w w CL 1. S/E/D DIM NOT INCLUDEING MOLD FLASH. 2. THE END FLASH IN PACKAGE LENGTHWISE IS NOT MORE THAN 10 MILS EACH SIDE UNIT SYMBOL A A1 A2 B B1 c D E E1 e L S Y UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 INCH(REF) 0.140 (MAX) 0.026 (MIN) 0.100± 0.005 0.018± 0.003 0.028 ± 0.003 0.010± 0.003 0.710± 0.010 0.337± 0.010 0.300± 0.005 0.050± 0.003 0.087± 0.010 0.030± 0.004 0.003 (MAX) MM(BASE) 3.556 (MAX) 0.660 (MIN) 2.540± 0.127 0.457± 0.076 0.711± 0.076 0.254± 0.076 18.03± 0.254 8.560± 0.254 7.620± 0.127 1.270± 0.076 2.210± 0.254 0.762± 0.102 0.076 (MAX) P80031 8 ICminer.com Electronic-Library Service UTRON UT61256C 32K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.4 28 pin 8x13.4mm STSOP Package Outline Dimension HD cL 12° (2x) 28 14 15 12° (2x) om b E e 1 "A" Seating Plane y .c D 0.254 c GAUGE PLANE 1 0 SEATING PLANE 12° (2X) L "A" DATAIL VIEW L1 DIMENSIONS IN INCHES MIN NOM MAX 0.040 0.043 0.047 0.002 0.006 0.036 0.039 0.041 0.007 0.009 0.011 0.004 0.006 0.008 0.520 0.528 0.535 0.461 0.465 0.469 0.311 0.315 0.319 0.0216 0.012 0.020 0.028 0.027 0.000 0.003 o o o 5 3 0 w w A A1 A2 b c HD D E e L L1 Y Θ DIMENSIONS IN MILLIMETERS MIN NOM MAX 1.00 1.10 1.20 0.05 0.15 0.91 1.00 1.05 0.17 0.22 0.27 0.10 0.15 0.20 13.20 13.40 13.60 11.70 11.80 11.90 7.90 8.00 8.10 0.55 0.30 0.50 0.70 0.675 0.00 0.076 o o o 5 3 0 w SYMBOLS .IC 28 A1 m in A 15 A2 14 er 12° (2X) UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 P80031 9 ICminer.com Electronic-Library Service UTRON UT61256C 32K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.4 PACKAGE OUTLINE DIMENSION .IC m in er .c om 28 pin 300 mil skinny PDIP Package Outline Dimension UNIT SYMBOL w w w A A1 A2 D E E1 L eB Θ° MIN 0.015 0.125 1.385 NOR. 0.130 1.390 0.310 BSC 0.288 0.130 0.350 7 0.283 0.115 0.330 0 MAX 0.210 0.135 1.400 0.293 0.150 0.370 15 Note： 1. JEDEC OUTLINE：N / A UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 P80031 10 ICminer.com Electronic-Library Service UTRON UT61256C 32K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.4 ORDERING INFORMATION PACKAGE 28 PIN SOJ 28 PIN SOJ 28 PIN SOJ 28 PIN SOJ 28 PIN STSOP 28 PIN STSOP 28 PIN STSOP 28 PIN STSOP 28 PIN SKINNY PDIP 28 PIN SKINNY PDIP 28 PIN SKINNY PDIP 28 PIN SKINNY PDIP om ACCESS TIME (ns) 8 10 12 15 8 10 12 15 8 10 12 15 w w w .IC m in er .c PART NO. UT61256CJC-8 UT61256CJC-10 UT61256CJC-12 UT61256CJC-15 UT61256CLS-8 UT61256CLS-10 UT61256CLS-12 UT61256CLS-15 UT61256CKC-8 UT61256CKC-10 UT61256CKC-12 UT61256CKC-15 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 P80031 11 ICminer.com Electronic-Library Service UTRON UT61256C 32K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.4 w w w .IC m in er .c om THIS PAGE IS LEFT BLANK INTENTIONALLY. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 P80031 12 ICminer.com Electronic-Library Service