54LVX3245 8-Bit Dual Supply Translating Transceiver with TRI-STATE ® Outputs General Description Features The LVX3245 is a dual-supply, 8-bit translating transceiver that is designed to interface between a 3V bus and a 5V bus in a mixed 3V/5V supply environment. The Transmit/Receive (T/R) input determines the direction of data flow. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a TRI-STATE condition. The A port interfaces with the 3V bus; the B port interfaces with the 5V bus. The LVX3245 is suitable for mixed voltage applications such as systems using 3.3V memories which must interface with existing busses or other components operating at 5.0V. n n n n n n n n Bidirectional interface between 3V and 5V buses Inputs compatible with TTL level 3V data flow at A port and 5V data flow at B port Outputs source/sink 24 mA Available in ceramic DIP and Flatpack packages Implements proprietary EMI reduction circuitry Functionally compatible with the 54 series 245 Standard Microcircuit Drawing (SMD) 5962-9860501 Ordering Code Order Number Package Number Package Description 54LVX3245J-QML J24F 24-Lead Ceramic Dual-in-line 54LVX3245W-QML W24C 24-Lead Cerpack Logic Symbol Connection Diagram Pin Assignment for CDIP and Cerpack DS101018-1 DS101018-2 TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1999 National Semiconductor Corporation DS101018 www.national.com 54LVX3245 8-Bit Dual Supply Translating Transceiver with TRI-STATE Outputs January 1999 Pin Descriptions Pin Names Description OE Output Enable Input T/R Transmit/Receive Input A0–A7 Side A Inputs or TRI-STATE Outputs B0–B7 Side B Inputs or TRI-STATE Outputs Truth Table Inputs OE Outputs T/R L L Bus B Data to Bus A L H Bus A Data to Bus B H X HIGH-Z State H = High Voltage Level L = Low Voltage Level I = Immaterial Logic Diagram DS101018-4 www.national.com 2 Absolute Maximum Ratings (Note 1) Recommended Operating Conditions (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCCA, VCCB) DC Input Voltage (VI) @ OE, T/R DC Input/Output Voltage (VI/O) @ A(n) @ B(n) DC Input Diode Current (IIN) @ OE , T/R DC Output Diode Current (IOK) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) and Max Current @ ICCA @ ICCB Storage Temperature Range (TSTG) Supply Voltage VCCA VCCB Input Voltage (VI) @ OE , T/R Input/Output Voltage (VI/O) @ A(n) @ B(n) Free Air Operating Temperature (TA) Minimum Input Edge Rate (∆t/∆V) VIN from 30% to 70% of VCC VCC @ 3.0V, 4.5V, 5.5V −0.5V to +7.0V −0.5V to VCCB + 0.5V −0.5V to VCCA + 0.5V −0.5V to VCCB + 0.5V ± 20 mA ± 50 mA ± 50 mA ± 50 mA ± 200 mA ± 200 mA 2.7V to 3.6V 4.5V to 5.5V 0V to VCCB 0V to VCCA 0V to VCCB −55˚C to +125˚C 8 ns/V Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. −65˚C to +150˚C Note 2: Unused Pins (inputs and I/Os) must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIHA VIHB VILA VILB VOHA Parameter Minimum High Level Input Voltage VOLB VCCB (V) TA = −55˚C to +125˚C Guaranteed Limits A(n), T/R, 3.6 5.0 2.0 OE 2.7 5.0 2.0 B(n) 3.3 4.5 2.0 3.3 5.5 2.0 A(n), T/R, 3.6 5.0 0.8 OE 2.7 5.0 0.8 B(n) 3.3 4.5 0.8 3.3 5.5 0.8 Minimum High Level 2.7 4.5 2.6 Output Voltage 3.6 5.5 3.5 2.7 4.5 2.2 3.0 4.5 2.4 3.0 4.5 2.2 2.7 4.5 4.4 3.6 5.5 5.4 3.0 4.5 3.7 Maximum Low Level 2.7 4.5 0.1 Output Voltage 3.6 5.5 0.1 2.7 4.5 0.4 3.0 4.5 0.3 3.0 4.5 0.4 Maximum Low Level Input Voltage VOHB VOLA VCCA (V) 2.7 4.5 0.1 3.6 5.5 0.1 3.0 4.5 0.4 3 Units Conditions V VOUT ≤ 0.1V or ≥ VCC − 0.1V V VOUT ≤ 0.1V or ≥ VCC −0.1V V IOH = −100 µA IOH = −100 µA IOH = −12 mA IOH = −12 mA V V IOH = −24 mA IOH = −100 µA IOH = −100 µA IOH = −24 mA IOL = 100 µA IOL = 100 µA IOL = 12 mA V IOL = 12 mA IOL = 24 mA IOL = 100 µA IOL = 100 µA IOL = 24 mA www.national.com DC Electrical Characteristics Symbol IIN (Continued) TA = −55˚C to +125˚C VCCA (V) VCCB (V) 3.6 5.5 ± 1.0 µA 3.6 5.5 ± 5.0 µA 3.6 5.5 ± 5.0 µA B(n) 3.6 5.5 1.5 mA A(n), T/R, 3.6 5.5 500 µA T/R = 3.6V, OE = VIH VO = VCCB, GND VI = VCCB − 2.1V, T/R = 0.0V VI = VCCA − 0.6V µA T/R = 3.6V B(n) = VCCB or GND OE = GND, Parameter Guaranteed Limits Units Conditions VI = VCCB, GND Maximum Input Leakage Current @ OE, T/R IOZA Maximum TRI-STATE Output Leakage @ A(n) IOZB Maximum TRI-STATE Output Leakage @ B(n) ∆ICC Maximum ICCT/Input @ OE ICCA Quiescent VCCA Supply Current 3.6 5.5 10 T/R = 0.0V, OE = VIH VO = VCCA, GND T/R = GND ICCB Quiescent VCCB Supply Current 3.6 5.5 40 µA A(n) = VCCA or GND OE = GND, T/R = VCCA V (Note 4) (Note 5) V (Note 4) (Note 5) VOLPA Quiet Output Maximum 3.3 5.0 1.1 VOLPB Dynamic VOL 3.3 5.0 1.6 VOLVA Quiet Output Minimum 3.3 5.0 -0.8 VOLVB Dynamic VOL 3.3 5.0 -1.1 Note 3: Maximum test duration 2.0 ms, one output loaded at a time. Note 4: Worst case package. Note 5: Max number of outputs defined as (n). Data inputs are driven 0V to VCC level; one output at GND. www.national.com 4 AC Electrical Characteristics Symbol Parameters TA = −55˚C to +125˚C CL = 50 pF TA = −55˚C to +125˚C CL = 50 pF VCCA = 3.3V (Note 7) VCCB = 5.0V (Note 6) VCCB = 5.0V (Note 6) VCCA = 2.7V Units Min Max Min Max 1.0 8.5 1.0 9.0 A to B 1.0 8.5 1.0 9.0 Propagation Delay 1.0 8.0 1.0 8.5 tPHL Propagation Delay tPLH tPHL tPLH B to A 1.0 8.0 1.0 8.5 tPZL Output Enable 1.0 8.5 1.0 9.0 tPZH Time OE to B 1.0 8.5 1.0 9.0 tPZL Output Enable 1.0 9.5 1.0 10.5 tPZH Time OE to A 1.0 9.5 1.0 10.5 tPHZ Output Disable 1.0 7.5 1.0 7.5 tPLZ Time OE to B 1.0 7.5 1.0 7.5 tPHZ Output Disable 1.0 7.0 1.0 7.0 tPLZ Time OE to A 1.0 7.0 1.0 7.0 tOSHL Output to Output tOSLH Skew (Note 8) 1.5 ns ns ns ns ns ns 1.5 ns Data to Output Note 6: Voltage Range 5.0V is 5.0V ± 0.5V. Note 7: Voltage Range 3.3V is 3.3V ± 0.3V. Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameter guaranteed by design. Capacitance Symbol CIN CI/O Max Units Input Capacitance Parameter 10 pF Input/Output 12 pF Conditions VCC = Open VCCA = 3.3V 50 pF VCCB = 5.0V VCCB = 5.0V Capacitance CPD Power Dissipation VCCA = 3.3V Capacitance Note 9: CPD is measured at 10 MHz 8-Bit Dual Supply Translating Transceiver The LVX3245 is a dual supply device capable of bidirectional signal translation. This level shifting ability provides an efficient interface between low voltage CPU local bus with memory and a standard bus defined by 5V I/O levels. The device control inputs can be controlled by either the low voltage CPU and core logic or a bus arbitrator with 5V I/O levels. Manufactured on a sub-micron CMOS process, the LVX3245 is suitable for mixed voltage applications such as systems using 3.3V memories which must interface with existing busses or other components operating at 5.0V. DS101018-3 5 www.national.com Applications: Mixed Mode Dual Supply Interface Solution In a better solution, the LVX3245 configures two different output levels to handle the dual supply interface issues. The “A” port is a dedicated 3V port to interface 3V ICs. The “B” port is a dedicated port to interface 5V ICs. Figure 1 shows how LVX3245 fits into a system with 3V subsystem and 5V subsystem. LVX3245 is designed to solve 3V/5V interfacing issues when CMOS devices cannot tolerate I/O levels above their applied VCC. If an I/O pin of 3V ICs is driven by 5V ICs, the P-Channel transistor in 3V ICs will conduct causing current flow from I/O bus to the 3V power supply. The resulting high current flow can cause destruction of 3V ICs through latchup effects. To prevent this problem, a current limiting resistor is used typically under direct connection of 3V ICs and 5V ICs, but it causes speed degradation. DS101018-5 FIGURE 1. LVX3245 Fits into a System with 3V Subsystem and 5V Subsystem www.national.com 6 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Ceramic DIP Package Number J24F 24-Lead Cerpack Package Number W24C 7 www.national.com 54LVX3245 8-Bit Dual Supply Translating Transceiver with TRI-STATE Outputs Notes LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: [email protected] www.national.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 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