FAIRCHILD 74VCX164245

Revised March 2000
74VCX164245
Low Voltage 16-Bit Dual Supply Translating Transceiver
with 3-STATE Outputs
General Description
Features
The VCX164245 is a dual supply, 16-bit translating transceiver that is designed for 2 way asynchronous communication between busses at different supply voltages by
providing true signal translation. The supply rails consist of
VCCB, which is the higher potential rail operating at 2.3 to
3.6V and VCCA, which is the lower potential rail operating at
1.65 to 2.7V. (VCCA must be less than or equal to VCCB for
proper device operation.) This dual supply design allows
for translation from 1.8V to 2.5V busses to busses at a
higher potential, up to 3.3V.
■ Bidirectional interface between busses ranging from
1.65V to 3.6V
The Transmit/Receive (T/R) input determines the direction
of data flow. Transmit (active-HIGH) enables data from A
Ports to B Ports; Receive (active-LOW) enables data from
B Ports to A Ports.The Output Enable (OE) input, when
HIGH, disables both A and P Ports by placing them in a
High-Z condition. The A Port interfaces with the lower voltage bus (1.8 − 2.5V); The B Port interfaces with the higher
voltage bus (2.7 − 3.3V). Also the VCX164245 is designed
so that the control pins (T/Rn, OEn) are supplied by VCCB.
The 74VCX164245 is suitable for mixed voltage applications such as notebook computers using a 1.8V CPU and
3.3V peripheral components. It is fabricated with an
Advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.
■ Supports Live Insertion and Withdrawal (Note 1)
■ Static Drive (IOH/IOL)
±24 mA @ 3.0V VCC
±18 mA @ 2.3V VCC
±6 mA @ 1.65V VCC
■ Uses patented noise/EMI reduction circuitry
■ Functionally compatible with 74 series 16245
■ Latchup performance exceeds 300 mA
■ ESD performance:
Human Body Model >2000V
Machine model >200V
Note 1: To ensure the high impedance state during power up or power
down, OEn should be tied to VCCB through a pull up resistor. The minimum
value of the resistor is determined by the current sourcing capability of the
driver.
Ordering Code:
Order Number
Package Number
Package Description
74VCX164245MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Diagram
Pin Descriptions
Pin Names
Description
OEn
Output Enable Input (Active LOW)
T/Rn
Transmit/Receive Input
A0–A15
Side A Inputs or 3-STATE Outputs
B0–B15
Side B Inputs or 3-STATE Outputs
Quiet Series is a trademark of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation
DS500159
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74VCX164245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
March 2000
74VCX164245
Connection Diagram
Truth Tables
Inputs
OE1
T/R1
Outputs
L
L
Bus B0–B7 Data to Bus A0–A7
L
H
Bus A0–A7 Data to Bus B0–B7
H
X
HIGH Z State on A0–A7, B0–B7
Inputs
OE2
T/R2
Outputs
L
L
Bus B8–B15 Data to Bus A8–A15
L
H
Bus A8–A15 Data to Bus B8–B15
H
X
HIGH-Z State on A8–A15, B8–B15
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = High Impedance
Translator Power Up Sequence Recommendations
sourcing capability of the driver. Second, the T/Rn control
pins should be placed at logic low (0V) level, this will
ensure that the B-side bus pins are configured as inputs to
help guard against bus contention and oscillations. B-side
Data Inputs should be driven to a valid logic level (0V or
VCCB), this will prevent excessive current draw and oscillations. VCCA can then be powered up after VCCB, but should
never exceed the VCCB voltage level. Upon completion of
these steps the device can then be configured for the users
desired operation. Following these steps will help to prevent possible damage to the translator device as well as
other system components.
To guard against power up problems, some simple guidelines need to be adhered to. The VCX164245 is designed
so that the control pins (T/Rn, OEn) are supplied by VCCB.
Therefore the first recommendation is to begin by powering
up the control side of the device, VCCB. The OEn control
pins should be ramped with or ahead of VCCB, this will
guard against bus contentions and oscillations as all A-Port
and B Port outputs will be disabled. To ensure the high
impedance state during power up or power down, OEn
should be tied to VCCB through a pull up resistor. The minimum value of the resistor is determined by the current
Logic Diagrams
Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
Recommended Operating
Conditions (Note 4)
Supply Voltage
VCCA
−0.5V to VCCB
VCCB
−0.5V to 4.6V
VCCA
1.65V to 2.7V
−0.5V to +4.6V
VCCB
2.3V to 3.6V
DC Input Voltage (VI)
Power Supply (Note 5)
DC Output Voltage (VI/O)
Input Voltage (VI) @ OE, T/R
−0.5V to +4.6V
Outputs 3-STATE
Outputs Active (Note 3)
An
0V to VCCA
Bn
0V to VCCB
An
−0.5V to VCCA + 0.5V
Bn
−0.5V to VCCB + 0.5V
Output Current in IOH/IOL
−50 mA
VCCA = 1.65V to 1.95V
VCCA = 2.3V to 2.7V
DC Input Diode Current (IIK)
VI < 0V
−50 mA
VO > VCC
+50 mA
VCCB = 2.3V to 2.7V
VIN = 0.8V to 2.0V, VCC = 3.0V
±100 mA
10 ns/V
Note 2: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Supply Pin (ICC or Ground)
−65°C to +150°C
Storage Temperature (TSTG)
±18 mA
−40°C to +85°C
Minimum Input Edge Rate (∆t/∆V)
(IOH/IOL)
DC VCC or Ground Current
±6 mA
±24 mA
Free Air Operating Temperature (TA)
±50 mA
DC Output Source/Sink Current
±18 mA
VCCB = 3.0V to 3.6V
DC Output Diode Current (IOK)
VO < 0V
0V to VCCB
Input/Output Voltage (VI/O)
Note 3: IO Absolute Maximum Rating must be observed.
Note 4: Unused inputs or I/O pins must be held HIGH or LOW. They may
not float.
Note 5: Operation requires: VCCA ≤ VCCB
DC Electrical Characteristics (1.65V < VCCA ≤ 1.95V, 2.3V < VCCB ≤ 2.7V)
Symbol
VIHA
Parameter
HIGH Level Input Voltage An
VIHB
VILA
Bn, T/R, OE
LOW Level Input Voltage An
VILB
VOHA
Conditions
Bn, T/R, OE
HIGH Level Output Voltage
IOH = −100 µA
IOH = −6 mA
VOHB
VOLA
HIGH Level Output Voltage
LOW Level Output Voltage
LOW Level Output Voltage
VCCB
(V)
Min
1.65−1.95
2.3−2.7
0.65 x VCC
1.65−1.95
2.3−2.7
1.6
1.6−1.95
2.3−2.7
1.65−1.95
2.3−2.7
1.65−1.95
2.3−2.7
VCCA−0.2
1.65
2.3−2.7
1.25
Max
Units
V
V
0.35 x VCC
V
0.7
V
V
IOH = −100 µA
1.65−1.95
2.3−2.7
VCCB−0.2
IOH = −18 mA
1.65−1.95
2.3
1.7
IOL = 100 µA
1.65−1.95
2.3−2.7
0.2
1.65
2.3−2.7
0.3
IOL = 100 µA
1.65−1.95
2.3−2.7
0.2
IOL = 18 mA
1.65−1.95
2.3
0.6
1.65−1.95
2.3−2.7
±5.0
µA
1.65−1.95
2.3−2.7
±10
µA
0
0
10
µA
1.65−1.95
2.3−2.7
20
µA
1.65−1.95
2.3−2.7
±20
µA
IOL = 6 mA
VOLB
VCCA
(V)
II
Input Leakage Current @ OE, T/R
0V ≤ VI ≤ 3.6V
IOZ
3-STATE Output Leakage
0V ≤ VO ≤ 3.6V
OE = VCCB
V
V
V
VI = VIH or VIL
IOFF
Power OFF Leakage Current
0≤ (VI, VO) ≤ 3.6V
ICCA/ICCB
Quiescent Supply Current,
An = VCCA or GND
per supply, VCCA / VCCB
Bn, OE, & T/R = V CCB or GND
VCCA ≤ An ≤ 3.6V
VCCB ≤ Bn, OE, T/R ≤ 3.6V
∆ICC
Increase in ICC per Input, Bn, T/R, OE
VI = VCCB – 0.6V
1.65−1.95
2.3−2.7
750
µA
Increase in ICC per Input, An
VI = VCCA – 0.6V
1.65−1.95
2.3−2.7
750
µA
3
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74VCX164245
Absolute Maximum Ratings(Note 2)
74VCX164245
DC Electrical Characteristics (1.65V < VCCA ≤ 1.95V, 3.0V < VCCB ≤ 3.6V)
Symbol
Parameter
Conditions
VCCA
(V)
VCCB
(V)
Min
Max
Units
VIHA
HIGH Level
An
1.65–1.95
3.0–3.6
0.65 x VCC
V
VIHB
Input Voltage
Bn, T/R, OE
1.65–1.95
3.0–3.6
2.0
V
VILA
LOW Level
An
1.65–1.95
3.0–3.6
0.35 x VCC
V
VILB
Input Voltage
Bn, T/R, OE
1.65–1.95
3.0–3.6
0.8
V
VOHA
HIGH Level Output Voltage
IOH = −100 µA
IOH = −6 mA
VOHB
VOLA
HIGH Level Output Voltage
LOW Level Output Voltage
LOW Level Output Voltage
3.0–3.6
VCCA–0.2
1.65
3.0–3.6
1.25
V
IOH = −100 µA
1.65–1.95
3.0–3.6
VCCA–0.2
IOH = −24 mA
1.65–1.95
3.0
2.2
IOL = 100 µA
1.65–1.95
3.0–3.6
0.2
1.65
3.0–3.6
0.3
IOL = 100 µA
1.65–1.95
3.0–3.6
0.2
IOL = 24 mA
1.65–1.95
3.0
0.55
1.65–1.95
3.0–3.6
±5.0
µA
1.65–1.95
3.0–3.6
±10
µA
0
0
10
µA
1.65–1.95
3.0–3.6
20
µA
1.65–1.95
3.0–3.6
±20
µA
IOL = 6 mA
VOLB
1.65–1.95
II
Input Leakage Current @ OE, T/R
0V ≤ VI ≤ 3.6V
IOZ
3-STATE Output Leakage
0V ≤ VO ≤ 3.6V
OE* = VCCB
V
V
V
VI = V IH or VIL
IOFF
Power Off Leakage Current
0 ≤ (VI, VO) ≤ 3.6V
ICCA/ICCB
Quiescent Supply Current,
An = VCCA or GND
per supply, VCCA/VCCB
Bn, OE, & T/R = VCCB or GND
VCCA ≤ An ≤ 3.6V
VCCB ≤ Bn, OE, T/R ≤ 3.6V
∆ICC
Increase in ICC per Input, Bn, T/R, OE
VI = V CCB − 0.6V
1.65–1.95
3.0–3.6
750
µA
Increase in ICC per Input, An
VI = V CCA − 0.6V
1.65–1.95
3.0–3.6
750
µA
DC Electrical Characteristics (2.3V < VCCA ≤ 2.7V, 3.0V ≤ VCCB ≤ 3.6V)
Symbol
VIHA
Parameter
HIGH Level Input Voltage An
VIHB
VILA
Bn, T/R, OE
LOW Level Input Voltage An
VILB
VOHA
Conditions
Bn, T/R, OE
HIGH Level Output Voltage
VCCA
(V)
VCCB
(V)
Min
2.3–2.7
3.0–3.6
1.6
V
2.3–2.7
3.0–3.6
2.0
V
Max
Units
2.3–2.7
3.0–3.6
0.7
V
2.3–2.7
3.0–3.6
0.8
V
IOH = −100 µA
2.3–2.7
3.0–3.6
IOH = −18 mA
2.3
3.0–3.6
1.7
3.0–3.6
VCCB–0.2
2.2
VCCA–0.2
V
VOHB
HIGH Level Output Voltage
IOH = −100 µA
2.3–2.7
IOH = −24 mA
2.3–2.7
3.0
VOLA
LOW Level Output Voltage
IOL = 100 µA
2.3–2.7
3.0–3.6
0.2
IOL = 18 mA
2.3
3.0–3.6
0.6
VOLB
LOW Level Output Voltage
IOL = 100 µA
2.3–2.7
3.0–3.6
0.2
IOL = 24 mA
2.3–2.7
3.0
0.55
2.3–2.7
3.0–3.6
±5.0
µA
2.3–2.7
3.0–3.6
±10
µA
0
0
10
µA
2.3–2.7
3.0–3.6
20
µA
2.3–2.7
3.0–3.6
±20
µA
II
Input Leakage Current @ OE, T/R
0V ≤ VI ≤ 3.6V
IOZ
3-STATE Output Leakage @ An
0V ≤ VO ≤ 3.6V
OE = VCCA
V
V
V
VI = V IH or VIL
IOFF
Power OFF Leakage Current
0 ≤ (VI, VO) ≤ 3.6V
ICCA/ICCB
Quiescent Supply Current,
An = VCCA or GND
per supply, VCCA/VCCB
Bn, OE, & T/R = VCCB or GND
VCCA ≤ An ≤ 3.6V
VCCB ≤ Bn, OE, T/R ≤ 3.6V
∆ICC
Increase in ICC per Input, Bn, T/R, OE
VI = V CCB − 0.6V
2.3–2.7
3.0–3.6
750
µA
Increase in ICC per Input, An
VI = V CCA − 0.6V
2.3–2.7
3.0–3.6
750
µA
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4
CL = 30 pF, RL = 500Ω, TA = −40°C to +85°C,
Symbol
Parameter
VCCA = 1.65V to 1.95V
VCCA = 1.65V to 1.95V
VCCA = 2.3V to 2.7V
VCCB = 2.3V to 2.7V
VCCB = 3.0V to 3.6V
VCCB = 3.0V to 3.6V
Units
Min
Max
Min
Max
Min
Max
tPHL, tPLH
Prop Delay, A to B
0.8
5.5
0.6
5.1
0.6
4.0
ns
tPHL, tPLH
Prop Delay, B to A
1.5
5.8
1.5
6.2
0.8
4.4
ns
tPZL, tPZH
Output Enable Time, OE to B
0.8
5.3
0.6
5.1
0.6
4.0
ns
tPZL, tPZH
Output Enable Time, OE to A
1.5
8.3
1.5
8.2
0.8
4.6
ns
tPLZ, tPHZ
Output Disable Time, OE to B
0.8
5.2
0.8
5.6
0.8
4.8
ns
tPLZ, tPHZ
Output Disable Time, OE to A
0.8
4.6
0.8
4.5
0.8
4.4
ns
tosHL
Output to Output Skew
tosLH
(Note 6)
0.75
ns
0.5
0.5
Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tosHL) or LOW-to-HIGH (tosLH).
Dynamic Switching Characteristics
Symbol
VOLP
Parameter
Quiet Output Dynamic Peak VOL,
Conditions
VCCA
(V)
VCCB
(V)
TA = 25°C
Typical
1.8
2.5
0.25
1.8
3.3
0.25
2.5
3.3
0.6
1.8
2.5
0.6
1.8
3.3
0.8
2.5
3.3
0.8
1.8
2.5
−0.25
1.8
3.3
−0.25
2.5
3.3
−0.6
1.8
2.5
−0.6
1.8
3.3
−0.8
2.5
3.3
−0.8
1.8
2.5
1.7
1.8
3.3
2.0
2.5
3.3
2.0
1.8
2.5
1.3
1.8
3.3
1.3
2.5
3.3
1.7
CL = 30 pF, VIH = VCC, VIL = 0V
B to A
Quiet Output Dynamic Peak VOL,
CL = 30 pF, VIH = VCC, VIL = 0V
A to B
VOLV
Quiet Output Dynamic Valley VOL,
CL = 30 pF, VIH = VCC, VIL = 0V
B to A
Quiet Output Dynamic Valley VOL,
CL = 30 pF, VIH = VCC, VIL = 0V
A to B
VOHV
Quiet Output Dynamic Valley VOH,
CL = 30 pF, VIH = VCC, VIL = 0V
A to B
Quiet Output Dynamic Valley VOH,
CL = 30 pF, VIH = VCC, VIL = 0V
B to A
Units
V
V
V
V
V
V
Capacitance
Symbol
Parameter
Conditions
TA = +25°C
Typical
Units
CIN
Input Capacitance
VCCA = 2.5V, VCCB = 3.3V, VI = 0V or VCCA/B
5
pF
CI/O
Input/Output Capacitance
VCCA = 2.5V, VCCB = 3.3V, VI = 0V or VCCA/B
6
pF
CPD
Power Dissipation Capacitance
VCCA = 2.5V, VCCB = 3.3V, VI = 0V or VCCA/B
20
pF
f = 10 MHz
5
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74VCX164245
AC Electrical Characteristics
74VCX164245
AC Loading and Waveforms
FIGURE 1. AC Test Circuit
TEST
SWITCH
tPLH, tPHL
OPEN
tPZL, tPLZ
6V at VCC = 3.3 ± 0.3V;
VCC x 2 at VCC = 2.5 ± 0.2V; 1.8V ± 0.15V
tPZH, tPHZ
GND
FIGURE 2. Waveform for Inverting and Non-inverting Functions
tR = tF ≤ 2.0 ns, 10% to 90%
FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic
tR = tF ≤ 2.0 ns, 10% to 90%
FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic
tR = tF ≤ 2.0 ns, 10% to 90%
Symbol
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VCC
3.3V ± 0.3V
2.5V ± 0.2V
1.8V ± 0.15V
Vmi
1.5V
VCC/2
VCC/2
Vmo
1.5V
VCC/2
VCC/2
VX
VOL + 0.3V
VOL + 0.15V
VOL + 0.15V
VY
VOH − 0.3V
VOH − 0.15V
VOH − 0.15V
6
74VCX164245
Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
7
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LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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74VCX164245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.