Revised October 2003 74LVXC3245 8-Bit Dual Supply Configurable Voltage Interface Transceiver with 3-STATE Outputs General Description Features The LVXC3245 is a 24-pin dual-supply, 8-bit configurable voltage interface transceiver suited for PCMCIA and other real time configurable I/O applications. The VCCA pin accepts a 3V supply level. The A Port is a dedicated 3V port. The VCCB pin accepts a 3V-to-5V supply level. The B Port is configured to track the VCCB supply level respectively. A 5V level on the VCC pin will configure the I/O pins at a 5V level and a 3V VCC will configure the I/O pins at a 3V level. The A Port should interface with a 3V host system and the B Port to the card slots. This device will allow the VCCB voltage source pin and I/O pins on the B Port to float when OE is HIGH. This feature is necessary to buffer data to and from a PCMCIA socket that permits PCMCIA cards to be inserted and removed during normal operation. ■ Bidirectional interface between 3V and 3V-to-5V buses ■ Control inputs compatible with TTL level ■ Outputs source/sink up to 24 mA ■ Guaranteed simultaneous switching noise level and dynamic threshold performance ■ Implements patented EMI reduction circuitry ■ Flexible VCCB operating range ■ Allows B Port and VCCB to float simultaneously when OE is HIGH ■ Functionally compatible with the 74 series 245 Ordering Code: Order Number Package Number 74LVXC3245WM M24B Package Description 74LVXC3245QSC MQA24 24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide 74LVXC3245MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 224-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Connection Diagram Pin Descriptions Pin Names Description OE Output Enable Input T/R Transmit/Receive Input A0–A7 Side A Inputs or 3-STATE Outputs B0–B7 Side B Inputs or 3-STATE Outputs © 2003 Fairchild Semiconductor Corporation DS012008 www.fairchildsemi.com 74LVXC3245 8-Bit Dual Supply Configurable Voltage Interface Transceiver with 3-STATE Outputs February 1994 74LVXC3245 Truth Table Inputs OE Outputs T/R L L Bus B Data to Bus A L H Bus A Data to Bus B H X HIGH-Z State H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Logic Diagram www.fairchildsemi.com 2 Recommended Operating Conditions (Note 2) −0.5V to +7.0V Supply Voltage (VCCA, VCCB) −0.5V to VCCA +0.5V DC Input Voltage (VI) @ OE, T/R Supply Voltage DC Input/Output Voltage (VI/O) @ An −0.5V to VCCA +0.5V @ Bn −0.5V to VCCB +0.5V VCCA 2.7V to 3.6V VCCB 3.0V to 5.5V Input Voltage (VI) @ OE, T/R DC Input Diode Current (IIK) 0V to VCCA Input Output Voltage (VI/O) ±20 mA @ An DC Output Diode (IOK) Current ±50 mA @ Bn DC Output Source or Sink Current (IO) ±50 mA @ OE, T/R 0V to VCCA 0V to VCCB −40°C to +85°C Free Air Operating Temperature (TA) Minimum Input Edge Rate (∆V/∆t) DC VCC or Ground Current ±50 mA per Output Pin (ICC or IGND ) ±200 mA and Max Current VCC @ 3.0V, 4.5V, 5.5V −65°C to +150°C Storage Temperature Range (TSTG) Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. ±300 mA DC Latch-Up Source or Sink Current 8 ns/V VIN from 30% to 70% of VCC Note 2: The A Port unused pins (inputs or I/Os) must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIHA Parameter TA = −40°C to +85°C Guaranteed Limits Units Conditions VOUT ≤ 0.1V An, 2.7 3.0 2.0 2.0 3.0 3.6 2.0 2.0 or Voltage T/R 3.6 5.5 2.0 2.0 ≥VCC − 0.1V Bn 2.7 3.0 2.0 2.0 3.0 3.6 2.0 2.0 3.6 5.5 3.85 3.85 V VOUT ≤ 0.1V Maximum LOW An, 2.7 3.0 0.8 0.8 Level Input OE 3.0 3.6 0.8 0.8 or Voltage T/R 3.6 5.5 0.8 0.8 ≥VCC − 0.1V Bn 2.7 3.0 0.8 0.8 3.0 3.6 0.8 0.8 3.6 5.5 1.65 1.65 Minimum HIGH Level 3.0 3.0 2.99 2.9 2.9 IOUT = −100 µA Output Voltage 3.0 3.0 2.85 2.56 2.46 IOH = −12 mA 3.0 3.0 2.65 2.35 2.25 2.7 3.0 2.5 2.3 2.2 V V IOH = −24 mA IOH = −12 mA 2.7 4.5 2.3 2.1 2.0 IOH = −24 mA 3.0 3.0 2.99 2.9 2.9 IOUT = −100 µA 3.0 3.0 2.85 2.56 2.46 3.0 3.0 2.65 2.35 2.25 3.0 4.5 4.25 3.86 3.76 IOH = −24 mA Maximum LOW Level 3.0 3.0 0.002 0.1 0.1 IOUT = 100 µA Output Voltage 3.0 3.0 0.21 0.36 0.44 2.7 3.0 0.11 0.36 0.44 2.7 4.5 0.22 0.42 0.5 IOL = 24 mA 3.0 3.0 0.002 0.1 0.1 IOUT = 100 µA VOLB IIN TA = 25°C Typ OE VOHB VOLA (V) Minimum HIGH VILB VOHA VCCB (V) Level Input VIHB VILA VCCA 3.0 3.0 0.21 0.36 0.44 3.0 4.5 0.18 0.36 0.44 Maximum Input 3.6 3.6 ±0.1 ±1.0 Leakage Current @ 3.6 5.5 ±0.1 ±1.0 V V V IOH = −12 mA IOH = −24 mA IOL = 24 mA IOL = 12 mA IOL = 24 mA IOL = 24 mA VI = VCCA, GND µA OE, T/R 3 www.fairchildsemi.com 74LVXC3245 Absolute Maximum Ratings(Note 1) 74LVXC3245 DC Electrical Characteristics Symbol IOZA Parameter (Continued) VCCA VCCB (V) (V) TA = 25°C Typ TA = −40°C to +85°C Units Maximum 3-STATE 3.6 3.6 ±0.5 ±5.0 Output Leakage 3.6 5.5 ±0.5 ±5.0 Maximum 3-STATE 3.6 3.6 ±0.5 ±5.0 Output Leakage 3.6 5.5 ±0.5 ±5.0 1.35 1.5 VI = VIL, VIH, µA VI = VIL, VIH, µA ICCA1 Maximum Bn 3.6 5.5 ICC/Input All Inputs 3.6 3.6 0.35 0.5 1.0 3.6 Open 5 50 mA µA Bn = Open, OE = VCCA, T/R = VCCA, VCCB = Open as B Port Floats ICCA2 VI = VCCB–2.1V VI = VCC–0.6V An = VCCA or GND Quiescent VCCA Supply Current OE = VCCA VO = VCCB, GND @ Bn ∆ICC OE = VCCA VO = VCCA, GND @ An IOZB Conditions Guaranteed Limits Quiescent VCCA 3.6 3.6 5 50 Supply Current 3.6 5.5 5 50 An = VCCA or GND, µA Bn = VCCB or GND, OE = GND, T/R = GND ICCB Quiescent VCCB 3.6 3.6 5 50 Supply Current 3.6 5.5 8 80 An = VCCA or GND, µA Bn = VCCB or GND, OE = GND, T/R = VCCA VOLPA VOLPB VOLVA VOLVB VIHDA VIHDB VILDA VILDB Quiet Output 3.3 3.3 0.8 Maximum Dynamic 3.3 5.0 0.8 VOL 3.3 3.3 0.8 3.3 5.0 1.5 Quiet Output 3.3 3.3 −0.8 Minimum Dynamic 3.3 5.0 −0.8 VOL 3.3 3.3 −0.8 3.3 5.0 −1.2 Minimum HIGH 3.3 3.3 2.0 Level Dynamic 3.3 5.0 2.0 Input Voltage 3.3 3.3 2.0 3.3 5.0 3.5 Maximum LOW 3.3 3.3 0.8 Level Dynamic 3.3 5.0 0.8 Input Voltage 3.3 3.3 0.8 3.3 5.0 1.5 Note 3: Worst case package. Note 4: Max number of outputs defined as (n). Data inputs are driven 0V to VCC level; one output at GND. Note 5: Max number of Data Inputs (n) switching. (n–1) inputs switching 0V to VCC level. Input-under-test switching: VCC level to threshold (VIHD), 0V to threshold (VILD), f = 1 MHz. www.fairchildsemi.com 4 V V V V V V V V (Note 3)(Note 4) (Note 3)(Note 4) (Note 3)(Note 4) (Note 3)(Note 4) (Note 3)(Note 5) (Note 3)(Note 5) (Note 3)(Note 5) (Note 3)(Note 5) Symbol Parameter TA = +25°C TA = −40°C to +85°C TA = +25°C CL = 50 pF CL = 50 pF CL = 50 pF CL = 50 pF VCCA = 2.7V–3.6V VCCA = 2.7V–3.6V VCCA = 2.7V–3.6V VCCA = 2.7V–3.6V VCCB = 4.5V–5.5V VCCB = 4.5V–5.5V VCCB = 3.0V–3.6V VCCB = 3.0V–3.6V Min Typ Max Min Max Min Typ (Note 6) TA = −40°C to +85°C Max Min Units Max (Note 7) tPHL Propagation Delay 1.0 4.8 8.0 1.0 8.5 1.0 5.5 8.5 1.0 9.0 tPLH A to B 1.0 3.9 6.5 1.0 7.0 1.0 5.2 8.0 1.0 8.5 tPHL Propagation Delay 1.0 3.8 6.5 1.0 7.0 1.0 4.4 7.0 1.0 7.5 tPLH B to A 1.0 4.3 7.5 1.0 8.0 1.0 5.1 7.5 1.0 8.0 tPZL Output Enable Time 1.0 4.7 8.0 1.0 8.5 1.0 6.0 9.0 1.0 9.5 tPZH OE to B 1.0 4.8 8.5 1.0 9.0 1.0 6.1 9.5 1.0 10.0 tPZL Output Enable Time 1.0 5.9 9.5 1.0 10.0 1.0 6.4 10.0 1.0 10.5 tPZH OE to A 1.0 5.4 9.0 1.0 9.5 1.0 5.8 9.0 1.0 9.5 tPHZ Output Disable Time 1.0 4.0 8.0 1.0 8.5 1.0 6.3 9.5 1.0 10.0 tPLZ OE to B 1.0 3.8 7.5 1.0 8.0 1.0 4.5 8.0 1.0 8.5 tPHZ Output Disable Time 1.0 4.6 9.5 1.0 10.0 1.0 5.2 9.5 1.0 10.0 tPLZ OE to A 1.0 3.1 6.5 1.0 7.0 1.0 3.4 6.5 1.0 7.0 tOSHL Output to Output tOSLH Skew (Note 8) 1.0 1.5 1.0 1.5 1.5 1.5 ns ns ns ns ns ns ns Data to Output Note 6: Typical values at VCCA = 3.3V, VCCB = 5.0V @ 25°C. Note 7: Typical values at VCCA = 3.3V, VCCB = 3.3V @ 25°C. Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. Capacitance Typ Units CIN Symbol Input Capacitance Parameter 4.5 pF VCC = Open Conditions CI/O Input/Output Capacitance 10 pF VCCA = 3.3V CPD Power Dissipation A→B 50 pF VCCB = 5.0V Capacitance (Note 9) B→A 40 pF VCCA = 3.3V VCCB = 5.0V Note 9: CPD is measured at 10 MHz. 5 www.fairchildsemi.com 74LVXC3245 AC Electrical Characteristics 74LVXC3245 Power Up Considerations figured as inputs. With VCCA receiving power first, the A I/O Port should be configured as inputs to help guard against bus contention and oscillations. To insure the system does not experience unnecessary ICC current draw, bus contention, or oscillations during power up, the following guidelines should be adhered to (refer to Table 1): • A side data inputs should be driven to a valid logic level. This will prevent excessive current draw. • Power up the control side of the device first. This is the VCCA side. The above steps will ensure that no bus contention or oscillations, and therefore no excessive current draw occurs during the power up cycling of these devices. These steps will help prevent possible damage to the translator devices and potential damage to other system components. • OE should ramp with or ahead of VCCA. This will help guard against bus contention. • The Transmit/Receive control pin (T/R) should ramp with VCCA, this will ensure that the A Port data pins are con- TABLE 1. Low Voltage Translator Power Up Sequencing Table Device Type 74LVXC3245 VCCA VCCB T/R OE A Side I/O 3V 3V to 5.5V ramp ramp logic (power up 1st) configurable with VCCA with VCCA 0V or VCCA B Side I/O outputs Floatable Pin Allowed yes, VCCB and B I/O’s w/ OE HIGH Please reference Application Note AN-5001 for more detailed information on using Fairchild’s LVX Low Voltage Dual Supply CMOS Translating Transceivers. Configurable I/O Application for PCMCIA Cards Block Diagram will always experience rail to rail output swings, maximizing the reliability of the interface. The LVXC3245 is a 24-pin dual supply device well suited for PCMCIA configurable I/O applications. Ideal for low power notebook designs, the LVXC3245 consumes less than 1 mW of quiescent power in all modes of operation. The LVXC3245 meets all PCMCIA I/O voltage requirements at 5V and 3.3V operation. By tying VCCB of the LVXC3245 to the card voltage supply, the PCMCIA card www.fairchildsemi.com The VCCA pin on the LVXC3245 must always be tied to a 3V power supply. This voltage connection provides internal references needed to account for variations in VCCB. When connected as in the figure above, the LVXC3245 meets all the voltage and current requirements of the ISA bus standard (IEEE P996). 6 74LVXC3245 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M24B 24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide Package Number MQA24 7 www.fairchildsemi.com 74LVXC3245 8-Bit Dual Supply Configurable Voltage Interface Transceiver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC24 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 8