ETC L4981

P
L4981 功率因数拉品集成电路崎特点反应用
.
-23-
·元"件卡片，
L4981 功率_4\教1:.集成~.告输特点怠鑫周
d
武汉冶金科拉大学
肋骨朝略
武汉汽丰工业大学
刘芙攀
由于坠x>st 电路筒单、实现成本低，是应用最广
1. 简介
泛的功率因数校正电路。除了上述特点以外，与整流
功率因数校正电路 (PFC) 分为有源和无源两
桥串联的电惑能减少商频噪声，减少 RFI 输入滤被
种。无源校正电路通常由大容量的电感、电容和工
嚣的体积，降低成本。由于在电感去磁时输出由电源
作于工频电摞的整流器组成。有源校正电路往往工
供电，电感只存储一部分用于输出的能量，因此电感
作于离频开关状态，它们的体积小、重量轻，比元源
的体积也可以减小。图 2 是此电路的原理框图。
校正电路效率高。图 1 是功率因数校正电路的三种
2. 功率因数校正集成电路 L4981 的内
不同结梅形式。
不同的结构形式各有其特点，现分述如下:
部结构
若用集成电路实现图 2 的控制电路，可使控制电
A 类:
·功率因数离 2
路更简洁，可靠性更高。L4981 是意大利
.Vout~Vin;
SG&…Thomson 公司生产的功率因数校正电路，其内
.滤披电路体积小 3
部结构框图见图 3 所示。它由内部基准稳压器、振荡
·无短路保护 z
器、误差放大器、乘法器、峰值电流比校器、驱动和控制
.开关电压 =Vout;
逻辑电路等几部分组成。能完全实现固 2 中电路的功
·门极驱动信号接地。
能。
B 类:
2.1 特点
·功率因数低 3
.工作电压范围宽 21- 25V;
.Vout~Vin;
·内含欠压镇定;
.滤被电路体飘大 3
·内含基准电压源 3
.有短路保护;
·具有闭环控制的误差放大器 3
.开关电压 =Vin;
.具有过压保护电路;
·门极驱动信号浮地。
·外国控制电路简单:
C 类z
·使用和调节方便;
.功率因戴高 3
·性价比高。
.V，ωt 为任意值 3
•
2.2 引脚功能
.滤被电路体积大;
L4981 采用 20 引脚双列直插式封装，图 3 给出
.有短路保护;
了 L4981 的内部结构，各引脚功能如下:
.开关电压 =Vin+Vo
1 脚:模拟地;
.门极驱动信号津地。
2 脚:峰值电流栓测端:
」
了
图 1
功率因数校正电路的不同形式
，、
(dJ外 t& 是..件)1999 年第 7 期
-24-
1999 年 7 月
01
Vout
4
+
昂2
Boost 型功率因数校正电路的原理框图
3 脚 z 输出电压过压检测端:
14 脚:电压反馈输入端;
4 脚 z 输入侧交流电流栓测端 3
15 脚:欠压反馈输入端:
5 脚:电流放大器输出端 s
"脚:同步信号鸭
6 脚 z 比例因子 E
17、 18 脚:分别为振荡器外接电阻、电容蝙 3
7 脚 z 输入侧交流电压 RMS 值检测端 3
19 脚:电源;
8 脚:乘法器输出端:
20 脚:功率管门极驱动倍号
9 脚 z 电流反馈输入端$
'
3. 应用电路
10 脚:数字地 E
11 脚 z 参考电压 3
采用 L4981 的功率因数校正电路如图 4 所
12 脚:恒流源;
示。用 L4981 设计开关电源，所增加的成本不多，而
13 脚:电压误差放大器输出端:
性能价格比却大大提高了，为 SMPS 的发展提供了
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L4981 功牢固 •.桂正集成电路的特点反应用 F
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180kO
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L4981A
13
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采用 U98lA 组成的功率因数校正电路
一种全新型的设计方案。
电话 :σ755--3224835， 3237214
捕者注:
传真 :075乡斗224473
咨询编号 :990709
对上述器件感兴趣者，请与混树中电奇彩公司联系。
........…....
...
…….趟，世..由险'险划..甜...…...司...姐..划....由曲t-.…..由峙......
·元黯件快讯
具有 2.1GHz 带宽的新型示波器校准器 5820A
世界著名的电子计量标准仪器生产商美国福捧克公司 (FLUKE) 新近推出的福禄克示波器校准器
S820A 是在其经济型到∞A 示披器校准器基础上研制的，并将校准技术提高到一个全新水平，以满足带宽
2.1GHz的需要。S820A 示波器校准器能提供完整、灵活的示波器校准方案，以校准迅速、操作简单、价格合
,
理、实用方便等优点支持所有的模拟和数字示披器校准。 5820A 具有 2.1GHz 电平正弦被/ l50ps快活、
600MHz电平正弦波m∞ps 快沿;前面板电流环路可校准电流探头，直流电压测试功能校准参考信号:可调
脉冲宽度为 1- 筑K>ns，具有 250阳的分辨率，以满足复杂的触发信号测试;通道间的偏移时间从 -10ns- +
3Ons.以栓验触发的建立和保持时间;土 0.33ppm 的频率基准包含计数器功能，并提供更好的测试余量 ;S 通
道输出选择提供了快速、自动的校准条件:校准软件包含多种自动校准程序，可使校准质量得到有敢保证。
福禄克公筒北京办事处校准器/通用测试仪器部是该公司在国内的代理，先后推出 55∞IA/5520A/
5700A/S7'1fJA 多功能校准器、到∞IAl5820A 示波器校准器等全新概念的新产品。福裸克公司研制示被器校
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有非常广泛的用户群。(王承军供稿)
咨询编号 :990718
对上述器件感抖趣者，可与美国福禄克公司北京办事处枝准器/通用测试仪器部联系。
电话: (010) 65123435 -
33
传真: (010)65123437
网址 :http://wwW.f1 uke.com
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250W 富固军因黯黯电用翻型 H 芙电攫
己频钮可用竖式
在普通彩电的开关电源
所示，电容 Cl 和 C2 、滤波扼流圈 TRl 组
东珠海市拱北
中，输入交流市电经整流后
直接加到滤波电容两端，只
成输入滤波电路。桥式整流电路、功率因
数校正 (PFC) 控制器 IC2(IA981A) 、升压
有限公司供本
有市电瞬时电压超过滤波电
电感 TR2 、功率开关管 T3 、二极管 D9 等
~散件 40 元，
七筒等， 见《电
容的电压时，滤波也容才充
元件组成功率因数校正电路，使输入电庄
电，因此输入电流的波形 -:1)"11-: 常窄的脉
与输入电流基本上同相位。功率变压器
缝广告。联系
冲。这种脉冲电流包含有非常大的谐波分
TR3 、功率开关管 T4 和 PWM 控制器 ICl
756-8873203
量，只有基波电流与输入电压同相位，因
(TEA2261) 组成反激式降压变换器，把功
·此普通彩电开关电源的功率因数很低。这
率因数校正电路输出的 4∞v 直流电压变
种开关电源的谐搜电流污染电网，干扰其
换为彩电所需的士 14V 、+ 135V 、+ 15V 、
他电子设备，已成为电网中公害。此外，
+ 7.5V 直流电压。脉冲变压器 TR4 ，集
在这种电源中，输入电流的有效值较大，
因此必须增大保险丝和传输线的规格。同
该电源的主要技术参数如下:
网中彩电的数量非常大，因此总功率非常
输入电压范围
176V - 270V;
大，在三相四线制供电系统中，三相输入
额定输出功率
250W;
电流均流过零线，由于各相输入电流的三
次、六次和九次谐波同相位，因此，中线中的谐波电流非常大，甚至可能超过相线
功率因数> O. 98( 满载时) ;
备用状态输入功率 3W;
直流预稳电压4OOV( 功率因数校正
8
装置，所以中线常常因过热而着火，造成
效率> 80%;
重大事故。为了解决这些问题，在各类开
工作频率
关电源中，必须增加功率因数校正电路。
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电路输出电压) ;
新型彩电的开关电源实际电路如下图
15kHz 。
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/中的电流。由于中线上不允许加过流保护
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L4981A
L4981B
®
POWER FACTOR CORRECTOR
CONTROL BOOST PWM UP TO 0.99P.F.
LIMIT LINE CURRENT DISTORTION TO < 5%
UNIVERSAL INPUT MAINS
FEED FORWARD LINE AND LOAD REGULATION
AVERAGE CURRENT MODE PWM FOR
MINIMUM NOISE SENSITIVITY
HIGH CURRENT BIPOLAR AND DMOS TOTEM POLE OUTPUT
LOW START-UP CURRENT (0.3mA TYP.)
UNDER VOLTAGE LOCKOUT WITH HYSTERESIS AND PROGRAMMABLE TURN ON
THRESHOLD
OVERVOLTAGE, OVERCURRENT PROTECTION
PRECISE 2% ON CHIP REFERENCE EXTERNALLY AVAILABLE
SOFT START
DESCRIPTION
The L4981 I.C. provides the necessary features
to achieve a very high power factor up to 0.99.
Realized in BCD 60II technology this power factor
corrector (PFC) pre-regulator contains all the con-
MULTIPOWER BCD TECHNOLOGY
DIP20
SO20
ORDERING NUMBERS: L4981X (DIP20)
L4981XD (SO20)
trol functions for designing a high efficiency-mode
power supply with sinusoidal line current consumption.
The L4981 can be easily used in systems with
mains voltages between 85V to 265V without any
line switch. This new PFC offers the possibility to
work at fixed frequency (L4981A) or modulated
frequency (L4981B) optimizing the size of the in-
BLOCK DIAGRAM
November 2001
1/16
L4981A - L4981B
put filter; both the operating frequency modes
working with an average current mode PWM controller, maintaining sinusoidal line current without
slope compensation.
Besides power MOSFET gate driver, precise voltage reference (externally available), error amplifier, undervoltage lockout, current sense and the
soft start are included. To limit the number of the
external components, the device integrates protections as overvoltage and overcurrent. The
overcurrent level can be programmed using a
simple resistor for L4981A. For a better precision
and for L4981B an external divider must be used.
ABSOLUTE MAXIMUM RATINGS
Symbol
Pin
VCC
19
20
IGDRV
Parameter
Supply Voltage (ICC ≤50mA) (*)
Gate driv. output peak current (t = 1µs)
.
VGDRV
SINK
SOURCE
Unit
V
Α
1.5
A
Gate driv. output voltage t = 0.1µs
-1
V
Voltages at pins 3, 14, 7, 6, 12, 15
-0.3 to 9
V
VVA-OUT
13
Error Amplifier Voltage
IAC
4
AC Input Current
VCA-OUT
5
Voltages at pin 8, 9
Current Amplifier Volt. (Isource = -20mA; Isink = 20mA)
VROSC
ICOSC
IFREQ-MOD
17
11, 18
18
16
VSYNC
VIPK
16
2
-0.3 to 8.5
V
5
mA
-0.5 to 7
-0.3 to 8.5
V
V
-0.3 to 3
-0.3 to 7
15
5
V
V
mA
mA
-0.3 to 7
-0.3 to 5.5
-2
V
V
V
W
Voltage at pin 17
Voltage at pin 11, 18
Input Sink Current
Frequency Modulation Sink Current (L4981B)
Sync. Voltage (L4981A)
Voltage at pin 2
Voltage at Pin 2 t = 1µs
Ptot
Power Dissipation at Tamb = 70°C
(DIP20)
1
(SO20)
0.6
W
Top
Power Dissipation at Tamb = 70°C
Operating Ambient Temperature
StorageTemperature
-40 to 125
-55 to 150
°C
°C
Tstg
(*) Maximum package power dissipation limits must be observed.
PIN CONNECTIONS (Top views)
L4981A
2/16
Value
selflimit
2
L4981B
L4981A - L4981B
THERMAL DATA
Symbol
Parameter
Rth j-amb
Thermal Resistance Junction-ambient
DIP 20
SO 20
Unit
80
120
°C/W
PIN FUNCTIONS
N.
Name
1
P-GND
2
IPK
Description
Power ground.
L4981A peak current limiting. A current limitation is obtained using a single resistor connected
between Pin 2 and the sense resistor. To have a better precision another resistor between Pin
2 and a reference voltage (Pin 11) must be added.
L4981B peak current limiting. A precise current limitation is obtained using two external
resistor only. These resistors must be connected between the sense resistor, Pin 2 and the
reference voltage.
3
OVP
Overvoltage protection. At this input are compared an internal precise 5.1V (typ) voltage
reference with a sample of the boost output voltage obtained via a resistive voltage divider in
order to limit the maximum output peak voltage.
4
IAC
Input for the AC current. An input current proportional to the rectified mains voltage generates,
via a multiplier, the current reference for the current amplifier.
5
CA-OUT
6
LFF
Load feedforward; this voltage input pin allows to modify the multiplier output current
proportionally to the load, in order to give a faster response versus load transient. The best
control is obtained working between 1.5V and 5.3V. If this function is not used, connect this pin
to the voltage reference (pin = 11).
7
VRMS
Input for proportional RMS line voltage. the VRMS input compesates the line voltage changes.
Connecting a low pass filter between the rectified line and the pin 7, a DC voltage proportional
to the input line RMS voltage is obtained. The best control is reached using input voltage
between 1.5V and 5.5V. If this function is not used connect this pin to the voltage reference
(pin = 11).
8
MULT-OUT
Multiplier output. This pin common to the multiplier output and the current amplifier N.I. input is
an high impedence input like ISENSE. The MULT-OUT pin must be taken not below -0.5V.
Current amplifier output. An external RC network determinates the loop gain.
9
ISENSE
Current amplifier inverting input. Care must be taken to avoid this pin goes down -0.5V.
10
S-GND
Signal ground.
11
VREF
12
SS
13
VA-OUT
Error amplifier output, an RC network fixes the voltage loop gain characteristics.
14
VFEED
Voltage error amplifier inverting input. This feedback input is connected via a voltage divider to
the boost output voltage.
15
P-UVLO
Programmable under voltage lock out threshold input. A voltage divider between supply
voltage and GND can be connected in order to program the turn on threshold.
16
SYNC
(L4981A)
This synchronization input/output pin is CMOS logic compatible. Operating as SYNC in, a
rectangular wave must be applied at this pin. Opearting as SYNC out, a rectangular clock
pulse train is available to synchronize other devices.
FREQ-MOD
(L4981B)
Output reference voltage (typ = 5.1V).Voltage refence at ± 2% of accuracy externally available,
it’s internally current limited and can deliver an output current up to 10mA.
A capacitor connected to ground defines the soft start time. An internal current generator
delivering 100µA (typ) charges the external capacitor defining the soft start time constant. An
internal MOS discharge, the external soft start capacitor both in overvoltage and UVLO
conditions.
Frequency modulation current input. An external resistor must be connected between pin 16
and the rectified line voltage in order to modulate the oscillator frequency. Connecting pin 16 to
ground a fixed frequency imposed by ROSC and COSC is obtained.
17
ROSC
An external resistor connected to ground fixes the constant charging current of C OSC.
18
COSC
An external capacitor connected to GND fixes the switching frequency.
19
VCC
20
GDRV
Supply input voltage.
Output gate driver. Bipolar and DMOS transistors totem pole output stage can deliver peak
current in excess 1A useful to drive MOSFET or IGBT power stages.
3/16
L4981A - L4981B
ELECTRICAL CHARACTERISTICS (Unless otherwise specified VCC = 18V, COSC = 1nF,
ROSC = 24KΩ, CSS = 1µF, VCA-OUT = 3.5V, VISENSE = 0V, VLFF = VREF, IAC = 100µA, VRMS = 1V,
VFEED = GND, VIPK = 1V, VOVP = 1V, TJ = 25°C
Symbol
Prameter
Test Condition
Min.
Typ.
Max.
Unit
-500
-50
±8
500
mV
nA
70
5.5
100
6.5
7.5
dB
V
0.4
1
V
ERROR AMPLIFIER SECTION
VIO
IIB
Input Offset Voltage
Input Bias Current
V13H
Open Loop Gain
Output High voltage
V13L
Output Low Voltage
Output Source Current
-I13
Output Sink Current
I13
REFERENCE SECTION
Vref
–25°C < TJ < 85°C
VFEED = 0V
VFEED = 4.7V
IVA-OUT = -0.5mA
VFEED = 5.5V
IVA-OUT = 0.5mA
VFEED = 4.7V; VVA-OUT = 3.5V
VFEED = 5.5V; VVA-OUT = 3.5V
2
4
10
20
mA
mA
Reference Output Voltage
–25°C < TJ < 85°C
4.97
5.1
5.23
V
5.01
5.1
5.19
V
∆Vref
Load Regulation
Tj = 25°C Iref = 0
1mA ≤ Iref ≤ 10mA
–25°C < TJ < 85°C
3
15
mV
∆Vref
Line Regulation
12V ≤ VCC ≤ 19V
–25°C < TJ < 85°C
3
10
mV
Iref sc
Short Circuit Current
Vref = 0V
20
30
50
mA
Tj = 25°C
12V ≤ VCC ≤ 19V
–25°C < TJ < 85°C
85
100
115
KHz
80
100
120
KHz
4.7
0.45
5
0.55
11.5
5.3
0.65
V
mA
mA
0.9
1.15
1.4
V
OSCILLATOR SECTION
fosc
Vsvp
I18C
I18D
Initial Accuracy
Frequency Stability
Ramp Valley to Peak
Charge Current
Discharge Current
VCOSC = 3.5V
VCOSC = 3.5V
Ramp Valley Voltage
V18
SYNC SECTION (Only for L4981A)
tW
Output Pulse Width
50% Amplitude
0.3
0.8
µs
I16
Sink Current with Low Output
Voltage
VSYNC = 0.4V
VCOSC = 0V
0.4
0.8
mA
-I16
Source Current with High Output
Voltage
VSYNC = 4.5V
VCOSC = 6.7V
1
6
mA
V16L
V16H
Low Input Voltage
High Input Voltage
0.9
Pulse for Synchronization
td
FREQUENCY MODULATION FUNCTION (Only for L4981B)
f18max
f18min
Maximum Oscillation Frequency
Minimum Oscillator Frequency
VFREQ-MOD = 0V (Pin 16) Ifreq = 0
IFREQ-MOD = 360µA (Pin 16)
VVRMS = 4V (Pin 7)
3.5
V
V
800
ns
85
IFREQ-MOD = 180µA (Pin 16)
VVRMS = 2V (Pin 7)
100
115
KHz
74
KHz
76
KHz
SOFT START SECTION
4/16
ISS
Soft Start Source Current
VSS = 3V
V12sat
Output Saturation Voltage
V3 = 6V, ISS = 2mA
60
100
140
µA
0.1
0.25
V
L4981A - L4981B
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
19.5
V
5.1
Vref
+20mV
V
SUPPLY VOLTAGE
Operating Supply Voltage
VCC
OVER VOLTAGE PROTECTION COMPARATOR
Vthr
V3Hys
I3
td
Rising Threshold Voltage
Vref
-20mV
Hysteresis
180
Input Bias Current
Propagation delay to output
VOVP = Vthr +100mV
250
320
mV
0.05
1
µA
1
2
µs
0.4
±30
0.9
mV
µs
85
105
µA
5
µA
±2
mV
500
nA
dB
OVER CURRENT PROTECTION COMPARATOR
Vth
td
Threshold Voltage
Propagation delay to Output
Current Source Generator
Iipk
IL
Leakage Current
CURRENT AMPLIFIER SECTION
VOCP = Vthr -0.2V
VIPK = -0.1V
only for L4981A
VIPK = -0.1V
only for L4981B
Voffset
Input Offset Voltage
VMULT OUT = VSENSE = 3.5V
I9bias
Input Bias Current
Open Loop Gain
VSENSE = 0V
1.1V ≤ VCA OUT ≤ 6V
SVR
Supply Voltage Rejection
V5H
65
-500
70
50
100
12V ≤ VCC ≤ 19V
VMULT OUT = 3.5V VSENSE = 3.5V
68
90
Output High Voltage
VMULT OUT = 200mV
ICA OUT = -0.5mA, VIAC = 0V
6.2
V5L
Output Low Voltage
VMULT OUT = -200mV
ICA OUT = 0.5mA, VIAC = 0V
-I5
Output Source Current
Output Sink Current
VMULT OUT = 200mV,
VIAC = 0V, VCA-OUT = 3.5V
I5
dB
V
0.9
2
2
10
10
11.5
12.5
V
mA
mA
OUTPUT SECTION
V20L
V20H
Output Voltage Low
ISINK = 250mA
Output Voltage High
ISOURCE = 250mA
VCC = 15V
0.5
0.8
V
V
tr
Output Voltage Rise Time
COUT = 1nF
50
150
ns
tf
Output Voltage Fall Time
Voltage Clamp
COUT = 1nF
ISOURCE = 0mA
30
16
100
19
ns
V
0.3
8
0.5
12
mA
mA
VGDRV
13
TOTAL STANDBY CURRENT SECTION
I19start
I19on
I19
Supply Current before start up
Supply Current after turn on
VCC = 14V
VIAC = 0V, VCOSC = 0,
Pin17 = Open
Operating Supply Current
Pin20 = 1nF
Zener Voltage
VCC
UNDER VOLTAGE LOCKOUT SECTION
(*)
12
16
mA
20
25
30
V
Vth ON
Turn on Threshold
14.5
15.5
16.5
V
Vth OFF
Turn off Threshold
Programmable Turn-on Threshold
9
10.6
10
12
11
13.4
V
V
Pin 15 to VCC = 220K
Pin15 to GND = 33K
LOAD FEED FORWARD
ILFF
VI
Bias Current
V6 = 1.6V
70
140
µA
V6 = 5.3V
200
300
5.3
µA
V
Input Voltage Range
1.6
(*) Maximum package power dissipation limits must be observed.
5/16
L4981A - L4981B
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Prameter
Test Condition
Min.
Typ.
Max.
Unit
VVA-OUT = 4V, VRMS = 2V,
VMULTOUT = 0, VLFF = 5.1V
IAC = 50µA, COSC = 0V
20
35
52
µA
VVA-OUT = 4V, VRMS = 2V,
VMULTOUT = 0, VLFF = 5.1V
IAC = 200µA, COSC = 0V
VVA-OUT = 2V, VRMS = 2V,
VMULTOUT = 0, VLFF = 5.1V
IAC = 100µA, COSC = 0V
100
135
170
µA
10
20
30
µA
VVA-OUT = 2V, VRMS = 4V,
VMULTOUT = 0, VLFF = 5.1V
IAC = 100µA, COSC = 0V
2
5.5
11
µA
VVA-OUT = 4V, VRMS = 4V,
VMULTOUT = 0, VLFF = 5.1V
IAC = 100µA, COSC = 0V
VVA-OUT = 4V, VRMS = 2V,
VMULTOUT = 0, VLFF = 2.5V
COSC = 0V, IAC = 200µA
VVA-OUT = 4V, VRMS = 4V
VMULTOUT = 0, VLFF = 5.1V
IAC = 200µA, COSC = 0V
VVA-OUT = 2V, VRMS = 4V,
VMULTOUT = 0, VLFF = 5.1V
IAC = 0, COSC = 0V
10
22
34
µA
20
37
54
µA
20
39
54
µA
-2
0
2
µA
MULTIPLIER SECTION
Multipler Output Current
K
Multiplier Gain
IMULT−OUT = K ⋅ IAC
if VLFF = VREF;
0.37
(VVA−OUT − 1.28) ⋅ (0.8 ⋅ VLFF − 1.28)
IMULT−OUT = IAC
(VVRMS)2
(VVA−OUT − 1.28)
2
(VVRMS)
⋅ K1
where: K1 = 1V
Figure 1: MULTI-OUT vs. IAC (VRMS = 1.7V;
VLFFD = 5.1V)
6/16
Figure 2: MULTI-OUT vs. IAC (VRMS = 2.2V;
VLFFD = 5.1V)
L4981A - L4981B
Figure 3: MULTI-OUT vs. IAC (VRMS = 4.4V;
VLFFD = 5.1V)
Figure 4: MULTI-OUT vs. IAC (VRMS = 5.3V;
VLFFD = 5.1V)
Figure 5: MULTI-OUT vs. IAC (VRMS = 1.7V;
VLFFD = 2.5V)
Figure 6: MULTI-OUT vs. IAC (VRMS = 2.2V;
VLFFD = 2.5V)
Figure 7: MULTI-OUT vs. IAC (VRMS = 4.4V;
VLFFD = 2.5V)
Figure 8: MULTI-OUT vs. IAC (VRMS = 5.3V;
VLFFD = 2.5V)
7/16
L4981A - L4981B
Figure 9A: L4981A Power Factor Corrector (200W)
L 0.9mH
R17
806K
1%
R6
620K
5%
R17
806K
1%
R7 360K 5% R6 620K 5%
DZ
22V
0.5W
+
D1 5TTA5060
R15
10K
R14
0.5W
56
Q2
0.5W
STK2N50
D3 1N4150
R19
1.1M
5%
D3
C7 2N2222
220nF
100V
R8
33K
5%
C8
220nF
100V
R19
1.1M
5%
C10
15nF
100V
R1
412K
1%
R9
910K
1%
R1
412K
1%
R9
910K
1%
D4
1N4150
C11
100µF
25V
R23
R20
Vo
R22
10K 5%
FUSE
Vi
88VAC to 254VAC
NTC
15
7
4
BRIDGE
4 x BY214
19
14
R12
220K
5%
C1
220nF
400V
C9
330nF
L4981A
3
R11
D2 1N4150
STH/STW15NB50
2
560 1%
8
R21
5.1K
1%
5
9
R3
2.7K
5% RS
12
17
11 6
1
R13
20
C12
270pF
630V
Q1
15 5%
C3
R5
27K 5%
18
C2
100µF
450V
13
D5
BYT
11600
1nF
R4
2.7K
5%
R2
11K
1%
R10
21K
1%
C5
1µF
16V
C6
1µF
16V
R16
24K
1%
C4
1nF
R18
1.8K
4W
D93IN029C
0.07 2W
fSW = 80kHz; PO = 200W; VOUT = 400V; Irms max = 2.53A; VOVP = 442V; IPK max = 6.2A
Figure 9B: L4981B Power Factor Corrector (200W)
L 0.9mH
R22
1.1M
R17
806K
1%
R6
620K
5%
R17
806K
1%
R7 360K 5% R6 620K 5%
C8
220nF
100V
R19
1.1M
5%
R19
1.1M
5%
D3
C7 2N2222
220nF
100V
R8
33K
5%
R15
10K
R14
0.5W
56
Q2
0.5W
STK2N50
D3 1N4150
DZ
22V
0.5W
C11
100µF
25V
+
D1 5TTA5060
C10
15nF
100V
R1
412K
1%
R9
910K
1%
R1
412K
1%
R9
910K
1%
D4
1N4150
R23
R20
Vo
R22
10K 5%
FUSE
Vi
88VAC to 254VAC
NTC
C1
220nF
400V
15
7
4
BRIDGE
4 x BY214
19
14
R12
220K
5%
16
L4981B
D2 1N4150
2
560 1%
8
5
9
R3
2.7K
5% RS
17
11 6
12
1
20
R13
STH/STW15NB50
Q1
15 5%
C12
270pF
630V
C3
R5
27K 5%
18
C2
100µF
450V
3
R11
R21
5.1K
1%
C9
330nF
13
D5
BYT
11600
1nF
R4
2.7K
5%
0.07 2W
C4
1.1nF
R16
24K
1%
C6
1µF
16V
R18
1.8K
4W
R2
11K
1%
C5
1µF
16V
D95IN220A
fSW = 80 to 92kHz; PO = 200W; VOUT = 400V; Irms max = 2.53A; VOVP = 442V; IPK max = 6.2A
8/16
R10
21K
1%
L4981A - L4981B
Figure 10: Reference Voltage vs. Source Reference Current
Figure 11: Reference Voltage vs. Supply Voltage
Figure 12: Reference Voltage vs. Junction Temperature
Figure 13: Switching Frequency vs. Junction
Temperature
Figure 14: Gate Driver Rise and Fall Time
Figure 15: Operating Supply Current vs. Supply
Voltage
9/16
L4981A - L4981B
Figure 16: Programmable Under Voltage Lockout Thresholds
Figure 17: Modulation Frequency Normalized in
an Half Cycle of the Mains Voltage
1
fsw
Vl
1
0.8
0.8
0.4
0.4
0.2
0.2
R22 = R23 ⋅ 6.8
0
45
0
R23 (Kohm)
90
0
135
180
Electrical degrees
Table 1: Programmable Under Voltage Lockout Thresholds.
VCC ON
VCC OFF
R22
R23
11V
10V
82kΩ
12kΩ
12V
10.1V
220kΩ
33kΩ
13V
10.5V
430kΩ
62kΩ
14V
10.8V
909kΩ
133kΩ
14.5V
10.9V
1.36MΩ
200kΩ
15V
11V
2.7MΩ
390kΩ
Figure 18: Oscillator Diagram
10/16
L4981A - L4981B
Figure 19: Demo Board Circuit (VO = 400V; PO = 360W).
R14
68
B2= D1+D2
+D8+D9
R4
1.2M
C2
330n
C3
330n
F1
T15A250V
R5
220k
R12
56k
BRIDGE
B1 8A
C10
150uF
L1=0.5mE42*21*15
gap=1.9 58/6 turns
20*.2mm
R11
56k
R6
500k
VCC
Dz1
18V
R7
500k
L2
3u
C8
100n
R2
33k
NTC
2.5
V+ BUS=400V
D5STTA106
D6
DZW06-48
C11
220n
VCC
D4-STTH8R06
to220 (/40CW)
R18
6.8
2W
C14
100n
R19
750k
R20
750k
D7-STTA406
R22
750k
R23
750k
R16
220k
88 to 264 Vac
7
4
1
13
19
14
C1
330nF
400V
Cf
.22uF
600V
3
15
L4981A/ B**
6
2
8
5
9
18
C15
220uF
450V
20
16
RAux1
**
D3
10
17
12
11
Cs
330pF
R17
15
Q1+Q2#
RAux2
R21
19.6k
R10
5k
Q4
4007
TP1
R1
460
R3
2.2k
R8
17k
C6
3.3n
C9
1n
R15
24k
C12
1u
C13
1u
R13
2.2k
R9 (RS)
50m
// 3*0.15)
R24
16.9k
R25
1k
2W
# // Q1&Q2
TO220*2
STM12NM50
/ 7C/W
Figure 20: Component Layout (Dimensions 88 x 150mm).
11/16
L4981A - L4981B
Figure 20: P.C.B. Component Side (Dimensions 88 x 150mm).
Figure 20: P.C.B. Solder Side (Dimensions 88 x 150mm).
12/16
L4981A - L4981B
DEMO BOARD EVALUATION RESULTS
Table 2. Nominal Power range at 110Vac.
Vmains
Pout
Vout
Pin
THD
PF
88Vac
366W
404Vdc
397W
5%
0.998
Eff.
.92
110Vac
370W
406Vdc
395W
2.2%
0.999
.94
132Vac
372W
407Vdc
394W
3%
0.999
.945
Pin
THD
PF
Eff.
Table 3. Nominal Power range at 220Vac.
Vmains
Pout
Vout
176Vac
378W
410Vdc
394W
4.7%
0.997
.959
220Vac
381W
412Vdc
395W
6.4%
0.993
.964
264Vac
381W
412Vdc
395W
8.1%
0.987
.964
REFERENCE:
AN628 - DESIGNING A HIGH POWER FACTOR SWITCHING PREREGULATOR WITH THE L4981
CONTINUOUS MODE
13/16
L4981A - L4981B
mm
inch
OUTLINE AND
MECHANICAL DATA
DIM.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.35
2.65
0.093
0.104
A1
0.1
0.3
0.004
0.012
B
0.33
0.51
0.013
0.020
C
0.23
0.32
0.009
0.013
D
12.6
13
0.496
0.512
E
7.4
7.6
0.291
0.299
e
1.27
0.050
H
10
10.65
0.394
0.419
h
0.25
0.75
0.010
0.030
L
0.4
1.27
0.016
0.050
SO20
K
0˚ (min.)8˚ (max.)
L
h x 45˚
A
B
e
A1
K
H
D
20
11
E
1
0
1
SO20MEC
14/16
C
L4981A - L4981B
mm
DIM.
MIN.
a1
0.254
B
1.39
TYP.
inch
MAX.
MIN.
TYP.
MAX.
0.010
1.65
0.055
0.065
b
0.45
0.018
b1
0.25
0.010
D
25.4
1.000
E
8.5
0.335
e
2.54
0.100
e3
22.86
0.900
F
7.1
0.280
I
3.93
0.155
L
OUTLINE AND
MECHANICAL DATA
3.3
0.130
DIP20
Z
1.34
0.053
15/16
L4981A - L4981B
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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