LT1508 Power Factor and PWM Controller (Voltage Mode) U DESCRIPTION FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ The LT ® 1508 is a complete solution for universal off-line switching power supplies utilizing active power factor correction. The PFC section is identical to the LT1248 PFC controller except the EN/SYNC pin is removed because PFC and PWM are synchronized internally. PFC and PWM Single Chip Solution Synchronized Operation up to 300kHz 99% Power Factor Over 20:1 Load Current Range Voltage Mode PWM Instantaneous Overvoltage Protection Dedicated Overvoltage Protection (OVP Pin) Minimal Line Current Dead Zone Typical 250µA Start-Up Supply Current Line Switching Noise Filter Low Quiescent Current: 13mA Fast 1.5A Peak Current Gate Drivers Separate Soft Start Control The voltage mode PWM section (LT1509 is the current mode counterpart) contains all the primary side functions to convert the PFC preregulated high voltage output to an isolated low voltage output. The PWM duty cycle is internally limited to 47% (maximum 50%) to prevent transformer saturation. PWM soft start begins when the PFC output reaches the preset voltage. In the event of brief line loss, PWM will be shut off when the PFC output voltage drops below 73% of the preset value. U APPLICATIONS , LTC and LT are registered trademarks of Linear Technology Corporation. Universal Power Factor Corrected Power Supplies and Preregulators W ■ BLOCK DIAGRAM VREF VAOUT 7.5V VREF 10 VCC + 16V TO 10V – MOUT ISENSE 12 8 CAOUT GND1 6 3 7 5 7µA – + M1 – VSENSE – + 7.5V 25k IB 9 IM – CA R IA2IB IM = 200µA2 + SS1 RUN Q GTDR1 S 1 + 0.7V – R OVP – 11 R + + 7.9V + – IA EA IAC OSC 2R 16V 14µA GND2 16 2 CL 1V – – 14µA + PWMOK 4 CSET – + SS2 17 RUN 2.2V 14 PKLIM VCC RSET 15 55% DELAY + S 7V TO 4.7V + 13 R GTDR2 Q 20 R – NOTE: PWM PULSE IS DELAYED BY 55% DUTY CYCLE AFTER PFC PULSE 19 ILIM VC 18 50µA 200ns BLANKING 16V 1508 BD 1 LT1508 U DESCRIPTION W U U W W W ABSOLUTE MAXIMUM RATINGS switching noise which can cause instability when fed into the multiplier. Line current dead zone is minimized with low bias voltage at the current input to the multiplier. The LT1508 provides many protection features including peak current limiting and overvoltage protection. Implemented with a very high speed process, the LT1508 can be operated at frequencies as high as 300kHz. U By using fixed high frequency PWM current averaging without the need for slope compensation, the LT1508 achieves far lower line current distortion with a smaller magnetic element than systems that use either peak current detection, or zero current switching approach, in both continuous and discontinuous modes of operation. The LT1508 also provides filtering capability to reject line PACKAGE/ORDER INFORMATION Supply Voltage ........................................................ 27V GTDR Current Continuous ...................................... 0.5A GTDR Output Energy ................................................ 5µJ IAC, RSET, PKLIM Input Current .............................. 20mA VSENSE, OVP Input Voltage .................................... VMAX ILIM, VC Input Voltage ................................................ 8V ISENSE, MOUT Input Current ................................... ±5mA Operating Junction Temperature Range LT1508C ................................................ 0°C to 100°C LT1508I ............................................ – 40°C to 125°C Thermal Resistance (Junction-to-Ambient) N Package ................................................... 100°C/W SW Package ................................................ 120°C/W ORDER PART NUMBER TOP VIEW GTDR1 1 20 GTDR2 GND2 2 19 ILIM GND1 3 18 VC CSET 4 17 VCC PKLIM 5 16 SS1 CAOUT 6 15 RSET ISENSE 7 14 VSENSE MOUT 8 13 SS2 IAC 9 12 VREF VAOUT 10 11 OVP N PACKAGE 20-LEAD PDIP LT1508CN LT1508CSW LT1508IN LT1508ISW SW PACKAGE 20-LEAD PLASTIC SO WIDE TJMAX = 125°C, θJA = 100°C/ W (N) TJMAX = 125°C, θJA = 120°C/ W (SW) Consult factory for Military grade parts. ELECTRICAL CHARACTERISTICS Maximum operating voltage (VMAX) = 25V, VCC = 18V, RSET = 15k to GND, CSET = 1nF to GND, IAC = 100µA, ISENSE = 0V, CAOUT = 3.5V, VAOUT = 5V, OVP = VREF. No load on any outputs unless otherwise noted. PARAMETER Overall Supply Current (VCC in Undervoltage Lockout) Supply Current On VCC Turn-On Threshold (Undervoltage Lockout) VCC Turn-Off Threshold Voltage Amplifier (PFC Section) Voltage Amp Offset Input Bias Current Voltage Gain Voltage Amp Unity-Gain Bandwidth Voltage Amp Output High (Internally Clamped) Voltage Amp Output Low Voltage Amp Short-Circuit Current 2 CONDITIONS VCC = Lockout Voltage – 0.2V 11.5V ≤ VCC ≤ VMAX MIN TYP MAX UNITS ● 15.5 9.5 0.25 13 16.5 10.5 0.45 19 17.5 11.5 mA mA V V ● – 10 10 – 250 mV nA dB MHz V V mA ● ● ● VAOUT = 3.5V VSENSE = 0V to 7V ● 70 ● 11.3 ● VAOUT = 0V ● 3 – 25 100 3 13.3 1.1 8 2 17 LT1508 ELECTRICAL CHARACTERISTICS Maximum operating voltage (VMAX) = 25V, VCC = 18V, RSET = 15k to GND, CSET = 1nF to GND, IAC = 100µA, ISENSE = 0V, CAOUT = 3.5V, VAOUT = 5V, OVP = VREF. No load on any outputs unless otherwise noted. PARAMETER Current Amplifier (PFC Section) Current Amp Offset Voltage ISENSE Bias Current Current Amp Voltage Gain Current Amp Unity-Gain Bandwidth Current Amp Output High Current Amp Output Low Current Amp Short-Circuit Current Input Range, ISENSE, MOUT (Linear Operation) Reference Reference Output Voltage VREF Load Regulation VREF Line Regulation VREF Short-Circuit Current VREF Worst Case Current Limit PKLIM Offset Voltage PKLIM Input Current PKLIM to GTDR Propagation Delay Multiplier Multiplier Output Current Multiplier Output Current Offset Multiplier Maximum Output Current Multiplier Gain Constant (Note 1) IAC Input Resistance Oscillator Oscillator Frequency CSET Ramp Peak-to-Peak Amplitude CSET Ramp Valley Voltage Overvoltage Comparator (PFC Section) Comparator Trip Voltage Ratio (VTRIP / VREF) Hysteresis OVP Bias Current OVP Propagation Delay Gate Drivers (GTDR1 and GTDR2) Max Output Voltage Output High Output Low (Device Unpowered) Output Low (Device Active) Peak Output Current Rise and Fall Time Max Duty Cycle (PFC) Max Duty Cycle (PWM) (Note 2) CONDITIONS MIN ● ● 80 ● 7.2 ● CAOUT = 0V ● ● IREF = 0mA, TA = 25°C – 5mA < IREF < 0mA 11.5V < VCC < VMAX VREF = 0V Load, Line, Temperature PKLIM = – 0.1V PKLIM Falling from 50mV to – 50mV IAC = 100µA, RSET = 15k RAC = 1M from IAC to GND IAC = 450µA, RSET = 15k, VAOUT = 7V, MOUT = 0V 7.39 ● – 20 12 7.32 ● – 25 ● ● MAX UNITS ±1 – 25 110 3 8.5 1.1 8 ±4 – 250 mV nA dB MHz V V mA V 7.50 5 5 28 7.5 7.60 – 50 400 ● kHz kHz V V 1.05 0.35 0.2 100 1.06 15 17.5 0.9 0.5 0.2 2 25 96 1.5 1 0.4 ● 1.04 ● 0mA Load, 18V < VCC – 200mA Load, 11.5V ≤ VCC ≤ 15V VCC = 0V, 50mA Load (Sinking) 200mA Load (Sinking) 10mA Load 10nF from GTDR to GND 1nF from GTDR to GND ● ● 12 VCC – 3.0 ● ● ● 90 44 mV µA ns 115 78 5.0 1.55 85 58 4.35 1.15 OVP = 7.5V 25 – 100 100 68 4.7 1.3 ● ● – 286 20 50 7.68 V mV mV mA V 35 15 ● 2 17 1 µA µA µA V –2 kΩ 35 – 0.05 – 260 0.035 25 ● IAC from 50µA to 1mA RSET = 15k, CSET = 1000pF RSET = 15k, CSET = 1500pF 3 – 0.3 TYP – 0.5 – 235 1 50 V µA ns V V V V V A ns % % 3 LT1508 ELECTRICAL CHARACTERISTICS VCC = 18V, RSET = 15k to GND, CSET = 1nF to GND, IAC = 100µA, ISENSE = 0V, CAOUT = 3.5V, VAOUT = 5V, OVP = VREF. No load on any outputs, unless otherwise noted. PARAMETER Soft Start Current SS1 Current (PFC) SS2 Current (PWM) Comparators in PWM Section ILIM Input Current Current Limit Comparator (CL) Threshold GTDR2 Switching Off Threshold at VC or at SS2 VC Input Current PWMOK Comparator Low Threshold (in Terms of VREF) VC Pin High Voltage GTDR2 Turn-On Blanking Time CONDITIONS SS1 = 2.5V SS2 = 1V ● ILIM = 0V, VC = 1.6V VC > 2.6V ILIM = 0V VC = 0V ● ● ● ● ● The ● denotes specifications which apply over the full operating temperature range. IM Note 1: Multiplier Gain Constant: K = IAC (VAOUT – 2)2 TYP MAX 5 5 12 12 30 30 µA µA – 0.3 1.1 –2 1.20 µA V V µA 0.95 1 – 20 0.57 6.2 ● 1mA into VC Pin MIN ● 0.63 6.9 180 UNITS – 80 0.70 7.5 V ns Note 2: GTDR2 (PWM) pulse is delayed by 53% duty cycle after GTDR1 (PFC) is set. See PFC/PWM Synchronization graph in the Typical Performance Characteristics section. U W TYPICAL PERFORMANCE CHARACTERISTICS PFC Voltage Amplifier Open-Loop Gain and Phase 100 PFC Current Amplifier Open-Loop Gain and Phase 0 80 100 –20 80 –20 GAIN GAIN –60 GAIN (dB) GAIN (dB) 40 60 40 –80 20 –100 0 –120 10M –20 PHASE –40 –60 PHASE (DEG) –40 PHASE (DEG) 60 20 PFC/PWM Synchronization 0 PFC (GTDR1) 53% –80 PHASE PWM (GTDR2) 0 –20 10 100 1k 10k 100k FREQUENCY (Hz) 1M 1508 G01 4 –100 10 100 1k 10k 100k FREQUENCY (Hz) 1M –120 10M 1508 G02 TIME 1508 G03 LT1508 U W TYPICAL PERFORMANCE CHARACTERISTICS Reference Voltage vs Temperature Multiplier Current 300 7.536 VAOUT = 5.5V VAOUT = 7V 7.512 VAOUT = 6.5V 7.500 VAOUT = 6V IM (µA) REFERENCE VOLTAGE (V) 7.524 7.488 7.476 VAOUT = 5V 150 VAOUT = 4.5V 7.464 VAOUT = 4V 7.452 VAOUT = 3.5V 7.440 7.428 –75 –50 –25 0 25 50 75 100 125 150 JUNCTION TEMPERATURE (°C) 0 0 VAOUT = 3V VAOUT = 2.5V 500 250 IAC (µA) 1508 G05 1508 G04 Supply Current vs Supply Voltage Start-Up Supply Current vs Supply Voltage GTDR Rise and Fall Time 400 16 550 15 500 TJ = –55°C 450 12 TJ = 125°C TJ = 25°C 11 10 FALL TIME 200 9 RISE TIME 8 100 7 32 21 SUPPLY VOLTAGE (V) 0 10 20 30 40 LOAD CAPACITANCE (nF) FREQUENCY (kHz) 350 300 250 200 150 MAXIMUM DUTY CYCLE 500 RSET = 10k RSET = 15k RSET = 20k RSET = 30k 2200 1508 G09 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V) 1508 G08 MOUT Pin Characteristics 1.0 0.98 0.5 0.97 0.96 0.95 0.94 0.93 0.91 1800 1400 CSET CAPACITANCE (pF) 0 50 0.99 50 1000 125°C 150 1.5 0.92 600 200 1.00 100 0 200 –55°C 25°C 250 GTDR1 Maximum Duty Cycle vs RSET and CSET Frequency vs RSET and CSET 400 300 1508 G07 1508 G06 450 350 50 MOUT CURRENT (mA) 10 0 400 100 NOTE: GTDR SLEWS BETWEEN 1V AND 16V 6 5 SUPPLY CURRENT (µA) 300 13 TIME (ns) SUPPLY CURRENT (mA) 14 0.90 200 RSET = 10k RSET = 15k RSET = 20k RSET = 30k 600 1000 1800 1400 CSET CAPACITANCE (pF) TJ = 125°C TJ = 25°C TJ = –55°C 0 –0.5 –1.0 –1.5 –2.0 –2.5 –3.0 –3.5 2200 1508 G10 –4.0 –2.4 –1.2 1.2 0 MOUT VOLTAGE (V) 2.4 1508 G11 5 LT1508 U W TYPICAL PERFORMANCE CHARACTERISTICS RSET Voltage vs Current PKLIM Pin Characteristics 120 –360 TJ = 125°C TJ = 25°C TJ = –55°C 100 –240 60 PKLIM CURRENT (µA) VRSET – VREF (mV) 80 40 20 0 –20 –40 –180 –120 –60 0 60 120 –60 180 –80 240 –100 0 –0.2 –0.4 –0.8 –0.6 RSET CURRENT (mA) –1.0 1508 G12 U U U PIN FUNCTIONS TJ = 125°C TJ = 25°C TJ = –55°C –300 300 –0.8 –0.4 0.4 0 PKLIM VOLTAGE (V) 0.8 1508 G13 (For application help with the PFC portion of this chip, see the LT1248 data sheet) PFC SECTION GTDR1 (Pin 1): The PFC MOSFET gate driver is a fast totem pole output which is clamped at 15V. Capacitive loads like the MOSFET gates may cause overshoot. A gate series resistor of at least 5Ω will prevent the overshoot. GND2 (Pin 2): Power Ground. High current spikes occur in this line when either GTDR1 or GTDR2 switches low. GND1 (Pin 3): Analog Ground. CSET (Pin 4): The capacitor from this pin to GND and RSET determines oscillator frequency. The oscillator ramp is 5V and the frequency = 1.5/(RSET CSET). PKLIM (Pin 5): The threshold of the peak current limit comparator is GND. To set current limit, a resistor divider can be connected from VREF to the current sense resistor. IAC (Pin 9): This is the AC line voltage sensing input to the multiplier. It is a current input that is biased at 2V to minimize the crossover dead zone caused by low line voltage. At the pin, a 25k resistor is in series with the current input, so that a lowpass RC can be used to filter out the switching noise coming down from the line with a high line impedance environment. VAOUT (Pin 10): This is the output of the voltage error amplifier. The output is clamped at 13.5V. When the output goes below 2.5V, the multiplier output current is zero. CAOUT (Pin 6): This is the output of the current amplifier that senses and forces the line current to follow the reference signal that comes from the multiplier by commanding the pulse width modulator. When CAOUT is low, the modulator has zero duty cycle. OVP (Pin 11): This is the input to the overvoltage comparator. The threshold is 1.05 times the reference voltage. When the comparator trips, the multiplier, which is quickly inhibited, blanks PFC switching to prevent further overshoot. This pin is also the input to the PWMOK comparator that releases the PWM soft start (SS2) after the PFC output gets close to the final voltage and has a hysteresis of approximately 150V for 382V PFC output. ISENSE (Pin 7): This is the inverting input of the current amplifier. This pin is clamped at – 0.6V by an ESD protection diode. VREF (Pin 12): This is the 7.5V reference. When VCC goes low, VREF will stay at 0V. VREF biases most of the internal circuitry and can source up to 5mA externally. MOUT (Pin 8): This is the multiplier high impedance current output and the noninverting input of the current amplifier. This pin is clamped at – 0.6V and 3V. VSENSE (Pin 14): This is the inverting input to the voltage amplifier. 6 LT1508 U U U PIN FUNCTIONS (For application help with the PFC portion of this chip, see the LT1248 data sheet) RSET (Pin 15): A resistor from RSET to GND sets the oscillator charging current and the maximum multiplier output current which is used to limit the maximum line current. IM(MAX) = 3.75V/RSET SS1 (Pin 16): Soft Start. SS1 is reset to zero for low VCC. When VCC rises above the lockout threshold, SS1 is released to ramp up at a rate set by the internal 12µA current source and an external capacitor. During this ramp up, PFC reference voltage is equal to SS1 voltage. After SS1 rises past 7.5V, reference voltage remains at 7.5V. VCC (Pin 17): This is the supply for the chip. The LT1508 has two fast gate drivers required to fast charge high power MOSFET gate capacitances. Good supply bypassing is required consisting of a 0.1µF ceramic capacitor in parallel with a low ESR electrolytic capacitor (56µF or higher) in close proximity to IC GND. PWM SECTION SS2 (Pin 13): PWM Soft Start. The comparator PWMOK monitors the OVP pin and releases the SS2 after the PFC output gets close to the final voltage. VC (Pin 18): PWM voltage mode control voltage. Normally connects to the optocoupler amplifier output. A pull-up current of 50µA flows out of the pin. ILIM (Pin 19): PWM current sense input with limit set to 1.1V. GTDR2 (Pin 20): The PWM MOSFET gate driver is a 1.5A fast totem pole output. It is clamped at 15V. Capacitive loads like the MOSFET gates may cause overshoot. A gate series resistor of at least 5Ω will prevent the overshoot. U W U U APPLICATIONS INFORMATION Voltage Error Amplifier (PFC Section) C2 0.047µF The voltage error amplifier has a 100dB DC gain and 3MHz unity-gain frequency. The output is internally clamped at 13.3V with VCC = 18V. Maximum error amp output voltage decreases to VCC – 1.5V for VCC less than 12V. The noninverting input is tied to the 7.5VREF through a diode and can be pulled down with the SS1 pin. Referring to Figure 1, VOUT = VREF [(R1 + R2)/R2]. With R1 = 1M and R2 = 20k, VOUT = 382V. R1 through R4, C1 and C2 form the compensation for the voltage loop. Gain of the voltage error amp with the values shown is given by: VAOUT = – VOUT 1+j R1 1M R3 20k VSENSE R4 330k – + VAOUT ERROR AMP 7.5VREF R2 20k LT1508 OVP – + 1.05VREF f 1 OVERVOLTAGE COMPARATOR 1508 • F01 ) ) Figure 1 (j)(f)(6.6) 1 + j f 11 The small-signal gain for the remaining portion of the voltage loop for frequencies below the current loop bandwidth is (see Figure 2): VOUT VIN = VAOUT (5π)(j)(f)(COUT)(VOUT) C1 0.47µF REGULATOR OUTPUT VOUT = 382V (RREF)(PIN) RS(RIAC + 25k) With VIN = 120VAC, PIN = 150W, RS = 0.15Ω, RREF = 4k, RIAC = 1M, VOUT = 382V and COUT = 470µF, VOUT/VAOUT = 85/(j)(f). At very low frequencies, the loop has a – 40dB/ decade slope. Additional zero-pole compensation is added at 1Hz and 11Hz. The resulting loop gain and phase margin is shown in Figure 3. The unity-gain bandwidth is low compared to 120Hz, which results in low distortion and a high power factor. 7 LT1508 U U W U APPLICATIONS INFORMATION VIN L IIN RS 0.15Ω + VIN – D1 RREF 4k VOUT COUT 470µF C4 300pF R5 4k VCA(OUT) (VOSC)(L)(fSW) ≤ VRS (VOUT)(RS) C3 0.001µF R6 20k To avoid subharmonic oscillations, the amplified downslope of the inductor current must be less than the slope of the oscillator ramp. = VIN ISENSE MOUT RIAC 1M IM CAOUT – + (5V)(500µH)(100k) = 4.4 (382V)(0.15Ω) CA LT1508 IAC If the current amplifier gain at 100kHz is less than 4.4, there will be no subharmonic oscillation. The open-loop gain of the current loop is given by: 1508 • F02 VRS Figure 2 VCA(OUT) 60 80 45 40 30 20 15 0 0 –20 –15 –40 –30 1000 0.1 1 10 100 1508 • F03 Figure 3 Current Amplifier (PFC Section) The current amplifier has a 110dB DC gain, 3MHz unitygain frequency and a 2V/µs slew rate. It is internally clamped at 8.5V. Note that in the current averaging operation, high gain at twice the line frequency is necessary to minimize line current distortion. Because CAOUT may need to swing 5V over one line cycle at high line condition, 20mV AC will be needed at the inputs of the current amplifier for a gain of 260 at 120Hz. Especially at light load when the current loop reference signal is small, lower gain will distort the reference signal and line current. But, if signal gain at switching frequency is too high, the system behaves more like a current mode system and can cause subharmonic oscillation. 8 The current error amp, with R5 = 4k, R6 = 20k, C3 = 0.001µF and C4 = 300pF, provides zero pole compensation resulting in 16kHz loop crossover frequency. The current amp gain at 100kHz is 1.7. The resulting current loop gain and phase margin is shown in Figure 4. 80 60 60 45 40 30 20 15 0 0 –20 PHASE MARGIN (DEG) FREQUENCY (Hz) (VOUT)(RS) (j)(2πf)(L)(VOSC) (382V)(0.15Ω) 3648 = (j)(2πf)(500µH)(5V) (j)(f) CURRENT LOOP GAIN (dB) 60 PHASE MARGIN (DEG) LOOP GAIN (dB) = = –15 –40 0.1 1 10 100 –30 1000 FREQUENCY (kHz) 1508 • F04 Figure 4 Multiplier The multiplier has high noise immunity and superior linearity over its full operating range. The current gain is IM = (IACIEA2)/(200µA2) with IEA = (VAOUT – 2V)/ 25k. The error amplifier output voltage required at the input to the multiplier is: LT1508 U W U U APPLICATIONS INFORMATION VAOUT = 2 + (PIN)(RS)(25)(RIAC + 25k) (VIN2)(RREF) See Figure 2 for RREF. VAOUT is squared in the multiplier, resulting in excellent performance over a wide range of output power and input voltage without the addition of feedforward line frequency ripple. Care must be taken to avoid feeding switching frequency noise into the multiplier from the IAC pin. An internal 25k is provided in series with the low impedance multiplier input so that only a capacitor from the IAC pin to GND1 is required to filter noise. The maximum multiplier output current, which ultimately limits the input line current, is set by a resistor from the RSET pin to GND1 according to the formula: IM(MAX) = 3.75V/RSET. Figure 5 shows IM versus IAC for various values of VAOUT. Note that Figure 5 data was taken with RSET = 15k. 300 VAOUT = 5.5V VAOUT = 7V VAOUT = 6.5V IM (µA) VAOUT = 6V VAOUT = 5V 150 VAOUT = 4.5V VAOUT = 4V VAOUT = 3.5V 0 0 250 IAC (µA) VAOUT = 3V VAOUT = 2.5V 500 1508 • F05 Figure 5. Multiplier Current IM vs IAC and VAOUT Oscillator Frequency and Maximum Line Current Setting The oscillator frequency is set by RSET and CSET. RSET is the resistor from the RSET pin to GND1 and CSET is the capacitor from the CSET pin to GND1. RSET should be determined first. The oscillator frequency, which is equal to the switching frequency for both the PFC and PWM section, is determined by: 1.5 fOSC = (RSET)(CSET) The multiplier output acts as the command signal to the current loop error amplifier. During steady-state operation the voltage across RREF = (IM)(RREF) = (IIN)(RS). Based on this the value for RS is determined by: RS ≤ (IM(MAX))(RREF)(VIN)(eff) POUT √2 with RSET = 15k, IM(MAX) = 3.75/15k = 250µA. For a 300W converter with an efficiency (eff) of 0.8 at low line (90VRMS) and RREF set to 4k, RS should be less than: (250µA)(4k)(90VAC)(0.8) 300W√2 = 0.169Ω A 0.15Ω resistor will yield a maximum peak input current of (IM(MAX))(RREF/RS) = (250µA)(4k)/0.15Ω = 6.67A. For a 100kHz switching frequency with RSET = 15k, CSET = 1.5/ (100kHz)(15k) = 1nF. For added protection the LT1508 provides a second independent current limit comparator. When the input voltage to the comparator (PKLIM pin) dips below 0V, GTDR1 pin quickly goes low turning off the PFC power switch. A resistor divider from VREF to RS (Figure 6) senses the voltage across the line current sense resistor (RS) and limits the peak input line current to [(7.5V/R1) + 50µA] (R2/RS). The 50µA represents the PKLIM input current which flows out of the PKLIM pin. With R1 = 10k and R2 = 1.8k, IIN = 9.6A peak above the 6.67A peak average plus the input inductor peak ripple current. Always use RSET to set the primary line current limit. The PKLIM comparator is only for secondary protection. When the line current reaches the primary limit, VOUT can no longer be supported with the given input current and begins to fall. System stability is maintained by the current loop which is controlled by the current amplifier. When the R2 1.8k R1 10k 7.5V LT1508 VREF + – RS 0.15Ω IPKLIM PKLIM C1 1nF ILINE C1 IS TO REJECT NOISE, CURRENT LIMIT DELAY IS ABOUT 2µs – + 1508 • F06 Figure 6 9 LT1508 U U W U APPLICATIONS INFORMATION line current reaches the secondary limit, the comparator takes over control and hysteresis may occur causing audible noise. 0.047µF 0.47µF R1 1M Overvoltage Protection (PFC Section) Because of the slow loop response necessary for power factor correction, output overshoot can occur following a sudden load reduction or removal. To protect downstream components, the LT1508 provides an overvoltage comparator which senses the output voltage and quickly reduces the line current demand. Referring back to Figure 1, VOUT is 382V and during normal operation, since no current flows in R3, 7.5V appears at both the VSENSE and OVP pins. When VOUT overshoots its preset value, the overcurrent from R1 will flow through R2 as well as R3. The voltage amplifier feedback will keep VSENSE at 7.5V. Therefore, the equivalent AC resistance seen by the OVP pin is R2 in parallel with R3 or 10k. With these values and the overvoltage comparator trip level internally set at 1.05VREF, the comparator trips when VOUT overshoots 10%. Overvoltage trip level is given by: (%)VOUT = 5% ( R2 + R3 R3 ) For additional protection, the OVP pin can be connected to VOUT through an independent resistor divider (see Figure 7). This ensures overvoltage protection during safety agency abnormal testing conditions, such as opening R1 or shorting R2. The output of the multiplier looks like a high impedance current source. In the current loop, offset line current is determined by multiplier offset current and input offset voltage of the current error amplifier. A – 4mV current amplifier VOS translates to 27mA line current and 6.7W input power for 250VAC line if a 0.15Ω sense resistor is used. Under a no-load condition or when the load power is less than the offset output power, the offset line current could slowly charge the output to an overvoltage level. This is because the best the overvoltage comparator can do is to reduce the multiplier output current to zero. Unfortunately, this does not guarantee zero output current if the current amplifier has offset. To regulate VOUT under 10 330k VOUT R4 1.05M VSENSE – VAOUT R2 20k + ERROR AMP OVP R5 20k – LT1508 + OVERVOLTAGE COMPARATOR 1.05VREF VOUT = 382V OVERVOLTAGE = 420V 1508 • F07 Figure 7 this condition, the amplifier M1 (see Block Diagram) becomes active. When VAOUT reduces to 2.2V, M1 supplies up to 7µA of current to the resistor at the ISENSE pin in order to cancel a negative VOS and keep VOUT error to within 2V. Undervoltage Lockouts and Soft Start The LT1508 turns on when VCC reaches 16V and remains on until VCC falls below 10V, whereupon the chip enters the lockout state. In the lockout state, the oscillator is off and the VREF and gate driver pins remain low. A capacitor from SS1 to GND1 determines the ramp-up time of the PFC section. SS1 is released from a zero when VCC rises above the lockout threshold. Once released, an internal 14µA current source ramps the voltage error amplifier’s reference voltage to 7.5V. SS1 voltage then continues beyond 7.5V. A second capacitor from SS2 to GND1 determines the start-up time from the PWM section. A PWMOK comparator (see Block Diagram) holds SS2 low until the OVP pin reaches 7V. This corresponds to the PFC output voltage reaching approximately 93% of its preset voltage. SS2 is diode coupled to the PMW comparator which is connected to the VC pin by a second diode. Holding SS2 low at any time will disable PWM output. Once released, the 14µA current source ramps the PWM comparator LT1508 U U W U APPLICATIONS INFORMATION input up to VC and then the SS2 voltage continues beyond VC. The PWMOK comparator contains hysteresis and will pull SS2 low disabling the PWM section if the PFC output voltage falls below approximately 62% of its preset value (240V with nominal 382V output). Output Capacitor (PFC Section) Start-Up and Supply Voltage The peak-to-peak 120Hz PFC output ripple is determined by: The LT1508 draws only 250µA before the chip starts at 16V on VCC. To trickle start, a 91k resistor from the power line to VCC supplies trickle current, and C4 holds VCC up while switching starts (see Figure 8); then the auxiliary winding takes over and supplies the operating current. Note that D3 and the larger values of C3 are only necessary for systems that have sudden large load variations down to minimum load and/or very light load conditions. Under these conditions the loop may exhibit a start/restart mode because switching remains off long enough for C4 to discharge below 10V. Large values for C3 will hold VCC up until switching resumes. For less severe load variations D3 is replaced with a short and C3 is omitted. The turns ratio between the primary winding determines VCC according to : for 382V VOUT and 18V VCC, Np/Ns ≈ 19. R1 91k 1W D1 D3 + D2 + VCC C1 2µF C2 2µF + C3 390µF + C4 100µF 1508 • F08 Figure 8 where ILOAD(DC) is the DC load current of the PWM stage and Z is the capacitor impedance at 120Hz. For 470µF, impedance is 2.8Ω at 120Hz. At 335W load, ILOAD(DC) = 335V/382V = 0.88A, VP-P = (2)(0.88)(2.8Ω) = 5V. If less ripple is desired higher capacitance should be used. The selection of the output capacitor is based on voltage ripple, hold-up time and ripple current. Assuming the DC converter (PWM section) is designed to operate with 240V to 382VIN , the minimum hold-up time is a function of the energy storage capacity of the capacitor: tHOLD = (0.5)COUT (382V – 0.5VP–P)2 – 240V2 POUT I120HZ ≈ ILOAD(DC) √2 MAIN INDUCTOR NP NS VP-P = 2ILOAD(DC)(Z) with COUT = 470µF, VP-P = 11.5V, and POUT = 335W, tHOLD = 60ms which is 3.6 line cycles at 60Hz. The ripple current can be divided into two major components. The first is the 120Hz component which is related to the DC load current as follows: VOUT N = P VCC – 2V NS LINE GTDR2 (PWM) pulse is synchronized to GTDR1 (PFC) pulse with 53% duty cycle delay to reduce RMS ripple current in the output capacitor. See PFC/PWM Synchronization graph in the Typical Performance Characteristics section. The second component is made up of switching frequency components due to the PFC stage charging the capacitor and the PWM stage discharging the capacitor. For a 300W output PFC forward converter running from an input voltage of 100VRMS, the total high frequency ripple current was measured to be 1.79ARMS. For the United Chemicon KMH 450V capacitor series, ripple current at 100kHz is specified 1.43 times higher than the 120Hz limit. 11 LT1508 U W U U APPLICATIONS INFORMATION The total equivalent 120Hz ripple in the output capacitor can be calculated by: IRMS = ( ) 2 2 + IHF I120HZ 1.43 IHF = 100kHz Ripple Current. For ILOAD(DC) = 0.88A, 1120Hz = 0.62A and the equivalent 120Hz ripple current is: IRMS = ( ) 1.79 2 0.622 + = 1.4ARMS 1.43 Table 1 lists the ripple current components from lab measurements for various output powers and line voltages. The 120Hz ripple current rating at 105°C ambient is 1.72A for the 470µF KMH 35mm × 50mm capacitor. The expected life of the output capacitor may be calculated from thermal stress analysis: (105°C + ∆TK) – (TA + ∆TO) 10 L = (LO)2 where L = Expected life time LO = Hours of load life at rated ripple current and rated ambient temperature ∆TK = Capacitor internal temperature rise at rated condition. ∆TK = (I2R)/(KA), where I is the rated current, R is capacitor ESR and KA is a volume constant. TA = Operating ambient temperature ∆TO = Capacitor internal temperature rise at operating condition 12 Table 1. PFC Capacitor RMS Ripple Current 100W 200W 300W VINRMS I120HZ IHF I120HZ IHF I120HZ IHF 100 0.2 0.6 0.41 1.18 0.62 1.79 120 0.2 0.5 0.41 0.97 0.62 1.45 230 0.2 0.53 0.41 0.87 0.62 1.26 In our example, LO = 2000 hours assuming ∆TK = 5°C at rated 1.72A. ∆TO can then be calculated from: ∆TO = ∆TK ( ) ( ) 2 2 IRMS 1.4A = 5°C = 3.3°C 1.72A 1.72A Assuming the operating ambient temperature is 60°C, the approximate lifetime is: L = (2000)(2) (105°C + 5°C) – (60 + 3.3°C) 10 = 50,870 Hours For longer life a capacitor with a higher ripple current rating or parallel capacitors should be used. PWM Comparators The LT1508 includes two comparators in the PWM section which implement voltage mode PWM control. The VC or control voltage pin sets duty factor. An additional current limit comparator turns GTDR2 off in the event the ILIM pin voltage exceeds 1.1V. On-chip blanking avoids reset due to leading edge noise. Typical Application Figure 9 shows a 24VDC, 300W power factor corrected, universal input supply. The 2-transistor forward converter offers many benefits including low peak currents, nondissipative snubber, 500VDC switches and automatic core reset guaranteed by the LT1508’s 50% maximum duty cycle. C22 4.7nF 3 2 1 C9 1µF “X” R26 20k 1% R34 499k 1% R35 499k 1% 382VBUS R2 1M 1/2W R32 499k 1% R33 499k 1% VIN F1 6.3F + C23 47nF ~ – U1 KPBC606 ~ 9 R27 20k 1% 11 14 3 1 VREF RT1 SG57 C21 1nF 15 R16 15k 1% RSET C33 1µF 13 SS2 5 PKLIM LT1508 + 15V + C30 120µF 35V + C26 120µF 35V R39 20k 19 20 R21 2K VREF D10 1N5818 Q1 IRFP450 D4 MURH860CT 4 6 5 C1 1µF 400V 2 1 C14 330µF 450V U4 LT1431 U3 3 CNY17-3 + VOUT 382VBUS Figure 9. 24V, 300W Off-Line PFC Supply C19 10nF 18 VC ILIM GTDR2 C31 1µF 17 VCC C32 1µF R11 20Ω D9 1N5818 C7 2.2µF 50V 6 1 CAOUT GTDR1 C24 1nF + + C6 2.2µF 50V D1 ERA82-004 R14 3.3Ω 15V T1: COILTRONICS CTX02-13141-X2 (407) 241-7876 T2: COILTRONICS CTX02-13063-X3 T3: BI TECHNOLOGY HM41-11510 (714) 447-2345 C20 47nF 16 SS1 C8 330µF 35V R37 4.02k C29 1% 300pF R36 R25 4.02k 20k 1% 8 7 MOUT ISENSE C25 1nF C1: ELECTRONIC CONCEPTS 5MP12J105K L1: COILTRONICS CTX02-13140-X3 R1: JW MILLER/FUKUSHIMA MPC71 RT1: KETEMA SG57 SURGE GARD GND2 GND1 CSET 2 3 4 R24 10k C3 0.1µF R1 0.15Ω 5W D3 ERA82-004 • D2 ERA82-004 • T1 Danger!! Lethal Voltages Present IAC OVP 10 12 VAOUT VREF VSENSE C2 0.47µF R22 330k 4 2 NOTE: UNLESS OTHERWISE SPECIFIED 1. ALL RESISTORS 1/4W, 5% 2. ALL CAPACITANCE VALUES IN MICROFARADS GND LINE LINE E1 90VAC TO 264VAC R3 91k 1W R20 2.2k • • C28 100pF C5 4.7nF “Y” R13 20k R8 10Ω C18 0.068µF R19 0.1µF 1k 33Ω R10 20Ω R9 10Ω C10 1µF 63V T3 R30 3.4k 1% R31 30.1k 1% R41 20k C11 1µF 63V + R4 0.51Ω Q3 IRF840 R40 470Ω D8 MUR160 D5 1N965B 15V D6 1N965B 15V + C12 1000µF 35V R5 0.51Ω D7 MUR160 Q1 IRF840 C13 1000µF 35V C4 4.7nF “Y” • L1 67µF R6 10Ω 2W • T2 U U W VIN APPLICATIONS INFORMATION R7 10Ω 1W C16 1nF E3 COM E2 24V 1508 F09 D11 MUR3020PT U Danger!! Lethal Voltages Present In This Section LT1508 13 LT1508 U W U U APPLICATIONS INFORMATION An LT1431 reference/amplifier coupled to a low cost optoisolator closes the loop from secondary side to primary side. Efficiency versus power and line voltage is shown in Figure 10. The PFC preregulator alone has efficiency numbers between 90% and 97% over line and load. A 3-turn secondary added to the 70-turn primary of T1 bootstraps VCC to about 15V supplying the chip’s 13mA requirement as well as about 39mA to cover the gate current of the three FETs and high side transformer. A 0.15Ω sense resistor is used to sense input current and servo to the command created by the outer voltage and multiplier. Thus the input current follows the input line voltage, and changes as necessary, in order to maintain constant bank voltage. The forward converter sees a voltage input of 382VDC unless the line voltage drops out, in which case the 330µF main capacitor discharges to 240VDC before the PWM stage is shut down. Compared to a typical off-line converter, the effective input voltage range of the forward converter is much smaller, simplifying the design. Additionally, the higher bus voltage provides greater hold-up times for given capacitor size. 90 200W/300W EFFICIENCY (%) 85 100W 80 75 30W 70 90 132 180 250 VRMS 1508 • F1O Figure 10 14 LT1508 U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. N Package 20-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 1.040* (26.416) MAX 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 0.255 ± 0.015* (6.477 ± 0.381) 0.130 ± 0.005 (3.302 ± 0.127) 0.300 – 0.325 (7.620 – 8.255) 0.009 – 0.015 (0.229 – 0.381) +0.025 0.325 –0.015 0.045 – 0.065 (1.143 – 1.651) 0.015 (0.381) MIN 0.065 (1.651) TYP 0.005 (0.127) MIN 0.100 ± 0.010 (2.540 ± 0.254) *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) ( +0.635 8.255 –0.381 ) 0.125 (3.175) MIN Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 0.018 ± 0.003 (0.457 ± 0.076) N20 0695 15 LT1508 U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. SW Package 20-Lead Plastic Small Outline (Wide 0.300) (LTC DWG # 05-08-1620) 0.496 – 0.512* (12.598 – 13.005) 20 19 18 17 16 15 14 13 12 11 0.394 – 0.419 (10.007 – 10.643) NOTE 1 0.291 – 0.299** (7.391 – 7.595) 1 2 3 4 5 6 7 8 9 0.037 – 0.045 (0.940 – 1.143) 0.093 – 0.104 (2.362 – 2.642) 0.010 – 0.029 × 45° (0.254 – 0.737) 10 0° – 8° TYP 0.009 – 0.013 (0.229 – 0.330) NOTE 1 0.016 – 0.050 (0.406 – 1.270) 0.050 (1.270) TYP 0.004 – 0.012 (0.102 – 0.305) 0.014 – 0.019 (0.356 – 0.482) TYP S20 (WIDE) 0396 NOTE: 1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE RELATED PARTS PART NUMBER DESCRIPTION LT1084 5A Low Dropout Linear Regulator Good for Post Regulation of Switching Power Supplies LT1105 Simplified Off-Line Controller Solution for Universal Off-Line Inputs with Output to 100W LT1241-5 High Frequency Current Mode PWM Controller Operates at Oscillator Frequencies up to 500kHz LT1247 High Frequency Current Mode PWM Controller Operates at Oscillator Frequencies up to 1MHz LT1248 Full-Feature Average Current Mode Power Factor Controller Provides All Features in 16-Lead Package LT1249 Minimal Parts Count Power Factor Controller Simplified PFC Design LT1509 Power Factor and PWM Controller Current Mode PWM 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 ● (408) 432-1900 FAX: (408) 434-0507● TELEX: 499-3977 ● www.linear-tech.com COMMENTS 1508f LT/TP 0697 7K • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 1995