ETC MAX5003

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l
电信与数据通 信 电源高压 PWM控 制器
MA× 5003应 用介绍
国营 第 SO72厂
刘鲁 香
南京 邮 电 学 院
李静
摘要 :高 压 PWM控 制器 MA× sO03除 用于电信和 IsDN电 源外 ,还 可用于+42V汽 车系统、土业 电源
和高压电源模块 。文 中介 绍了 MA× sO00的 特 `点 ,重 ・
点介绍 了其应用。
关键词 :电 信/数 据通信 ;电 源控制器 ;MA× 5003
1.序 言
式电源 。
目前 的电信和数据通信系统 的电源总线 电压
是 缌VDc。 在 电话网络中,该 电压 电平当时远距离
”
2。 主要 特 点 和 优 点
环路末端设备供电时,能 充分降低线路电流 ,并 确
MA× sO∞ 单片 IC集 成了 10~sO只 晶体管 ,内
(MA×
1M)公 司生产的高压开
证安全。美国美信
部电路主要由振荡器 、斜坡产生器、电流传感比较
PWM控
关电源
制器 MA× 5003单 片 IC,主 要瞄准
器 、PWM比 较器 、误差放大器和输出驱动器等组
电信 电源和综合业 务数据 网电源而 设计 。除此之
外 ,该 PWNl控 制器还可用于+42V汽 车系统 、高压
成 。其主要特点和优点如附表所列 。
电源模块和工业 电源 。
3.应
MA× 5003是 一种 电压模式控制器 。该类型的
用介绍
:
一
MA× 5o03是 处应用灵活的电压型 PWM控
控制器除具有电流模式控制器 IC优 异的控制环路
带宽、对输入电压变化有相同的周期响应和逐周脉
制器 ,它 可以在回扫式或正向变换器拓扑中在连续
或断续电流模式下工作 。当 MA× sO03应 用于反激
式拓扑结构时,输 出功率限制在 20W以 下 。当其
在正向变换器 中作为 PWM控 制器使用时,输 出功
冲 电流限制等优点外 ,同 时还具有 内在的抗噪扰能
力 ,并 使用铰简单的补偿方案。MA× ~sOO3为 回扫
式和正 向电压型控制变 换器提供全部所需要 的功
艹 能 ,可 用作设计宽范 围输入 电压的隔离式和非隔离
附表 MA× sO∞ 特,点 及优 `点
序号
1
,
・
优
点
点
输 入 电压 范 围 :Ⅱ △ 10V
直接 利 用 高压 操 作
电压模 式控 制 ,电 流 限制
易于补偿 ,优 良的输 入 瞬 态响应和抗 噪扰性 能
3
内置 高压启 动 电路
4
可编 程 开 关 电 流 限制
5
直达 300KIIZ的 可调频 率 ,外 部 频 率 同步化
6
软启 动 时 间和 欠 电压 锁 定 门限可调
7
输入 电压 前馈
8
±2.5%的 精 密 内部基 准 电压
9
囤
特
率范围被限制在 ⒛-sOW。
新式 16引 脚 QsoP或
《中国咆塬博览》2003年 第 7期
在轻载 下保 持 高效 率
选择低 成本 MOSmT,设 计灵 活性 强
提 高设 计灵 活性 ,减 小 EMI,选 择 较 小的
磁 性元 件 ,提 高 系统功 率密度
提 高了系统可靠性和设计灵 活性 ,简 化 总
线分布设计
快速 线路 瞬 态响应
so封 装
提 高电压 精度和稳定性
面积 比 14引 脚
s0封 装 小 绍 %
^
'
弑 求饵 窀鹦
图
图2
1
输 出 5V/1A的 反 激 式非 隔 离变换 器 电路
一鲳 Ⅴ 输 入 和
5W1A输 出的 隔 离式 变换 器 电路
3.1输 出 5W1A的 非 隔离型反激式变换器
MA× 50∞
由 MA× 5003组 成 的一 种非隔离式反激型变换
器 电路 如 图 1所 示 。 该 变 换 器 DC输 入 电压
VIN〓 36~72Ⅴ (含 48Ⅴ
在 内 ),DC输 出电压 V。 叨=5V,・
输 出电流 I。uT〓 1A。
输 入 电压从 r的 1脚 (V+脚 )加 入之后 ,内
部 的耗尽型 ∏Ⅱ 晶体管导通 ,内 部低压差线性稳压
器
LDo1和 LDo2依 次启动 ,为 IC产 生 Vcc电 源
电压 (7.4~12Ⅴ
)。
一 旦 超 过 输 入 电压 欠 电压 锁 定
(UVLo)预 置 门限 ,内 部高压 ∏r晶 体管截止
,
高压被切 断 ,变 压器辅助绕组组成 的电源 电路连接
到 IC的 VDD脚 ,为 IC供 电 。 当 VDD〓 12Ⅴ 时 ,电
的 2脚 连接外部 的电阻分压器 ,其
功能是欠 电压传感和前馈输入 。IC的 3脚 为预调整
器 输 出 ,与 地 (AGND)之 间连接 一 只 0.1uF的 电
容 。 当 VN(36V时
,该 脚应连接到 V十 脚 。IC脚
动 电容 (470nF),6脚 为 3Ⅴ 的参考 电压输 出 ,7脚
为 PWM比 较器控制输 入 ,8脚 为误差放大器输 出
(在 外部连接 RF和 CF补 偿 网络 ),9脚 为反馈输入 。
IC脚 10外 部 电阻 (51KΩ )用 作设定 PWWI增 益
并限制最大 PWbl占 空 比 (%%)。 IC脚 14驱 动 的
,
MOs∏ Ⅱ 源极 电阻 Rcs,为 电流检测元件 ,其 感测
信号从 IC脚 12输 入 。
变压器是关键元件 ,其 设计步骤如下
源 电流仅为 zmA。
4
外部 电阻用作设置 PWM频 率 ,5脚 外部连接软启
:
妒
2003年 第 7期 《中国 爸你博 览》
田
斌 求料 窀
(1)确 定变压器匝数 比,检 验最大 占空因数
〓
559b× (36;冫
亻
2y)
影响变压器初 、次级绕组匝数 比的主要 因数是
开关击 穿 电压和 占空因数 。较小 的匝数 比 ,有 利于
减 小次 级整 流 电压 和 在 回扫 期 间通 过 开关 的最 大
(RMs)
电流 ,从 而影 响系统效率 。对于 鲳 V到 5V的 系统
为保持 回扫 电压在控制之下 ,匝 数 比 (N=NP/Ns)
电压 ,但 会减小 占空 比,增 加初级有效值
可选择
8∶
1。
为避免在连续传 导模式
作 ,PWNl最 大 占空 因数 由公式
,
(CCM)操
(D确 定
-”
:
DCMAx〓
(T::甾
+1
品丁
由于最低输入 电压 VⅧ Ⅱ 36V,N〓 8,次 级 电压
Vs〓 V。 trr+Ⅴ D=5V+0.4V〓 5,4V(VD为 肖特基整流 二
(D可 以得到最大 占空
极管正 向压 降 ),根 据公式
因数 (DCMAx)为 55%。
(2)确 定变压器初级 电感值
假设系统效率 n〓 gO%,欲 产生 5W(5V× 1A)
的输 出所需要 的输入功率 PN=6.笏 W。 设实际操作
占 空 因 数 比 最 大 占 空 因 数 低 12%,即
DC=ss%-12%〓 43%,开 关频率 /sw司 o0KIIz,初 级
电感值可由公式 (2)计 算
:
(2)
LP〓
(0.43×
36y)2
2× 6.75× 300KJfz
〓65/Jff
(3)确 定初 、次级最大 电流和最 小 占空 因数
峰值初级 电流为
:
65/Jff×
峰值次级 电流
比
,
即
300KHz
=0.8A
`°
Is(PK)〓 NIP(PK)〓 0・ 8A× 8〓 6.4A
当 VN(MAx)〓 ” V时 ,满 载 下最 小 占空 因数 为
严
囤
(似
;冫
)
亻
彳
:蕊 幻
《中@咆 你博 览》⒛ 03年 第 7期
V(含 -鲳 V),输 出是
5W1A。 从输 出到初级 侧
的反馈环 路 由电阻分压 器 (两 支 zzI。 9Κ Ω的电阻 )、
作 为误差放大器 使用 的并联稳压器 TI/31和 光耦
合器 MDC217组 成 。MA× 5003的 输入脚 V+连 接
oV的 线路 ,接 地脚 AGND则 连接 -鲳 v的 母线 。
3.350W光 耦 隔离单端 正激式变换器
由 MA× 5003组 成 的光耦 隔离的单端正 激式变
换器 电路如 图 3所 示 。该拓扑结构与反激式拓扑 比
较 ,具 有较高 的输 出功率 电平 ,并 有较小趵 纹波和
较小 的峰值与平 均值 电流之 比。这 种正激式变换器
输入 电压范 围仍为 36~” V,输 出电压
输 出电流 I。 t/r〓 10A,在
V。 uT〓 5V,
vIN〓 48V和 P。 tJr〓
25W下 的
效率 η=ss%,开 关频率 冉w设 置在 犭ClKHz,输 入
与输出之间的隔离电压为 1500V(@← 1s)。
变压器 T1的 ①与②端之间的绕组 (14T)是 初
级绕组 。T1③ 与④端之间的复位绕组 (12T)与 二
极管 D5组 成复位电路 ,其 作用是防止磁芯剩磁累
加导致脉冲变压器饱和而损坏功率开关 Q1。 当系
统启动之后 ,T1⑤ 与⑥端之间的辅助绕组 (4T),
以及二极管 D3、 电容 C8、 齐纳二极管 Z1和 晶体
管 Q2组 成的电源电路 ,为 U1供 电。T1⑤ 、⑥端
之间的偏置绕组工作在反激模式 ,故 可省略一只滤
波电感 。
变 换器输出电压的稳定控制 ,是 通过 RII与
・ R12组 成 的 电 阻 分 压 器 、 高 精 度 稳 压 器 U3
(TL431AID)和 光耦合器 U2(MOC⒛ 7)组 成的
反馈环路实现的。当输出电流从零到 10A变 化时
,
K)为 峰值初级 电流乘 以匝数
洲 =DcM舡 脚
=27.5%
根据 以上确定的参数 ,来 选择变压器磁 芯和 绝
∷
缘铜导线规 格 。
3.2输 出 5W1A的 隔 离型反激式变换 器
与 图 1所 示 的电路相 对应 的隔离型反 激式变换
器 电路如 图 2所 示 。该应用 电路输入 电压从-%V到
:
输出电压调整精度在 ±0.3%之 内。
高频变压器采用 EFD⒛ 型铁氧体磁芯制作
① 、②端之间初级绕组 (N1乇 )电 感值是 犭0uH。
,
次级双 肖特基整流二极管 D4的 额定电流为 20A,
反向击穿电压是 40V。 滤波电感器 L1电 感量为 4.7
u耳 ,能 通过 10A的 电流 。滤波电感容 C7、 c13和
C14选 用 笳0uF/b。 3V的 铝电解电容器 ,C15选 用
卫
日
穸
‘
”
1刀饣
oJo£ vR‘ |se‘饣
Fch
球钾 窀
c殳 Az,l9Jj‘ ˇ
z矽氵
o托
弥补 了砖 块密 封 式模 块 电源 制造 过程 中散 热 降温
要求高 、周期长 、输 出电压不灵活和价格较高等不
MA× ⒛ 19和 MA× 50⒛ 等器件 。其 中
MA× sO14和 MA× sO19可 分别用作组成隔离式和
非 隔离式仅激式变换器 ,最 大 占空 因数 为 85%;
MA× sO15和 MA× ∞ 20可 分别用作设计光耦 隔离
足 ,具 有较高 的性价 比。
式 和 非 隔 离 式 正 激 式 拓 扑 结 构 ,最 大 占空 比 是
MA× 1M公 司生产 的能信 电源 PWNl控 制器
ICs,除 了 MA× sO03之 外 ,还 有 MA× 5014、 MA
50%。
0.1uF的 陶瓷 电容 。
图 3所 示 的 50W电 信/数 据通信服务器 电源
×5015、
,
,
MA× sO14~MA× 5020均 采用 8引 脚 So封
装 ,单 价 “ 美元 (采 购批量 10000只 时售价
0。
)。
I
GGGGG
图3
sOW藕 隔 离正 激 式 变换 器 电路
C7I.C13I亠 C1
19-1555; Rev 2; 4/02
KIT
ATION
EVALU
E
L
B
AVAILA
High-Voltage PWM
Power-Supply Controller
General Description
The MAX5003 offers some distinctive advantages: softstart, undervoltage lockout, external frequency synchronization, and fast input voltage feed-forward. The
device is designed to operate at up to 300kHz switching frequency. This allows use of miniature magnetic
components and low-profile capacitors. Undervoltage
lockout, soft-start, switching frequency, maximum duty
cycle, and overcurrent protection limit are all adjustable
using a minimum number of external components. In
systems with multiple controllers, the MAX5003 can be
externally synchronized to operate from a common system clock.
Warning: The MAX5003 is designed to operate with
high voltages. Exercise caution.
The MAX5003 is available in 16-pin SO and QSOP packages. An evaluation kit (MAX5003EVKIT) is also available.
Applications
Features
♦ Wide Input Range: 11V to 110V
MAX5003
The MAX5003 high-voltage switching power-supply
controller has all the features and building blocks needed for a cost-effective flyback and forward voltagemode control converter. This device can be used to
design both isolated and nonisolated power supplies
with multiple output voltages that operate from a wide
range of voltage sources. It includes a high-voltage
internal start-up circuit that operates from a wide 11V to
110V input range. The MAX5003 drives an external Nchannel power MOSFET and has a current-sense pin
that detects overcurrent conditions and turns off the
power switch when the current-limit threshold is
exceeded. The choice of external power MOSFET and
other external components determines output voltage
and power.
♦ Internal High-Voltage Startup Circuit
♦ Externally Adjustable Settings
Output Switch Current Limit
Oscillator Frequency
Soft-Start
Undervoltage Lockout
Maximum Duty Cycle
♦ Low External Component Count
♦ External Frequency Synchronization
♦ Primary or Secondary Regulation
♦ Input Feed-Forward for Fast Line-Transient
Response
♦ Precision ±2.5% Reference over Rated
Temperature Range
♦ Thermal Shutdown
Ordering Information
PART
TEMP. RANGE
PIN-PACKAGE
MAX5003CEE
0°C to +70°C
16 QSOP
MAX5003CSE
0°C to +70°C
16 Narrow SO
MAX5003C/D
MAX5003EEE
MAX5003ESE
(Note A)
-40°C to +85°C
-40°C to +85°C
Dice
16 QSOP
16 Narrow SO
Note: Dice are designed to operate over a -40°C to +140°C junction temperature (Tj) range, but are tested and guaranteed at
TA = +25°C.
Pin Configuration
Telecommunication Power Supplies
ISDN Power Supplies
+42V Automobile Systems
High-Voltage Power-Supply Modules
Industrial Power Supplies
TOP VIEW
V+ 1
16 VDD
INDIV 2
15 VCC
ES 3
FREQ 4
SS 5
14 NDRV
MAX5003
13 PGND
12 CS
REF 6
11 AGND
CON 7
10 MAXTON
COMP 8
9
FB
QSOP/Narrow SO
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX5003
High-Voltage PWM
Power-Supply Controller
ABSOLUTE MAXIMUM RATINGS
V+ to GND ............................................................-0.3V to +120V
ES to GND ..............................................................-0.3V to +40V
VDD to GND ............................................................-0.3V to +19V
VCC to GND .........................................................-0.3V to +12.5V
MAXTON, COMP, CS, FB, CON to GND..................-0.3V to +8V
NDRV, SS, FREQ to GND ...........................-0.3V to (VCC + 0.3V)
INDIV, REF to GND.................................................-0.3V to +4.5V
VCC, VDD, V+, ES Current ................................................±20mA
NDRV Current, Continuous...............................................±25mA
NDRV Current, ≤ 1µs .............................................................±1A
CON and REF Current ......................................................±20mA
All Other Pins ....................................................................±20mA
Continuous Power Dissipation (TA = +70°C)
16-Pin SO (derate 9.5mW/°C above +70°C)...............762mW
16-Pin QSOP (derate 8.3mW/°C above +70°C)..........667mW
Maximum Junction Temperature (TJ) ..............................+150°C
Operating Temperature Ranges
MAX5003C_E ....................................................0°C to +70°C
MAX5003E_E ..................................................-40°C to +85°C
Operating Junction Temperature (TJ) .............................+125°C
16-Pin SO θJA .................................................................105°C/W
16-Pin QSOP θJA............................................................120°C/W
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V+ = VES = VDD = +12V, VINDIV = 2V, VCON = 0, RFREQ = RMAXTON = 200kΩ, TA = TMIN to TMAX, unless otherwise noted. Typical
values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
35
75
µA
1.2
mA
SUPPLY CURRENT
Shutdown Current
I+
VINDIV = 0, V+ = 110V, VES = VDD =
unconnected
Supply Current
IDD
V+ = VES , VDD = 18.75
V+
ES = VDD = unconnected
PREREGULATOR/STARTUP
V+ Input Voltage (Note 1)
INDRV = 2mA
25
V
INDRV = 5mA
10.8
ES Input Voltage (Note 1)
VESI
VDD = unconnected, V+ = VES, INDRV = 7.5mA
ES Output Voltage
VESO
V+ = 110V, VDD = unconnected
VDD Output Voltage
VDD
V+ = 36V, IDD = 0 to 7.5mA,
ES = unconnected
VDD Input Voltage Range
VDD
V+ = VES = 36V, INDRV = 7.5mA
10.75
VDD Regulator Turn-Off Voltage
VTO
V+ = 36V, IV+ < 75µA,
ES = unconnected
10.75
VCC
V+ = 36V, ES = unconnected,
VDD = 18.75V
9
9.75
110
V
36
V
36
V
10.5
V
18.75
V
V
CHIP SUPPLY (VCC)
VCC Output Voltage
VCC Undervoltage
Lockout Voltage
7.4
12
V
VCC falling
6.3
V
Peak Source Current
VNDRV = 0, VCC supported by VCC capacitor
570
mA
Peak Sink Current
NDRV Resistance High
NDRV Resistance Low
REFERENCE
REF Output Voltage
REF Voltage Regulation
ROH
ROL
VNDRV = VCC
INDRV = 50 mA
INDRV = 50 mA
1000
4
1
12
mA
Ω
Ω
VREF
∆VREF
No load
IREF = 0 to 1mA
3.000
5
3.098
20
V
mV
VCCLO
OUTPUT DRIVER
2
2.905
_______________________________________________________________________________________
High-Voltage PWM
Power-Supply Controller
(V+ = VES = VDD = +12V, VINDIV = 2V, VCON = 0, RFREQ = RMAXTON = 200kΩ, TA = TMIN to TMAX, unless otherwise noted. Typical
values are at TA = +25°C.)
PARAMETERS
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
100
120
mV
+1
µA
CURRENT LIMIT
CS Threshold Voltage
VCS
VCON = 1.25V
80
CS Input Bias Current
ICS
0 < VCS < 0.1V
-1
Overcurrent Delay
tD
From end of blanking time 25mV overdrive
CS Blanking Time
tB
240
ns
70
ns
ERROR AMPLIFIER
Voltage Gain
AV
ICOMP = 5µA; VCOMP = 0.5V, 2.5V
80
dB
Unity-Gain Bandwidth
BW
RLOAD = 200kΩ, CLOAD = 100pF
1.2
MHz
AVOL = 1V/V, CLOAD = 100pF
65
degrees
φ
Phase Margin
60
Output Clamp Low
VCOMPL
At COMP
0.25
V
Output Clamp High
VCOMPH
At COMP
3.00
V
FEEDBACK INPUT AND SET POINT
FB Regulation Voltage
VSET
FB Bias Current
IFB
FB VSET Tempco
TCFB
FB = COMP, VCON = 1.5V
1.448
-1
VFB = 1.5V
1.485
1.522
0.1
+1
100
V
µA
ppm/°C
UNDERVOLTAGE LOCKOUT
INDIV Undervoltage Lockout
INDIV Hysteresis
VINDIVLO
V+ = VES = VDD =
10.8V and 18.75V
VINDIV falling
1.15
1.20
1.25
VINDIV rising
1.23
1.32
1.45
125
VHYST
INDIV Bias Current
VINDIV = 1.28V
-1
0.01
V
mV
+1
µA
0.8
V
1
µA
MAIN OSCILLATOR—EXTERNAL MODE
FREQ Input Low
VIL
VCON = 3.0V
FREQ Input High
VIH
VCON = 3.0V
FREQ Output Low
IOL
VFREQ = 5V, VCON = 3.0V
External Oscillator Maximum
Low Time
tEXT
(Note 2)
FREQ Range
fFREQ
Frequency Range
fS
fS = 1/4 fFREQ
2.7
8
V
13
µs
200
1200
kHz
50
300
kHz
150
FREQ HI/LO Pulse Width
ns
MAIN OSCILLATOR—INTERNAL MODE
FREQ Resistor Range
50
RFREQ
80
Oscillator Frequency
FREQ Output Current High
IOH
VFREQ = 0
FREQ Output Current Low
IOL
VFREQ = 1.5V
100
500
kΩ
120
kHz
300
µA
1
µA
MAXIMUM DUTY CYCLE (MAXTON)
Maximum Programmable
Duty Cycle
VINDIV = 1.25V
75
%
_______________________________________________________________________________________
3
MAX5003
ELECTRICAL CHARACTERISTICS (continued)
ELECTRICAL CHARACTERISTICS (continued)
(V+ = VES = VDD = +12V, VINDIV = 2V, VCON = 0, RFREQ = RMAXTON = 200kΩ, TA = TMIN to TMAX, unless otherwise noted. Typical
values are at TA = +25°C.)
PARAMETERS
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
500
kΩ
PWM OSCILLATOR
MAXTON Resistor Range
RMAXTON
Maximum On-Time Range
tON
50
7.5
RMAXTON = 200kΩ, VINDIV = 1.25V
µs
Input Voltage Feed Forward
Ratio
VINDIV stepped from 1.5V to 1.875V, VCON =
3.0V (Note 3)
0.72
0.8
0.88
RAMP Voltage Low
VINDIV = 1.875V
0.48
0.5
0.53
V
RAMP Voltage High
2.5
V
Minimum On-Time
200
ns
SOFT-START
SS Source Current
VSS = 0.5V, VDD = unconnected, VCON = 1.5V
SS Sink Current
VSS = 0.4V (Note 4)
3.4
5.5
SS Time
9
µA
10
mA
0.45
s/µF
PWM COMPARATOR
CON Bias Current
ICON
-1
VCON = 0.5V and 2.5V
0.01
1
µA
THERMAL SHUTDOWN
Thermal Shutdown Temperature
150
°C
Thermal Hysteresis
20
°C
Note 1:
Note 2:
Note 3:
Note 4:
See the Typical Operating Characteristics for preregulator current-to-voltage characteristics.
Maximum time FREQ can be held below VIL and still remain in external mode.
Feed-forward Ratio = Duty cycle at (VINDIV = 1.5V)/Duty cycle at (VINDIV = 1.875V)
Occurs at start-up and until VREF is valid.
Typical Operating Characteristics
(VDD = +12V, RFREQ = 200kΩ, RMAXTON = 200kΩ, TA = +25°C, unless otherwise noted.)
FB SET-POINT VOLTAGE CHANGE
vs. SUPPLY VOLTAGE
0.2
0
-0.2
-0.4
-0.6
0.050
0.025
0
-0.025
-0.050
-0.075
-20
0
20
40
60
TEMPERATURE (°C)
80
100
0.20
0
-0.20
-0.40
-0.60
-0.80
-1.00
-0.100
0.8
4
0.075
FREQUENCY CHANGE (%)
0.4
0.40
MAX5003-02
0.6
0.100
FB SET-POINT VOLTAGE CHANGE (%)
MAX5003-01
0.8
SWITCHING FREQUENCY CHANGE
vs. TEMPERATURE
MAX5003-03
FB SET-POINT VOLTAGE CHANGE
vs. TEMPERATURE
FB SET-POINT VOLTAGE CHANGE (%)
MAX5003
High-Voltage PWM
Power-Supply Controller
-1.20
11
12
13
14
15
VDD (V)
16
17
18
-40
-20
0
20
40
60
TEMPERATURE (°C)
_______________________________________________________________________________________
80
100
High-Voltage PWM
Power-Supply Controller
V+ INPUT CURRENT vs. TEMPERATURE
2.5
MAXIMUM DUTY CYCLE vs. VINDIV
MAX5003-05
MAX5003-04
2.50
80
400kΩ
70
300kΩ
2.00
MAX5003-06
V+ INPUT CURRENT vs. VOLTAGE
3.0
60
1.50
1.00
VCON = VCOMP = VFB
SWITCHING
60
80
100
-20
0
20
40
60
80
100
V+ (V)
TEMPERATURE (°C)
ERROR AMP FREQUENCY RESPONSE
SWITCHING FREQUENCY AND PERIOD
vs. RFREQ
60
0
400
-20
350
50
-40
40
-60
PHASE
-80
20
-100
40
V+ = 110V
VINDIV = 0
VDD = UNCONNECTED
38
30
20
150
-10
-160
50
-20
-180
0
35
34
32
31
0
0
10M
36
33
10
100
100
200
400
300
30
500
-40
-20
RFREQ (kΩ)
FREQUENCY (Hz)
V+ = 110V
VINDIV = 1.5V
20
40
60
80
100
VCC LOAD REGULATION
10
MAX5003-10
28.0
0
TEMPERATURE (°C)
V+ CURRENT IN BOOTSTRAPPED
OPERATION vs. TEMPERATURE
V+ = 50V TO 110V
9
8
27.5
7
VCC (V)
IV+ (µA)
40
PERIOD
-140
1M
3.0
V+ SHUTDOWN CURRENT
vs. TEMPERATURE
39
200
0
100k
2.5
2.0
37
-120
10k
MAX5003-08
250
10
1k
1.5
VINDIV (V)
300
30
0.1k
1.0
FREQUENCY
FREQUENCY (kHz)
GAIN
PHASE (degrees)
MAX5003-07
70
GAIN (dB)
0
-40
120
IV+ (µA)
40
PARAMETER IS
RMAXTON
VCON CLAMPED HIGH
PERIOD (µs)
20
100kΩ
10
0
0
30
20
VCON = VCOMP = VFB
SWITCHING
V+ = 110V
0.50
0.5
40
MAX5003-09
1.0
200kΩ
50
MAX5003-11
1.5
DUTY CYCLE (%)
IV+ (mA)
IV+ (mA)
2.0
27.0
V+ = 12V
6
V+ = 13V
5
V+ = 14V
4
3
26.5
V+ = 15V
2
ES = UNCONNECTED
VDD = UNCONNECTED
1
0
26.0
-50
0
50
TEMPERATURE (°C)
100
0
5
10
15
20
ICC (mA)
_______________________________________________________________________________________
5
MAX5003
Typical Operating Characteristics (continued)
(VDD = +12V, RFREQ = 200kΩ, RMAXTON = 200kΩ, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VDD = +12V, RFREQ = 200kΩ, RMAXTON = 200kΩ, TA = +25°C, unless otherwise noted.)
350
9
MAX SWITCHING FREQUENCY (kHz)
MAX5003-12
10
8
7
6
5
4
3
2
V+ = VES = 12V TO 36V
VDD = UNCONNECTED
1
0
300
30nC
MAX5003-13
MAXIMUM FREQUENCY vs. INPUT VOLTAGE
AND FET TOTAL GATE-SWITCHING CHARGE
VCC LOAD REGULATION
VCC (V)
MAX5003
High-Voltage PWM
Power-Supply Controller
25nC
250
20nC
200
10nC
150
15nC
100
50
0
0
5
10
15
20
12
13
ICC (mA)
15
14
16
V+ (V)
Pin Description
PIN
NAME
FUNCTION
1
V+
Preregulator Input. Connect to the power line for use with 25V to 110V line voltages. Bypass V+ to ground
with a 0.1µF capacitor, close to the IC. Connects internally to the drain of a depletion FET preregulator.
2
INDIV
Undervoltage Sensing and Feed-Forward Input. Connect to the center point of an external resistive divider
connected between the main power line and AGND. Undervoltage lockout takes over and shuts down
the controller when VINDIV < 1.2V. INDIV bias is typically 0.01µA.
3
ES
4
FREQ
5
SS
6
REF
Reference Voltage Output (3.0V). Bypass to AGND with a 0.1µF capacitor.
7
CON
Control Input of the PWM Comparator
8
COMP
9
FB
10
6
MAXTON
Preregulator Output. When V+ ranges above 36V, bypass ES to AGND with a 0.1µF capacitor close to
the IC. When V+ is always below 36V, connect ES to V+.
Oscillator Frequency Adjust and Synchronization Input. In internal free-running mode, the voltage on this
pin is internally regulated to 1.25V. Connect a resistor between this pin and AGND to set the PWM frequency. Drive between VIL and VIH at four times the desired frequency for external synchronization.
Soft-Start Capacitor Connection. Ramp time to full current limit is approximately 0.5ms/nF. Limits duty
cycle when VSS < VCON.
Compensation Connection. Output of the error amplifier, available for compensation.
Feedback Input. Regulates to VFB = VREF / 2 = 1.5V.
Maximum On-Time Programming. A resistor from MAXTON to AGND sets the PWM gain and limits the
maximum duty cycle. The voltage on MAXTON tracks the voltage on the INDIV pin. Maximum on-time is
proportional to the value of the programming resistor. The maximum duty cycle is limited to 75%, regardless of the programming resistor.
_______________________________________________________________________________________
High-Voltage PWM
Power-Supply Controller
PIN
NAME
FUNCTION
11
AGND
12
CS
13
PGND
Power Ground. Connect to AGND.
14
NDRV
Gate Drive for External N-Channel Power FET
15
VCC
Output Driver Power-Rail Decoupling Point. Connect a capacitor to PGND with half the value used for
VDD bypass very close to the pin. If synchronizing several controllers, power the fan-out buffer driving the
FREQ pins from this pin.
16
VDD
9.75V Internal Linear-Regulator Output. Drive VDD to a voltage higher than 10.75V to bootstrap the chip
supply. VDD is also the supply voltage rail for the chip. Bypass to AGND with a 5µF to 10µF capacitor.
Analog Ground. Connect to PGND close to the IC.
Current Sense with Blanking. Turns power switch off if VCS rises above 100mV (referenced to PGND).
Connect a 100Ω resistor between CS and the current-sense resistor (Figure 2). Connect CS to PGND if
not used.
Detailed Description
The MAX5003 is a PWM controller designed for use as
the control and regulation core of voltage-mode control
flyback converters or forward-voltage power converters. It provides the power-supply designer with maximum flexibility and ease of use. The device is specified
up to 110V and will operate from as low as 11V. Its
maximum operating frequency of 300kHz permits the
use of miniature magnetic components to minimize
board space. The range, polarity, and range of output
voltages and power are limited only by design and by
the external components used.
This device works in isolated and nonisolated configurations, and in applications with single or multiple output voltages. All the building blocks of a PWM
voltage-mode controller are present in the MAX5003
and its settings are adjustable. The functional diagram
is shown on Figure 1.
Modern Voltage-Mode Controllers
The MAX5003 offers a voltage-mode control topology
and adds features such as fast input voltage feed forward, programmable maximum duty cycle, and high
operating frequencies. It has all the advantages of current-mode control—good control loop bandwidth,
same-cycle response to input voltage changes, and
pulse-by-pulse current limiting. It eliminates disadvantages such as the need for ramp compensation, noise
sensitivity, and the analytical and design difficulties of
dealing with two nested feedback loops. In summary,
voltage-mode control has inherent superior noise
immunity and uses simpler compensation schemes.
Internal Power Regulators
The MAX5003’s power stages operate over a wide
range of supply voltages while maintaining low power
consumption. For the high end of the range (+36V to
+110V), power is fed to the V+ pin into a depletion
junction FET preregulator. This input must be decoupled with a 0.1µF capacitor to the power ground pin
(PGND). To decouple the power line, other large-value
capacitors must be placed next to the power transformer connection.
The preregulator drops the input voltage to a level low
enough to feed a first low-dropout regulator (LDO)
(Figure 1). The input to the LDO is brought out at the ES
pin. ES must also be decoupled with a 0.1µF capacitor.
In applications where the maximum input voltage is
below 36V, connect ES and V+ together and decouple
with a 0.1µF capacitor.
The first LDO generates the power for the VDD line. The
VDD line is available at the VDD pin for decoupling. The
bypass to AGND must be a 5µF to 10µF capacitor.
When the maximum input voltage is always below
18.75V, power may also be supplied at VDD; in this
case, connect V+, ES, and VDD together.
Forcing voltages at VDD above 10.75V (see Electrical
Characteristics) disables the first LDO, typically reducing current consumption below 50µA (see Typical
Operating Characteristics).
Following the VDD LDO is another regulator that drives
VCC: the power bus for the internal logic, analog circuitry, and external power MOSFET driver. This regulator is needed because the VDD voltage level would be
too high for the external N-channel MOSFET gate. The
_______________________________________________________________________________________
7
MAX5003
Pin Description (continued)
MAX5003
High-Voltage PWM
Power-Supply Controller
VFETBIAS
V+
MAX5003
HIGH-VOLTAGE EPIFET
1
LINEAR
VES REGULATOR VDD
16
VDD
15
VCC
14
NDRV
13
PGND
12
CS
11
AGND
10
MAXTON
AGND
VDD
CC
AGND
INDIV
2
1.2V
ES
LINEAR VDD
REGULATOR
VCC
VINOK
VCCOK
AGND
VINOK
UV LOCKOUT
VCC
REF
REFOK BANDGAP
REFERENCE
SDN
AGND
3
“1”
VCC
FREQ
4
D “D”FF
CLK
Q
CLK
FREQ
DRIVER
NDRV
R
REFOK
PGND
SDN
INDIV
SS
5
VCC
RAMP
CURRENT
SENSE
MAXTON
VCC
AGND
C
LIMIT
REF
0.1V
PGND
6
CS BLANK
VCC
100ns
STRETCHING
VCC
RAMP
PGND
SS
CON
7
VCON
PWM COMP
AGND
VCC
VREF
SDN
R
COMP 8
9
R
ERROR AMP
AGND
Figure 1. Functional Diagram
8
_______________________________________________________________________________________
FB
High-Voltage PWM
Power-Supply Controller
Undervoltage Lockout, Feed Forward,
and Shutdown
The undervoltage lockout feature disables the controller
when the voltage at INDIV is below 1.2V (120mV hysteresis). When INDIV rises higher than 1.2V plus the
hysteresis (typically 1.32V), it allows the controller to
start. An external resistive divider connected between
the power line and AGND generates the INDIV signal.
INDIV is also used as the signal for the fast input voltage feed-forward circuit.
Always connect INDIV to a voltage divider. It is not a
“don’t care” condition; the signal is used to set the fast
feed-forward circuit (see the Oscillator and Ramp
Generator section).
Choose R2 (Figure 2) between 25kΩ to 500kΩ and calculate R1 to satisfy the following equation:
 V

SUL
R1 = R2 
- 1
 VINDIVLO

where V SUL = system undervoltage lockout and
VINDIVLO = INDIV undervoltage lockout.
The undervoltage lockout function allows the use of the
INDIV pin as a shutdown pin with an external switch to
ground. The shutdown circuit must not affect the resistive divider during normal operation.
Current-Sense Comparator
The current-sense (CS) comparator and its associated
logic limit the current through the power switch. Current
is sensed at CS as a voltage across a sense resistor
between the external MOSFET source and PGND.
Connect CS to the external MOSFET source through a
100Ω resistor or RC lowpass filter (Figures 2 and 3).
See CS Resistor in the Component Selection section.
A blanking circuit shunts CS to ground when the power
MOSFET switch is turned off, and keeps it there for
70ns after turn-on. This avoids false trips caused by the
switching transients. The blanking circuit also resets
the RC filter, if used. When VCS > 100mV, the power
MOSFET is switched off. The propagation delay from
the time the switch current reaches the trip level to the
driver turn-off time is 240ns. If the current limit is not
used, the CS pin must be connected to PGND.
Error Amplifier
The internal error amplifier is one of the building blocks
that gives the MAX5003 its flexibility. Its noninverting
input is biased at 1.5V, derived from the internal 3V reference. The inverting input is brought outside (FB pin)
and is the regulation feedback connection point. If the
error amplifier is not used, connect this pin to ground.
The output is available for the frequency compensation
network and for connection to the input of the PWM
comparator (CON). Unity-gain frequency is 1.2MHz,
open-circuit gain is 80dB, and the amplifier is unitygain stable. To eliminate long overload recovery times,
there are clamps limiting the output excursions close to
the range limits of the PWM ramp. The voltage at the
noninverting input of the error amplifier is the regulator
set point, but is not accessible.
Set-point voltage can be measured, if needed, by connecting COMP and FB and measuring that node with
respect to ground. The error amplifier is powered from
the VCC rail.
PWM Comparator
The pulse-width modulator (PWM) comparator stage
transforms the error signal into a duty cycle by comparing
the error signal with a linear ramp. The ramp levels are
0.5V min and 2.5V max. The comparator has a typical
hysteresis of 5.6mV and a propagation delay of 100ns.
The output of the comparator controls the external FET.
Soft-Start
The soft-start feature allows converters built using the
MAX5003 to apply power to the load in a controllable
soft ramp, thus reducing start-up surges and stresses.
_______________________________________________________________________________________
9
MAX5003
VCC regulator has a lockout line that shorts the N-channel MOSFET driver output to ground if the VCC LDO is
not regulating. VCC feeds all circuits except the VCC
lockout logic, the undervoltage lockout, and the power
regulators.
The preferred method for powering the MAX5003 is to
start with the high-voltage power source (at V+ or ES,
depending on the application), then use a bootstrap
source from the same converter with an output voltage
higher than the VDD regulator turn-off voltage (10.75V)
to power VDD. This will disable the power consumption
of the V DD LDO. It is also possible to power the
MAX5003 with no bootstrap source from ES or V+, but
do not exceed the maximum allowable power dissipation. The current consumption of the part is mostly a
function of the operating frequency and the type of
external power switch used—in particular, the total
charge to be supplied to the gate.
A reference output of 3V nominal is externally available
at the REF pin, with a current sourcing capability of
1mA. A lockout circuit shuts off the oscillator and the
output driver if REF falls 200mV below its set value.
Minimize loading at REF, since the REF voltage is the
source for the FB voltage, which is the regulator set
point when the error amplifier is used. Any changes in
VREF will be proportionally reflected in the regulated
output voltage of the converter.
MAX5003
High-Voltage PWM
Power-Supply Controller
It also determines power-up sequencing when several
converters are used.
Upon power turn-on, the SS pin acts as a current sink
to reset any capacitance attached to it. Once REF has
exceeded its lockout value, SS sources a current to the
external capacitor, allowing the converter output voltage to ramp up. Full output voltage is reached in
approximately 0.45s/µF.
The SS pin is an overriding extra input to the PWM
comparator. As long as its voltage is lower than VCON,
it overrides VCON and SS determines the level at which
the duty cycle is decided by the PWM comparator.
After exceeding VCON, SS no longer controls the duty
cycle. Its voltage will keep rising up to VCC.
Oscillator and Ramp Generator
The MAX5003 oscillator generates the ramp used by
the comparator, which in turn generates the PWM digital signal. It also controls the maximum on-time feature
of the controller. The oscillator can operate in two
modes: free running and synchronized (sync). A single
pin, FREQ, doubles as the attachment point for the frequency programming resistor and as the synchronization input. The mode recognition is automatic, based on
the voltage level at the FREQ pin.
In free-running mode, a 1.25V source is internally
applied to the pin; the oscillator frequency is proportional to the current out of the pin through the programming resistor, with a proportionality constant of
16kHz/µA.
In sync mode, the signal from the external master generator must be a digital rectangular waveform running
at four times the desired converter switching frequency.
Minimum acceptable signal pulse width is 150ns, positive or negative, and the maximum frequency is
1.2MHz.
When the voltage at FREQ is forced above 2.7V, the
oscillator goes into sync mode. If left at or below 1.5V for
more than 8µs to 20µs, it enters free-running mode.
The master clock generator cannot be allowed to stop
at logic zero. If the system design forces such a situation, an inverter must be used at the FREQ pin.
In sync mode, the oscillator signal is divided by four and
decoded. The output driver is blocked during the last
phase of the division cycle, giving a hardwired maximum
on-time of 75%. In free-running mode, the oscillator duty
cycle is 75% on, and the off portion also blocks the output driver. The maximum on-time is then absolutely limited to 75% in either mode. Maximum on-time can be
controlled to values lower than 75% by a programming
resistor at the MAXTON pin.
10
The PWM ramp generated goes from 0.5V min to 2.5V
max, and the maximum time on is the time it takes from
low to high.
MAXTON is internally driven to VINDIV and a resistor
must be connected from MAXTON to AGND, to program the maximum on-time.
The ramp slope is directly proportional to VINDIV and
inversely proportional to RMAXTON. Since the ramp voltage limits are fixed, controlling the ramp slope sets the
maximum time on.
Changing the ramp slope while VCON remains constant
also changes the duty cycle and the energy transferred to
the load per cycle of the converter. The INDIV signal is a
fraction of the input voltage, so the fast input voltage feedforward works by modifying the duty cycle in the same
clock period, in response to an input voltage change.
Calculate the maximum duty cycle as:
DMAX =
MAXTON
T
× 100
where:
DMAX = Maximum duty cycle (%)
MAXTON = Maximum on-time
T = Switching period
Then:
R
  1.25V   ƒ

SW
DMAX = 0.75 × 100  MAXTON  
 

 200kΩ   VINDIV   100kHz 
where:
RMAXTON = Resistor from the MAXTON pin to ground
VINDIV = Voltage at the INDIV pin
ƒSW = Output switching frequency
MAXTON can then be calculated as:
MAXTON =
0.75 × RMAXTON × 1.25V
200kΩ × VINDIV × 100kHz
N-Channel MOSFET
Output Switch Driver
The MAX5003 output drives an N-channel MOSFET
transistor. The output sources and sinks relatively large
currents, supplying the gate with the charge the transistor needs to switch. These are current spikes only,
since after the switching transient is completed the load
is a high-value resistance. The current is supplied from
the V CC rail and must be sourced by a large-value
______________________________________________________________________________________
High-Voltage PWM
Power-Supply Controller
The driver can source up to 560mA and sink up to 1A
transient current with a typical on source resistance of
4Ω. The no-load output levels are VCC and PGND.
Applications Information
Compensation and Loop
Design Considerations
The circuit shown in Figure 2 is essentially an energy
pump. It stores energy in the magnetic core and the air
gap of the transformer while the power switch is on,
and delivers it to the load during the off phase. It can
operate in two modes: continuous and discontinuous.
In discontinuous mode, all the energy is given to the
load before the next cycle begins; in continuous mode,
some energy is continuously stored in the core.
The system has four operating parameters: input voltage, output voltage, load current, and duty cycle. The
PWM controller senses the output voltage and the input
voltage, and keeps the output voltage regulated by
controlling the duty cycle.
The output filter in this circuit consists of the load resistance and the capacitance on the output.
To study the stability of the feedback system and
design the compensation necessary for system stability
under all operating conditions, first determine the transfer function. In discontinuous mode, since there is no
energy stored in the inductor at the end of the cycle,
the inductor and capacitor do not show the characteristic double pole, and there is only a dominant pole
defined by the filter capacitor and the load resistance.
There is a zero at a higher frequency, defined by the
ESR of the output filter capacitor. Such a response is
easy to stabilize for a wide range of operating conditions while retaining a reasonably fast loop response.
In continuous mode, the situation is different. The
inductor-capacitor combination creates a double pole,
since energy is stored in the inductor at all times. In
addition to the double pole, a right-half-plane zero
appears in the frequency response curves. This
response is not easy to compensate. It can result in
conditional stability, a complicated compensation network, or very slow transient response.
To avoid the analytical and design problems of the continuous-conduction mode flyback topology and maintain
good loop response, choose a design incorporating a
discontinuous-conduction mode power stage
To keep the converter in discontinuous mode at all times,
the value of the power transformer’s primary inductance
must be calculated at minimum line voltage and maximum load, and the maximum duty cycle must be limited.
The MAX5003 has a programmable duty-cycle limit function intended for this purpose.
Design Methodology
Following is a general procedure for developing a system:
1) Determine the requirements.
2) In free-running mode, choose the FREQ pin programming resistor. In synchronized mode, determine
the clock frequency (fCLK).
3) Determine the transformer turns ratio, and check the
maximum duty cycle.
4) Determine the transformer primary inductance.
5) Complete the transformer specifications by listing
the primary maximum current, the secondary maximum current, and the minimum duty cycle at full
power.
6) Choose the MAXTON pin programming resistor.
7) Choose a filter capacitor.
8) Determine the compensation network.
Design Example
1) 36V < V IN < 72V, V OUT = 5V, I OUT = 1A, ripple
< 50mV, settling time ≈ 0.5ms.
2) Generally, the higher the frequency, the smaller the
transformer. A higher frequency also gives higher
system bandwidth and faster settling time. The
trade-off is lower efficiency. In this example, 300kHz
switching frequency is the choice to favor for a small
transformer. If the converter will be free running (not
externally synchronized), use the following formula to
calculate the RFREQ programming resistor:
 100kHz 
RFREQ = 
 200k = 66.7kΩ
 ƒ SW 
where:
RFREQ = Resistor between FREQ and ground
ƒSW = Switching frequency (300kHz)
If the converter is synchronized to an external clock,
the input frequency will be 1.2MHz. The external
clock runs at four times the desired switching frequency.
______________________________________________________________________________________
11
MAX5003
capacitor (5µF to 10µF) at the VCC pin, since the rail will
not support such a load. It is this current, equivalent to
the product of the total gate switching charge (from the
N-channel MOSFET data sheet), times the operating
frequency, that determines the bulk of the MAX5003
power dissipation.
MAX5003
High-Voltage PWM
Power-Supply Controller
+48V
(36V TO 72V)
XFACOILTRCTX03
VIN
8
2
CMSD4448
LP
65µH
1M
1
2
3
4
5
0.1µF
6
7
8
39k
V+
VDD
INDIV
ES
FREQ
7
15
IRFD620S
VCC
14
NDRV
CS
REF
AGND
CON
MAXTON
FB
11, 12
+5V
1A
MBRS130L
10µF
PGND
COMP
5
16
MAX5003
SS
4.7µF
0.1µF
33µF
13
12
22µF
11
22µF
100Ω
10
RA
41.2k
9, 10
9
62k
51k
0.1µF
470nF
0.1µF
CF
390pF
RCS
0.1Ω
RF
200k
RB
17.4k
0V
Figure 2. Application Example 1: Nonisolated +48V to +5V Converter
3) The main factors influencing the choice of the turns
ratio are the switch breakdown voltage and the duty
cycle. With a smaller turns ratio, the secondary
reflected voltage and the maximum voltage seen by
the switch during flyback are reduced, which is
favorable. On the other hand, a smaller turns ratio
will shorten the duty cycle and increase the primary
RMS current, which can impact efficiency. A good
starting figure is the ratio of the input voltage to the
output voltage, rounding to the nearest integer. To
keep the flyback voltage under control, choose an 8to-1 ratio for the 48V to 5V system. The maximum
duty cycle allowed without putting the device in continuous-conduction mode can be found using the following formula:
1
DCMAX =

 V
MIN

 +1
 VSEC × N 
where:
N = NP/NS = Turns ratio
VSEC = Secondary voltage
VMIN = Minimum power-line voltage
For a 48V to 5V system with an 8-to-1 turns ratio, the
maximum duty cycle before putting the device in
discontinuous mode is 55%. Assume that VIN min is
36V (minimum input voltage, neglecting drops in the
power switch and in the resistance of the primary
coil) and VSEC is 5.4V (5V plus a Schottky diode
drop). The MAX5003 maximum duty cycle is internally limited to 75%. Generally this parameter must fall
between 45% to 65% to obtain a balance between
efficiency and flyback voltage while staying out of
continuous conduction. If the value exceeds these
bounds, adjust the turns ratio.
4) Assuming 80% efficiency, a 6.25W input is needed
to produce a 5W output. Set an operating duty cycle
around 12% below the maximum duty cycle to allow
for component variation: 55% - 12% = 43%. Use the
following formula to calculate the primary inductance:
LPRI =
(DC × VMIN )
2
2 × PWRIN × ƒ SW
=
(0.43 × 36V)
2 × 6.25W × 300kHz
DCMAX = Maximum duty cycle
12
2
______________________________________________________________________________________
≅ 65µH
High-Voltage PWM
Power-Supply Controller
MAX5003
0V
XFACOILTRCTX03
CMSD4448
2
LP
65µH
8
IRFD620S
R1
1M
4.7µF
7
1
2
3
0.1µF
4
5
6
7
8
R2
39k
VDD
V+
5
15
VCC
14
NDRV
INDIV
ES
FREQ
16
PGND
SS
CS
REF
AGND
CON
MAXTON
COMP
FB
+5V
1A
11, 12
10µF
MAX5003
MBRS130L
33µF
0.1µF
13
12
22µF
11
100Ω
51Ω
22µF
9, 10
-
10
9
680Ω
62k
6
240k
7
0.01µF
1
1.3k
5
MDC217
470nF
0.1µF
2
0.1µF
3900pF
24.9k
51k
VIN
RCS
0.1Ω
TL431
24.9k
-48V
-36V TO -72V
Figure 3. Application Example 2: Isolated -48V to +5V Converter
where:
DC = Duty cycle. Set to calculated minimum duty
cycle at VMIN.
PWRIN = Input power, at maximum output power
This gives an inductance value (LPRI) of approximately 65µH.
5) The other parameter that defines the transformer is
peak current. This is given by:
IPRI =
2 × PWRIN
LPRI
×
ƒ SW
=
× 6.25W
65µH × 300kHz
2
= 0.8A
The peak secondary current is the peak primary current multiplied by the turns ratio, or 0.8A · 8 = 6.4A.
Calculating the minimum duty cycle:
DC(MIN) = DC(MAX) ×
VIN(MIN)
VIN(MAX)
= 43% ×
36V
72V
=
With these numbers, the transformer manufacturer
can choose a core.
6) For this application, the MAX5003 must be programmed for a maximum duty cycle of 55% at 36V.
The MAX5003 will automatically scale the limit with
the reciprocal of the input voltage as it changes. The
duty-cycle limit for an input voltage of 72V will be
27% (half of 55%). The duty cycle needed to stay out
of continuous conduction at 72V is 37%, so there is a
10% margin. The maximum duty time scales with the
voltage at the undervoltage lockout pin, VINDIV. The
voltage at INDIV is set by selecting the power line
undervoltage lockout trip point. The trip point for this
system, running from 36V to 72V, is 32V. Then INDIV
must be connected to the center point of a divider
with a ratio of 32/1.25, connected between the
power line and ground. Then RMAXTON is:
V
  100kHz   DCMAX (VMIN ) 
RMAXTON =  MIN  
 200kΩ
 
75%
 VUVL   ƒ SW  

 36V   100kHz   55% 
=
 
 
 200kΩ = 55kΩ
 32V   300kHz   75% 
______________________________________________________________________________________
13
High-Voltage PWM
Power-Supply Controller
MAX5003
where:
RMAXTON = Resistor between the MAXTON pin and
ground
VMIN = Minimum power-line voltage
VUVL = Power-line trip voltage
DCMAX(VMIN) = Maximum duty cycle at minimum
power-line voltage
For this application circuit, a 10% margin is reasonable, so the value used is 50kΩ. This gives a maximum duty cycle of 50%. The maximum duty cycle
can now be expressed as:
V
- 0.5V 
DC(VCON,VIN ) =  CON

2.0V


V
- 0.5V 
CON
≈

2.0V


V
  ƒ

SW
MIN

 
 × DCMAX(VMIN)
V
ƒ
 IN   NOM 
 36V   ƒ

SW
 50%

 
 VIN   ƒ NOM 
where:
VCON = Voltage at the CON pin, input of the PWM
comparator
DC(VCON, VIN) = Duty cycle, function of VCON and
VIN
0.5V and 2.5V are the values at the beginning and
end of the PWM ramp.
The term ƒSW / ƒNOM varies from 0.8 to 1.2 to allow
for clock frequency variation. If the clock is running
at 300kHz and the input voltage is fixed, then the
duty cycle is a scaled portion of the maximum duty
cycle, determined by VCON.
V
- 0.5V 
DC(VCON,VMIN ) =  CON
 50%
2.0V


V
- 0.5V 
DC(VCON,VMAX ) =  CON
 25%
2.0V


DC(2.5V,VMIN ) = 50%
DC(2.5V,VMAX ) = 25%
DC(0.5V,VMIN ) = 0
DC(0.5V,VMAX ) = 0
7) Low-ESR/ESL ceramic capacitors were used in this
application. The output filter is made by two 22µF
ceramic capacitors in parallel. Normally, the ESR of
a capacitor is a dominant factor determining the ripple, but in this case it is the capacitor value.
Calculating
IOUT
ƒ SW × C
14
=
1A
300kHz × 44 µF
= 76mV
the ripple will be a fraction of this depending on the
duty cycle. For a 50% duty cycle, the ripple due to
the capacitance is approximately 45mV.
8)The PWM gain can be calculated from:
APWM =
dVOUT
dVCON
=
=
V

MIN DC


MAX(VMI
2 × LPRI × ƒ SW  2.0V 
RL
 36V 

 50% ≅ 3
2 × LPRI × ƒ SW  2.0V 
RL
Note that while the above formula incorporates the
product of the maximum duty cycle and VIN, it is
independent of VIN. For 1A output (RL = 5Ω), the
PWM gain is +3.0V/V. For a 10% load (RL = 50Ω),
the gain is multiplied by the square root of 10 and
becomes +10V/V. The pole of the system due to the
output filter is 1 / 2πRC, where R is the load resistance and C the filter capacitor. Choosing a capacitor and calculating the pole frequency by:




1
1
ƒP = 
 = 

 2π × 5Ω × 44 µF 
 2π × R L × C L 
it is 723Hz at full load. At 10% load it will be 72Hz,
since the load resistor is then 50Ω instead of 5Ω. The
total loop gain is equal to the PWM gain times the
gain in the combination of the voltage divider and
the error amplifier. The worst case for phase margin
is at full load. For a phase margin of 60 degrees, this
midband gain (G) must be set to be less than:
G <
ƒ UErrorAmp
tan(PM) × APWM × ƒ P
=
1 MHz
1.7 × 3 × 723Hz
where:
ƒU = Unity-gain frequency of error amplifier
PM = Phase margin angle
The DC accuracy of the regulator is a function of the
DC gain. For 1% accuracy, a DC gain of 20 is required.
Since the maximum midband gain for a stable
response is 16, an integrator with a flat midband gain
given by a zero is used. The midband gain is less than
16, to preserve stability, and the DC gain is much larger
than 20, to achieve high DC accuracy.
Optimization on the bench showed that a midband gain
of 5 gave fast transient response and settling with no
ringing. The zero was pushed as high in frequency as
possible without losing stability. The zero must be a
factor of two or so below the system unity-gain frequency (crossover frequency) at minimum load. With the
______________________________________________________________________________________
High-Voltage PWM
Power-Supply Controller
desired value, the center-point voltage will be 1.5V. The
Thevenin equivalent of the resistors must be low
enough so the error amplifier bias current will not introduce a division error. The two resistors must have similar temperature coefficients (tempcos), so the dividing
ratio will be constant with temperature.
RB / (RA + RB) = VSET / VOUT
CS Resistor
The CS resistor is connected in series with the source
of the N-channel MOSFET and ground, sensing the
switch current. Its value can be calculated from the following equation:
Since VSET = 1.5V and VOUT = 5V, RA is set to 41.2kΩ
and RB to 17.4kΩ.
The midband gain is the ratio of RF/RA. RB does not
affect the gain because it is connected to a virtual
ground. For a midband gain of 5, the feedback resistor
equals 200kΩ. To set the zero at 2kHz, the capacitor
value is:
CF = 1 / (2π x RF x fz ) = 400pF
Layout Recommendations
All connections carrying pulsed currents must be very
short, be as wide as possible, and have a ground plane
behind them whenever possible. The inductance of
these connections must be kept to an absolute minimum due to the high di/dt of the currents in highfrequency switching power converters. In the development or prototyping process, multipurpose boards, wire
wrap, and similar constructive practices are not suitable for these type of circuits; attempts to use them will
fail. Instead, use milled PC boards with a ground plane,
or equivalent techniques
Current loops must be analyzed in any layout proposed, and the internal area kept to a minimum to
reduce radiated EMI. The use of automatic routers is
discouraged for PC board layout generation in the
board area where the high-frequency switching converters are located. Designers should carefully review
the layout. In particular, pay attention to the ground
connections. Ground planes must be kept as intact as
possible. The ground for the power-line filter capacitor
and the ground return of the power switch or currentsensing resistor must be close. All ground connections
must resemble a star system as much as practical.
“Short” and “close” are dimensions on the order of
0.25in to 0.5in (0.5cm to about 1cm).
Setting the Output Voltage
The output voltage of the converter, if using the internal
error amplifier, can easily be set by the value of the FB
pin set voltage. This value is 1.5V. A resistive divider
must be calculated from the output line to ground, with
a dividing ratio such that when the output is at the
Component Selection
RCS =
100mV
ILIM (PRI)
=
100mV
2 PWROUT(MAX)
× K TOL
LPRI × ƒ SW × η
where η = efficiency and 0.5 < KTOL < 0.75.
KTOL includes the tolerance of the sensing resistor, the
dispersion of the MAX5003 CS trip point, and the
uncertainties in the calculation of the primary maximum
current.
The sensing resistor must be of the adequate power
dissipation and low tempco. It must also be noninductive and physically short. Use standard surface-mount
CS resistors. A 100Ω resistor is recommended between
the CS resistor and the CS pin. If the current surge at
the beginning of the conduction period is large and disrupts the MAX5003’s operation, add a capacitor
between the CS pin and PGND, to form an RC filter.
Power Switch
The MAX5003 will typically drive an N-channel MOSFET
power switch. The maximum drain voltage, maximum
RDS(ON), and total gate switching charge are the parameters involved in choosing the FET. The maximum
gate switching charge is the most important factor
defining the MAX5003 internal power consumption,
since the product of the switching frequency and the
total gate charge is the IC current consumption.
RDS(ON) is the parameter that determines the total conduction power losses in the switch, and the choice
depends on the expected efficiency and the cooling
and mounting method. The maximum drain voltage
requirements can be different depending on the topology used. In the flyback configuration, the maximum
voltage is the maximum supply voltage plus the reflected secondary voltage, any ringing at the end of the
conduction period, and the spike caused by the leakage inductance. In the case of the forward converter,
the reset time of the core will set the maximum voltage
______________________________________________________________________________________
15
MAX5003
zero at 2kHz, the crossover frequency is 4kHz and the
phase margin is 50°.
Given the above considerations, RA, RB , RF, and CF
can be chosen (Figure 2). The sum of RA and RB is
chosen for low current drain. In the example, RA plus
RB is 58kΩ and draws 80µA. The following ratio sets
the output voltage:
MAX5003
High-Voltage PWM
Power-Supply Controller
stress on the switch. A FET with the lowest total charge
and the lowest RDS(ON) for the maximum drain voltage
expected (plus some safety factor) is the best choice.
The choice of package is a function of the application,
the total power, and the cooling methods available.
Transformer
Transformer parameters, once calculated in the design
process, can be used to find standard parts whenever
possible. The most important factors are the saturation
current, primary inductance, leakage inductance turns
ratio, and losses. Packaging and EMI generation and
susceptibility are closely connected, and must be considered. In general, parts with exposed air gaps (not
contained inside the magnetic structure) will generate
the most radiated EMI, and might need external shielding. If the design is in high-voltage power supplies, the
insulation specifications are also important. Pay close
attention if the circuitry is galvanically connected to the
mains at any point, since serious safety and regulatory
issues might exist.
Capacitors
As in any high-frequency power circuit, the capacitors
used for filtering must meet very low ESR and ESL
requirements. At the 300kHz frequency (of which the
MAX5003 is capable), the most favorable technologies
are ceramic capacitors and organic semiconductor (OS
CON) capacitors. The temperature dependence of the
capacitance value and the ESR specification is important,
particularly if the ESR is used as part of the compensation
network for the feedback loop. If using through-hole-
mounted parts, keep lead length as short as practical.
Components with specifications for switching power converters are preferred. Decoupling capacitors must be
mounted close to the IC.
Diodes
The choice of rectifier diodes depends on the output
voltage range of the particular application. For low-voltage converters, the diode drop is a significant portion
of the total loss, and must be kept to a minimum. In
those cases, Schottky diodes are the preferred component for the design. At higher voltages, ultra-fast recovery diodes must be used, since Schottky components
will not satisfy the reverse voltage specification.
For all cases, the specifications to be determined
before choosing a diode are the peak current, the average current, the maximum reverse voltage, and the
maximum acceptable rectification losses. Once a type
is identified, a thermal analysis of the diode losses vs.
total thermal resistance (from junction to ambient) must
be carried out if the total power involved is significant.
Industrial-frequency (60Hz) rectifiers are not recommended for any function in these converters, due to
their high capacitance and recovery losses. If using
overdimensioned rectifiers, the junction capacitance
influence must be reviewed.
___________________Chip Information
TRANSISTOR COUNT: 1050
SUBSTRATE CONNECTED TO GND
Table 1. Component Manufacturers
DEVICE TYPE
MANUFACTURER
PHONE
FAX
International Rectifier
310-322-3333
310-322-3332
Fairchild
408-822-2000
408-822-2102
Dale-Vishay
402-564-3131
402-563-6418
Motorola
303-675-2140
303-675-2150
Central Semiconductor
516-435-1110
516-435-1824
Central Semiconductor
516-435-1110
516-435-1824
Sanyo
619-661-6835
619-661-1055
Taiyo Yuden
408-573-4150
408-573-4159
AVX
803-946-0690
803-626-3123
Coiltronics
561-241-7876
561-241-9339
Power FETs
Current-Sense Resistors
Diodes
Transistors
Capacitors
Coils
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
19-1914; Rev 1; 3/02
MAX5003-50W Evaluation Kit
The MAX5003 50W forward converter evaluation kit (EV
kit) provides a regulated +5V output voltage at currents
up to 10A, when operated from a +36V to +72V input
voltage range.
This EV kit is fully assembled and tested. The output
voltage is preset to +5V. A single-transistor forwardconverter topology with a reset winding is used for high
output power and high efficiency. The use of an optocoupler in the feedback circuit provides full 1500V primary to secondary galvanic isolation. A bottom-mounted heatsink plate safely dissipates the heat generated
by the power MOSFET and the output diode. The power
supply is designed to fit into a small footprint.
WARNING: Dangerous voltages are present on this
EV kit and on equipment connected to it. Users who
power-up this EV kit or power the sources connected to it must be careful to follow safety procedures
appropriate to working with high-voltage electrical
equipment.
Under severe fault or failure conditions, this EV kit
may dissipate large amounts of power, which could
result in the mechanical ejection of a component or
of component debris at high velocity. Operate this
EV kit with care to avoid possible personal injury.
Features
♦ +5V at 10A Output
♦ ±36V to ±72V Input Voltage Range
♦ 250kHz Switching Frequency
♦ Fully Isolated Design with 1500V Isolation Built
into the Transformer
♦ Fully Assembled and Tested Board with Minimum
PC Board Footprint
♦ 0.3% typical Line and Load Regulation
♦ 85% typical Efficiency at 25W
Ordering Information
PART
TEMP RANGE
IC PACKAGE
MAX5003EVKIT50W
0°C to +50°C*
16 SO
*With air flow.
Component List
DESIGNATOR
C1, C3, C10, C15
QTY
4
DESCRIPTION
0.1µF ceramic caps (0805)
DESIGNATOR
R1
QTY
1
C2
1
470pF ceramic cap (0805)
R2
1
39.2kΩ ±1% resistor (0805)
C4, C5, C6
3
0.47µF, 100V ceramic caps
(2220)
R3
1
80.6kΩ ±1% resistor (0805)
R4
1
1.24kΩ ±1% resistor (0805)
560µF, 6.3V electrolytic
capacitors
Nichicon UPW0J561MPH
47nF ceramic capacitors (0805)
R5
1
56kΩ ±1% resistor (0805)
R6
1
0.02Ω resistor
Dale-Vishay WSL1206 0.02Ω
±1.0% R86
C7, C13, C14
3
DESCRIPTION
1MΩ ±1% resistor (0805)
C8, C9
2
C11
1
22nF ceramic capacitor (0805)
R8
1
100Ω ±5% resistor (0805)
C12
1
1nF, 100V ceramic capacitor
(0805)
R9
1
470Ω ±5% resistor (0805)
C16
1
4.7nF, 1500V ceramic capacitor
R11, R12
2
10kΩ ±1% resistors (0805)
1
20Ω ±5% resistor (1206)
D3
1
200mA, 100V diode
Panasonic MA111CT
R13
R14
1
10kΩ ±5% resistor (0805)
D4
1
20A, 40V low forward voltage
Schottky diode
General Semi SBL2040CT
1
200mA, 200V, diode
Panasonic MA115CT
Q1
1
200V MOSFET, Rds = 0.18Ω
International Rectifier IRF640N
Q2
1
NPN transistor, FMMT3904
D5
R15
1
240kΩ ±5% resistor (0805)
R16
1
1Ω ±5% resistor (0805)
L1
1
4.7µH inductor
Coiltronics HC2-4R7
T1
1
Transformer (12-pin gull wing)
Coiltronics CTX03-14856
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
Evaluates: MAX5003
General Description
Evaluates: MAX5003
MAX5003-50W Evaluation Kit
Component List (continued)
DESIGNATOR
QTY
U2
1
DESCRIPTION
Optocoupler
QT Optoelectronics MOC217
U3
1
Shunt regulator TL431AID
U1
1
MAX5003ESE, 16-pin narrow SO
1
15V Zener diode
Panasonic MA8150
Z1
3)
4)
5)
6)
Component Suppliers
PHONE
FAX
Coiltronics
SUPPLIER
561-241-7876
561-241-9339
Dale-Vishay
402-564-3131
402-563-6418
General Semiconductor
631-847-3000
631-847-3236
International Rectifier
310-322-3331
310-322-3332
Nichicon
847-843-7500
847-843-2798
Panasonic
201-392-7522
201-392-4441
QT Optoelectronics
408-720-1440
408-720-0848
Quick Start
The MAX5003 50W EV kit is fully assembled and tested.
The power supply has full isolation between the primary
and secondary circuit. A heatsink is included at the noncomponent side for heatsinking the power MOSFET and
the output dual diode D4. During normal operation at full
output current, this heatsink becomes hot. A small fan
with direct airflow towards this heatsink is recommended
to keep the temperature rise to acceptable levels.
This power supply is not fused at the input. For
added protection, a 3A to 5A fuse should be used at
the input.
Appropriately sized heavy-gauge wires should be used
to connect the power supply to the EV kit and load.
Follow these steps to verify board operation. Do not
turn on the power supply until all connections are
made.
1) Connect a 220µF bulk storage capacitor at the input
terminals of the EV kit. This capacitor should be
rated for 100V and be able to handle 1.5A of ripple
current.
2) Connect a +36V to +72V power supply to the pads
labeled VIN. The positive power-supply terminal
should connect to +VIN and the negative powersupply terminal should connect to -VIN. The power
2
supply must be rated to at least 3A. The input voltage to the MAX5003 EV kit should not exceed 80V
at any time.
Connect a variable load capable of sinking at least
10A at 5V and a voltmeter to the pads labeled +VO
and -VO.
Set the load current to approximately 5A.
Turn on the input power and verify that the output
voltage is +5V.
To evaluate the load regulation of the EV kit, vary
the load from 0 to 10A and record the output voltage variation as needed. For best measurement
accuracy, the voltmeter must be connected right to
the output pads of the EV kit.
7) To evaluate the line regulation of the EV kit, vary the
input voltage from +36V to +72V and record the
output voltage.
Note: The MAX5003 EV kit undervoltage lockout circuitry has been designed to shut down when the input supply voltage is under 32V.
Power Supply Typical
Specifications
Table 1 summarizes the typical performance of the 50W
power supply.
Table 1. Typical Specifications
Output Power
50W
Input Voltage (VIN)
±36V to ±72V
Output Voltage (VOUT)
+5V
Output Current (IOUT)
10A
Initial Output Accuracy
±3%*
Output Voltage Regulation
0.3%, over line and load
Efficiency
85% at 48V and 25W
Input Output Isolation
1500V for 1s
Switching Topology
Feedforward Compensated
Forward Converter
Dimensions
4.05in x 1.3in
*Initial setpoint accuracy can be improved by using tighter tolerance resistor divider (R11 and R12).
_______________________________________________________________________________________
MAX5003-50W Evaluation Kit
70
MAX5003EV fig03
MAX5003EV fig01
80
0.20
0.15
60
0.10
VOLTS
EFFICIENCY (%)
0.25
Evaluates: MAX5003
90
50
40
0.05
0
30
-0.05
20
-0.10
10
-0.15
0
0
10
20
30
OUTPUT POWER (W)
40
50
Figure 1. Efficiency vs. Output Power
10µs/div
Figure 3. Output Transient Response (IOUT: 10A to 0.8A)
MAX5003 fig04
MAX5003EV fig02
5.5
5.4
5.3
5.1
VOUT (V)
VOUT (V)
5.2
5.0
1V/div
4.9
4.8
4.7
4.6
4.5
0
2
4
6
8
10
2ms/div
IOUT (A)
Figure 2. Output Voltage Regulation vs. Output Current
Power-Supply Performance
Key performance characteristics of the power supply
include efficiency and output voltage regulation. Figure 1
shows the efficiency vs. output power. The efficiency
reaches 85% at about 25W of output power and stays
relatively flat up to 50W. Even though the efficiency is
very high, heatsinking is required for the power MOSFET
and output diode. The diode will dissipate about 6W with
a 10A output current and the MOSFET can be expected
to dissipate about 3W to 4W at full 50W load. Sufficient
airflow over the power supply is recommended to cool
down the power transformer and output inductor.
Figure 2 shows the output voltage regulation of the
power supply from 0 to 10A of output current. Voltage
measurement was done across the output voltage
sense points +VO and -VO.
Figure 4. Output Voltage Transient At Power-Up
(VIN = 48V, IOUT = 5A)
Another interesting performance waveform for power
supplies is the output voltage transient response to a
step change in output current. Figure 3 shows load
transient response when the load is stepped from 10A
to 0.8A.
As can be seen from Figure 3, the initial transient
response time is less than 30µs. This is a side benefit of
using an optocoupler in conjunction with a TL431 shunt
regulator for isolation.
Figure 4 shows the well-behaved startup characteristics
of this power supply, which are characterized by the
monotonic rise of the output voltage as well as the
absence of any overshoots at the end of the rise period.
_______________________________________________________________________________________
3
MAX5003 fig05
VDS(V)
Evaluates: MAX5003
MAX5003-50W Evaluation Kit
50V/div
5V/div
400ns/div
Figure 5. Drain-Source Voltage Waveform
The Power Circuit Topology
Among the several power topologies available, the single-transistor forward topology offers a simple and lowcost solution and provides very good efficiency
throughout the operating power range. However, this
topology requires a transformer reset winding connected to pins T1–3 and T1–4 (Figure 7). The forward converter was chosen because it offers higher power density and higher efficiency than a flyback converter at
these power levels. Transformer T1 provides 1500V isolation between primary and secondary. Efficiency is further improved by powering the control circuit from a
primary bias winding (T1–5, T1–6, Figure 7) after initial
startup. A 250kHz switching frequency was selected to
allow small form-factor transformer, inductor, and output capacitors.
Key Operating Waveforms
Key operating waveforms are always useful in understanding the operation of switching power supplies. A
10× oscilloscope probe is necessary for effective probing. A digital scope is very useful in capturing startup
sequences. However, extreme caution should be exercised when probing live power supplies. For example,
shorting the drain-source terminals of Q1 while power is
applied is sure to produce a big spark and may damage the EV kit.
Figure 5 shows the drain-to-source waveform of Q1.
Notice the leading-edge voltage spike. This is a result
of the energy stored in transformer T1’s leakage inductance.
Figure 6 shows the voltage at the output of the secondary rectifier (cathode of D4).
4
MAX5003 fig06
200ns/div
Figure 6. Waveform at Cathode of D4
PC Board Layout and
Component Placement
As with any other switching power supply, component
placement is very important. Because of the primary-tosecondary isolation, the primary and secondary
grounds are separated. Figure 10 clearly shows the
separation on both sides of the PC board. The layout of
the board can be changed to accommodate different
footprints. Also, the power MOSFET and output rectifier
should be mounted on a heatsink for best thermal management. In this implementation, both of these components are on the noncomponent side of the board, with
their tabs mounted to the heatsink plate.
The critical layout considerations are as follows:
• Distance from the secondary transformer leads to
diode D4 should be kept to a minimum. This will
improve EMI as well as the effective available
power transfer.
• Bypass capacitors C4, C5, and C6 should be as
close as possible to T1–1.
• The PC board trace connecting T1–2 to the drain of
Q1 should be as short as possible.
• The current-sense resistor R6 should be as close as
possible to the source of Q1 and should return with a
very short trace either to the ground plane or to the
negative lead of bypass capacitors C4, C5, and C6.
• The gate-drive loop, consisting of pin 14 of
MAX5003, R16, Q1, R6, and pin 13 of the
MAX5003, must be kept as short as possible and
preferably routed over a ground plane.
• Relevant trace spacing (relating to trace creepage)
must be observed according to applicable safety
agency guidelines.
_______________________________________________________________________________________
VDD
GND
GND
GND
GND
GND
GND
-VIN
+VIN
GND
GND
C3
0.1µF
R3
80.6kΩ
1%
R2
39.2kΩ
1%
R1
1MΩ
1%
R15
240kΩ
R4
1.24kΩ
1%
C2
470pF
C1
0.1µF
Q2
GND
5
6
U2
8
7
6
5
4
3
2
1
GND
R14
10kΩ
7
COMP
CON
REF
SS
FREQ
ES
INDIV
V+
U1
C4
0.47µF
100V
VCC
VDD
4
3
2
1
2
1
NC
A
A
C
U3
C10
0.1µF
10
11
12
13
FB 9
MAXTON
AGND
CS
PGND
14
15
NC
A
A
R
C9
47nF
VDD
C6
0.47µF
100V
16
GND
NDRV
SGND
MAX5003
U1
GND
C5
0.47µF
100V
GND
C8
47nF
5
6
7
8
SGND
R5
56kΩ
1%
R8
100Ω
R16
1Ω
C11
22nF
D3
MA111CT
GND
GND
GND
GND
GND
GND
SGND
R12
10kΩ
1%
GND
D5
MA115
5T
12T
R11
10kΩ
1%
R9
470Ω
T1
R6
0.02Ω
1%
Q1
GND
2
14T
1
5
4
6
3
5T
GND
8
9
12
11
C16
4.7nF
1500V
C12
1nF
100V
R13
20Ω
D4
C7
560µF
6.3V
L1
4.7µH
+
C14
560µF
6.3V
+
SGND
C15
0.1µF
SGND: DENOTES SECONDARY GROUND
+ C13
560µF
6.3V
SGND
+VO
-VO
Evaluates: MAX5003
Z1
MAX5003-50W Evaluation Kit
Figure 7. MAX5003 50W EV Kit Schematic
_______________________________________________________________________________________
5
Evaluates: MAX5003
MAX5003-50W Evaluation Kit
1.0"
Figure 8. MAX5003-50W EV Kit PC Board Layout—Component Side
1.0"
Figure 9. MAX5003-50W EV Kit Component Placement Guide—Component Side.
Note: Q1 and D4 are placed on the bottom side where their metal tabs are exposed to heatsink plate.
1.0"
Figure 10. MAX5003-50W EV Kit PC Board Layout—Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
6 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
19-1914; Rev 1; 1/01
MAX5003 Evaluation Kit
Features
♦ 5V at 1A Output
The MAX5003 EV kit is a fully assembled and tested
surface-mount printed circuit (PC) board. It comes with
the output voltage set to 5V. This EV kit is configured as
a flyback converter, and can easily be configured for
either isolated or nonisolated operation by selecting the
state of a mechanical switch. Additionally, for systems
in which the input and output ground references are not
at the same potential and for which isolation is not
desired, the user has the option to install a level-shifter
(not supplied) in the controller feedback loop.
WARNING: Dangerous voltages are present on this EV
kit and on equipment connected to it. Users who power
up this EV kit or power the sources connected to it must
be careful to follow safety procedures appropriate to
working with high-voltage electrical equipment.
♦ 300kHz Switching Frequency
Under severe fault or failure conditions, this EV kit may
dissipate large amounts of power, which could result in
the mechanical ejection of a component or of component debris at high velocity. Operate this kit with care to
avoid possible personal injury.
*With air flow.
♦ +36V to +72V Input Voltage Range
♦ Can be Configured for -48V Input and +5V Output
♦ Selectable Isolated or Nonisolated Operation
♦ Proven PC Board Layout
♦ Fully Assembled and Tested Surface-Mount Board
Ordering Information
PART
TEMP. RANGE
MAX5003EVKIT
0°C to +70°C*
IC PACKAGE
16 QSOP
Component List
DESIGNATION QTY
DESCRIPTION
DESIGNATION QTY
DESCRIPTION
1
33µF, 100V electrolytic capacitor
Sanyo 100MV33CZ
Q2
1
C2, C3
2
22µF, 10V ceramic capacitors
Taiyo Yuden LMK432BJ226MM
2N3904-type NPN transistor
Central Semiconductor CMPT3904 or
equivalent
R1
1
41.2kΩ ±1% resistor
C5
C6
C7
1
1
1
2200pF ±10% ceramic capacitor
3900pF ±10% ceramic capacitor
0.01µF ceramic capacitor
R2
1
17.4kΩ ±1% resistor
R3
1
68kΩ ±5% resistor
R4, R22, R23
3
1MΩ ±5% resistors
C8
1
10µF, 16V ceramic capacitor
Taiyo Yuden EMK325BJ106MN
R5
1
39kΩ ±5% resistor
R6
1
51kΩ ±5% resistor
R7
R8, R15
1
2
200kΩ ±5% resistor
43Ω ±5% resistors
DESIGNATION
C1
C9
1
100pF ±10% ceramic capacitor
C10
1
0.47µF ceramic capacitor
C11, C13, C17
3
0.1µF ceramic capacitors
C12
1
390pF ±10% ceramic capacitor
R9
1
0.11Ω ±1%, 1/4W resistor
Dale WSL-1206/0.11Ω/1%
C16
1
4.7µF, 25V tantalum capacitor
AVX TAJB475M025
D1
1
30V, 1A Schottky diode
Fairchild MBRS130L
1
1
1
1
100Ω ±5% resistor
100kΩ ±5% resistor
20kΩ ±5% resistor
1.3kΩ ±5% resistor
D2
1
Small-signal switching diode
Central Semiconductor CMSD4448
R10
R11
R12
R13
N1
1
200V, 5.2A N-channel MOSFET
International Rectifier IRF620S
Q1
0
Not installed
R14
1
240kΩ ±5% resistor
R16, R17
2
24.9kΩ ±1% resistors
R18
0
Not installed
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
Evaluates: MAX5003
General Description
The MAX5003 evaluation kit (EV kit) provides a regulated 5V output voltage up to 1A while operating from a
+36V to +72V input voltage.
Evaluates: MAX5003
MAX5003 Evaluation Kit
Component List (continued)
DESIGNATION QTY
DESCRIPTION
R19
0
Not installed
R20
1
680Ω ±5% resistor
R21
1
15Ω ±5% resistor
SW1
SW2
1
1
DPDT switch
SPDT switch
T1
1
65µH, 8:1:2.5 transformer
Coiltronics CTX03-14502
U1
1
MAX5003EEE (16-pin QSOP)
U2
1
2.5V voltage reference
Motorola TL431BCD
U3
1
Low-current optocoupler
QT Opto MOC217
None
None
None
1
1
1
MAX5003 PC board
MAX5003 data sheet
MAX5003 EV kit data sheet
Table 1. Switch/Jumper Functions
FUNCTION
Nonisolated,
Non-level-shifted Feedback
Mode (e.g., +48V input and
+5V output)
Nonisolated, Level-Shifted
Feedback Mode (e.g.,
-48V input and +5V output)
Isolated Feedback Mode
(input and output supplies
isolated from one another)
SWITCH/
JUMPER
POSITION
SW1
NON
SW2
DIR
JU1
Closed*
(default trace)
SW1
NON
SW2
LVL
JU1
Open (Cut)
SW1
ISO
SW2
LVL
JU1
Open (Cut)
*Default setting
Component Suppliers
PHONE
FAX
AVX
803-946-0690
803-626-3123
3) Verify that switch SW1 is set to the NON position and
SW2 is set to the DIR position. See Table 1 for a description of the switch settings.
Central
Semiconductor
516-435-1110
516-435-1824
4) Turn on the power and verify that the output voltage
is +5V.
Coiltronics
561-241-7876
561-241-9339
Dale-Vishay
402-564-3131
402-563-6418
Fairchild
408-822-2000
408-822-2102
International
Rectifier
310-322-3331
310-322-3332
Motorola
303-675-2140
303-675-2150
QT Optoelectronics
408-720-1440
408-720-0848
SUPPLIER
Sanyo
619-661-6835
619-661-1055
Taiyo Yuden
408-573-4150
408-573-4159
Note: Please indicate that you are using the MAX5003 when
contacting the above component suppliers.
Quick Start
The MAX5003 EV kit is fully assembled and tested.
Follow these steps to verify board operation in nonisolated mode. Do not turn on the power supply until all
connections are completed.
1) Connect a +36V to +72V power supply to the pad
labeled VIN. Do not exceed 100V input voltage.
The ground connects to the GND pad (-48V).
2) Connect a voltmeter and load (if any) to the +5V pad.
2
5) Refer to the Isolated Feedback section to modify the
board for isolated operation. Refer to the Nonisolated
Level-Shifted Feedback section to modify the board
for operation with the input and output negative supplies at different potentials.
Detailed Description
Feedback Mode Selection
Switch SW1 selects the feedback configuration (isolated or nonisolated). If SW1 is set to the NON position,
switch SW2 selects either direct feedback (for the case
in which the input and output share the same ground)
or level-shifted feedback. Switch SW2 is only effective
when nonisolated feedback is selected. Jumper JU1
determines whether the input and output ground references are connected. Table 1 summarizes switch and
jumper functions. Do not operate switches SW1 and
SW2 when power is applied to the EV kit because
the controller can be damaged.
Isolated Feedback
To configure the MAX5003 EV kit for isolated operation,
turn off the power supply and cut the JU1 PC board
trace. Set the SW1 switch to the ISO position, and set
the SW2 switch to the LVL position (setting SW2 to the
_______________________________________________________________________________________
MAX5003 Evaluation Kit
Nonisolated Level-Shifted Feedback
To configure the MAX5003 EV kit for operation in a system in which the negative terminal of the input power
supply is at a more negative potential than the negative
terminal of the output power supply (for example, in a
-48V input to +5V output application), first turn off the
power supply and cut the JU1 PC board trace. Set the
SW1 switch to the NON position, and set the SW2
switch to the LVL position. Locate parts R18, R19, and
Q1 (directly above jumper JU1 on the PC board).
Solder the following parts into the R18, R19, and Q1
locations: R18 = 36.5kΩ ±1% resistor (1206), R19 =
12.4kΩ ±1% resistor (1206), and Q1 = 60V 2N2907type PNP transistor (SOT23). Note that the initial DC
output voltage accuracy and the temperature variation
will be degraded in this configuration. Do not operate
switches SW1 and SW2 when power is applied to
the EV kit because the controller can be damaged.
high signal to turn on transistor Q2. For normal operation, the SHDN pad can be connected to ground or left
unconnected. Note that the logic-high signal used to
drive the SHDN pad is referenced to the negative side
of the input supply. For more details regarding undervoltage lockout, refer to the MAX5003 data sheet.
Current Limiting
The MAX5003 EV kit has a current-limiting feature
implemented by current-sense resistor R9. The
MAX5003 turns off switching FET N1 when the voltage
at the CS pin reaches 100mV. Since R9 is a 0.11Ω
resistor, this limits the current in the transformer primary
to 0.91A peak, which corresponds to a typical output
short-circuit current of 4.5A. R10, a 100Ω resistor, is
connected between the current-sense resistor and the
CS pin to enable current-sense blanking after N1 is
turned on, as described in the MAX5003 data sheet.
Layout Considerations
The MAX5003 EV kit layout is optimized for fast switching and high currents. The input and output power and
ground traces must both be as short and wide as possible to minimize unwanted parasitic inductance. This
board was not designed per UL spacing specifications.
Undervoltage Lockout
and Shutdown
The MAX5003 EV kit is configured to go into undervoltage lockout when VIN drops below 32V. The MAX5003
does not have a shutdown pin, but the undervoltage
lockout state is equivalent to a shutdown state. The
MAX5003 EV kit contains a shutdown function consisting of an NPN switching transistor (Q2) that can pull the
VINDIV pin to ground. To place the MAX5003 in undervoltage lockout, drive the SHDN pad with a +5V logic-
_______________________________________________________________________________________
3
Evaluates: MAX5003
LVL position disconnects the R1-R2 resistor-divider
from the MAX5003’s FB pin, as required for isolated
operation). Turn the power supply back on and verify
that the output voltage is still +5V. Note that for the isolated configuration, the output ground and the input
ground may differ by as much as 500V. Do not operate switches SW1 and SW2 when power is applied
to the EV kit because the controller can be damaged.
4
SHDN
REF
R11
100kΩ
R23
1MΩ
VIN
GND (-48V)
SW1-B
4
REF
R12
20kΩ
1
Q2
2
3
ISO
6
NON
2
COMP
R3
68kΩ
C13
0.1µF
5
4
3
R5
39kΩ
U1
C12
390pF
FB
9
AGND
CS
PGND
NDRV
VCC
VDD
MAXTON
MAX5003
COMP
CON
REF
R7
200kΩ
8
7
6
SS
FREQ
ES
V+
VINDIV
2
C10
0.47µF
C11
0.1µF
C9
100pF
1
R4
1MΩ
10
11
12
13
14
15
16
C1
33µF
100V
R6
51kΩ
1
C8
10µF
16V
R10
100Ω
C17
0.1µF
VDD
3
N1
2
VDD
R22
1MΩ
REF
R9
0.11Ω
1/4W
1%
D2
2
1
REF
R18
OPEN
C5
2200pF
T1
R21
15Ω
R13
1.3kΩ
NOT INSTALLED
R19
OPEN
Q1
R8
43Ω
5
2
8
7
3
5
6
R14
240kΩ
11
12
9
10
1
U3
MOC217
7
2
2
1
2, 3
U2
TL431
1
C2
22µF
10V
R15
43Ω
VDD
SW2
LVL DIR
3
D1
C16
4.7µF
25V
6, 7
8
C7
0.01µF
R20
680Ω
C6
3900pF
JU1
CUT HERE
R2
17.4kΩ
1%
C3
22µF
10V
R17
24.9kΩ
1%
R16
24.9kΩ
1%
R1
41.2kΩ
1%
NON
1
3
5
GND
ISO
SW1-A
+5V
Evaluates: MAX5003
MAX5003 Evaluation Kit
Figure 1. MAX5003 EV Kit Schematic
_______________________________________________________________________________________
MAX5003 Evaluation Kit
Figure 2. MAX5003 EV Kit Component Placement Guide—
Component Side
1.0"
1.0"
Figure 3. MAX5003 EV Kit PC Board Layout—Component Side
Figure 4. MAX5003 EV Kit PC Board Layout—Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 5
© 2001 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
Evaluates: MAX5003
1.0"