DS90C401 Dual Low Voltage Differential Signaling (LVDS) Driver General Description Features The DS90C401 is a dual driver device optimized for high data rate and low power applications. This device along with the DS90C402 provides a pair chip solution for a dual high speed point-to-point interface. The DS90C401 is a current mode driver allowing power dissipation to remain low even at high frequency. In addition, the short circuit fault current is also minimized. The device is in a 8 lead small outline package. The differential driver outputs provides low EMI with its low output swings typically 340 mV. n n n n n Ultra low power dissipation Operates above 155.5 Mbps Standard TIA/EIA-644 8 Lead SOIC Package saves space Low Differential Output Swing typical 340 mV Connection Diagram 10001301 Order Number DS90C401M See NS Package Number M08A Functional Diagram 10001302 © 2005 National Semiconductor Corporation DS100013 www.national.com DS90C401 Dual Low Voltage Differential Signaling (LVDS) Driver August 2005 DS90C401 Absolute Maximum Ratings (Note 1) Maximum Junction Temperature If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) ESD Rating −0.3V to (VCC + 0.3V) Output Voltage (DOUT+, DOUT−) −0.3V to (VCC + 0.3V) Short Circuit Duration (DOUT+, DOUT−) ≥ 3,500V (HBM, 1.5 kΩ, 100 pF) (EIAJ, 0 Ω, 200 pF) −0.3V to +6V Input Voltage (DIN) +150˚C ≥ 250V Recommended Operating Conditions Continuous Maximum Package Power Dissipation @ +25˚C M Package Supply Voltage (VCC) 1068 mW Derate M Package Temperature (TA) −65˚C to +150˚C Lead Temperature Range Soldering (4 sec.) Typ Max Units +5.0 +5.5 V −40 +25 +85 ˚C Operating Free Air 8.5 mW/˚C above +25˚C Storage Temperature Range Min +4.5 +260˚C Electrical Characteristics Over supply voltage and operating temperature ranges, unless otherwise specified. (Notes 2, 3) Symbol Parameter VOD1 Differential Output Voltage ∆VOD1 Change in Magnitude of VOD1 for Complementary Output States VOS Offset Voltage ∆VOS Change in Magnitude of VOS for Complementary Output States Conditions RL = 100Ω (Figure 1) Pin Min Typ Max DOUT−, DOUT+ 250 340 450 mV 4 35 |mV| 1.25 1.375 V 5 25 |mV| 1.41 1.60 1.125 VOH Output Voltage High VOL Output Voltage Low RL = 100Ω 0.90 IOS Output Short Circuit Current VIH Input Voltage High VIL Input Voltage Low II Input Current VIN = VCC, GND, 2.5V or 0.4V VCL Input Clamp Voltage ICL = −18 mA ICC No Load Supply Current DIN = VCC or GND VOUT = 0V (Note 8) 1.07 −3.5 DIN Loaded Supply Current V V −5.0 mA 2.0 VCC V GND 0.8 V +10 µA 1.7 3.0 mA 3.5 5.5 mA 8 14.0 mA −10 ±1 −1.5 −0.8 VCC DIN = 2.5V or 0.4V ICCL Units RL = 100Ω All Channels VIN = VCC or GND (all inputs) V Switching Characteristics VCC = +5.0V ± 10%, TA = −40˚C to +85˚C (Notes 3, 4, 5, 6, 9) Symbol Parameter Conditions Min Typ Max 0.5 2.0 3.5 ns 0.5 2.1 3.5 ns 0 80 900 ps 0 0.3 1.0 ns 3.0 ns 2.0 ns 2.0 ns tPHLD Differential Propagation Delay High to Low tPLHD Differential Propagation Delay Low to High tSKD Differential Skew |tPHLD – tPLHD| tSK1 Channel-to-Channel Skew (Note 4) tSK2 Chip to Chip Skew (Note 5) tTLH Rise Time 0.35 tTHL Fall Time 0.35 www.national.com RL = 100Ω, CL = 5 pF (Figure 2 and Figure 3) 2 Units DS90C401 Parameter Measurement Information 10001304 FIGURE 1. Driver VOD and VOS Test Circuit 10001305 FIGURE 2. Driver Propagation Delay and Transition Time Test Circuit 10001306 FIGURE 3. Driver Propagation Delay and Transition Time Waveforms Typical Application 10001309 FIGURE 4. Point-to-Point Application 3 www.national.com DS90C401 current mode requires (as discussed above) that a resistive termination be employed to terminate the signal and to complete the loop as shown in Figure 4. AC or unterminated configurations are not allowed. The 3.4 mA loop current will develop a differential voltage of 340 mV across the 100Ω termination resistor which the receiver detects with a 240 mV minimum differential noise margin neglecting resistive line losses (driven signal minus receiver threshold (340 mV – 100 mV = 240 mV)). The signal is centered around +1.2V (Driver Offset, VOS) with respect to ground as shown in Figure 5. Note that the steady-state voltage (VSS) peak-topeak swing is twice the differential voltage (VOD) and is typically 680 mV. Applications Information LVDS drivers and receivers are intended to be primarily used in an uncomplicated point-to-point configuration as is shown in Figure 4. This configuration provides a clean signaling environment for the quick edge rates of the drivers. The receiver is connected to the driver through a balanced media which may be a standard twisted pair cable, a parallel pair cable, or simply PCB traces. Typically, the characteristic impedance of the media is in the range of 100Ω. A termination resistor of 100Ω should be selected to match the media, and is located as close to the receiver input pins as possible. The termination resistor converts the current sourced by the driver into a voltage that is detected by the receiver. Other configurations are possible such as a multi-receiver configuration, but the effects of a mid-stream connector(s), cable stub(s), and other impedance discontinuities as well as ground shifting, noise margin limits, and total termination loading must be taken into account. The DS90C401 differential line driver is a balanced current source design. A current mode driver, generally speaking has a high output impedance and supplies a constant current for a range of loads (a voltage mode driver on the other hand supplies a constant voltage for a range of loads). Current is switched through the load in one direction to produce a logic state and in the other direction to produce the other logic state. The typical output current is mere 3.4 mA, a minimum of 2.5 mA, and a maximum of 4.5 mA. The The current mode driver provides substantial benefits over voltage mode drivers, such as an RS-422 driver. Its quiescent current remains relatively flat versus switching frequency. Whereas the RS-422 voltage mode driver increases exponentially in most case between 20 MHz–50 MHz. This is due to the overlap current that flows between the rails of the device when the internal gates switch. Whereas the current mode driver switches a fixed current between its output without any substantial overlap current. This is similar to some ECL and PECL devices, but without the heavy static ICC requirements of the ECL/PECL designs. LVDS requires > 80% less current than similar PECL devices. AC specifications for the driver are a tenfold improvement over other existing RS-422 drivers. 10001310 FIGURE 5. Driver Output Levels www.national.com 4 Note 4: Channel-to-Channel Skew is defined as the difference between the propagation delay of the channel and the other channels in the same chip with an event on the inputs. TABLE 1. Device Pin Descriptions Note 5: Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays. Pin No. Name Description 4, 8 DIN 3, 7 DOUT+ Non-inverting driver output pin 2, 6 DOUT− Inverting driver output pin HBM (1.5 kΩ, 100 pF) ≥ 3,500V 5 GND Ground pin EIAJ (0Ω, 200 pF) ≥ 250V 1 VCC Positive power supply pin, +5.0V ± 10% Note 6: Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50Ω, tr ≤ 6 ns, and tf ≤ 6 ns. TTL/CMOS driver input pins Note 7: ESD Ratings: Note 8: Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. Note 9: CL includes probe and jig capacitance. Truth Table Ordering Information Order Number DIN Number SOP/M08A DS90C401M DIN > 0.8V and DIN < 2.0V Operating Package Type/ Temperature −40˚C to +85˚C Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation. DOUT+ DOUT− L L H H H L X X H = Logic high level L = Logic low level X = Indeterminant state Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except: VOD1 and ∆VOD1. Typical Performance Characteristics Power Supply Current vs Power Supply Voltage Power Supply Current vs Temperature 10001311 10001312 5 www.national.com DS90C401 Note 3: All typicals are given for: VCC = +5.0V, TA = +25˚C. Pin Descriptions DS90C401 Typical Performance Characteristics (Continued) Power Supply Current vs Power Supply Voltage Power Supply Current vs Temperature 10001313 10001314 Output Short Circuit Current vs Power Supply Voltage Differential Output Voltage vs Power Supply Voltage 10001317 10001316 www.national.com 6 DS90C401 Typical Performance Characteristics (Continued) Differential Output Voltage vs Ambient Temperature Output Voltage High vs Power Supply Voltage 10001318 10001319 Output Voltage High vs Ambient Temperature Output Voltage Low vs Power Supply Voltage 10001320 10001321 7 www.national.com DS90C401 Typical Performance Characteristics (Continued) Output Voltage Low vs Ambient Temperature Offset Voltage vs Power Supply Voltage 10001323 10001322 Offset Voltage vs Ambient Temperature Power Supply Current vs Frequency 10001324 www.national.com 10001325 8 DS90C401 Typical Performance Characteristics (Continued) Differential Output Voltage vs Load Resistor Differential Propagation Delay vs Power Supply Voltage 10001327 10001328 Differential Propagation Delay vs Ambient Temperature Differential Skew vs Power Supply Voltage 10001330 10001329 9 www.national.com DS90C401 Typical Performance Characteristics (Continued) Differential Skew vs Ambient Temperature Differential Transition Time vs Power Supply Voltage 10001331 10001332 Differential Transition Time vs Ambient Temperature 10001333 www.national.com 10 inches (millimeters) unless otherwise noted 8-Lead (0.150" Wide) Molded Small Outline Package, JEDEC Order Number DS90C401M NS Package Number M08A National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. 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