AD CMP401GP

a
23 ns and 65 ns
Low Voltage Comparators
CMP401/CMP402
FUNCTIONAL BLOCK DIAGRAM
FEATURES
23 ns or 65 ns Propagation Delay
Single-Supply Operation
Compatible with +3 V and +5 V Logic
Separate Input and Output Sections
Low Power
Wide Input Range: –5 V to +3.9 V
VANALOG+ =
+0V TO +5V
VDIGITAL =
+3V OR +5V
IN+
OUTPUT
IN–
APPLICATIONS
Battery Operated Instrumentation
Line Receivers
Level Translators
Read Channel Detection
VANALOG– =
+0V TO –5V
NOTE: (VANALOG+) – (VANALOG–) ≥ 3V
GENERAL DESCRIPTION
The CMP401 and CMP402 are 23 ns and 65 ns quad comparators with separate input and output supplies. Separate supplies
enable the input stage to be operated from +3 volts to as high as
±6 volts. The output can be supplied with either +3 volts or
+5 volts as determined by the interface logic or available supplies.
Independent input and output supplies combined with fast propagation make the CMP401 and CMP402 excellent choices for
interfacing to portable instrumentation.
The CMP401 and CMP402 are specified over the extended
industrial (–40°C to +125°C) temperature range. Both are
available in 16-pin plastic DIP or narrow SO-16 surface mount
packages. Consult factory for 16-lead TSSOP availability.
50mV
2v
100
90
10
0%
10nS
CMP401: 20 MHz Noninverting Switching. VIN = ± 100 mV
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
CMP401/CMP402–SPECIFICATIONS
ELECTRICAL SPECIFICATIONS (@ V+
Parameter
INPUT CHARACTERISTICS
Offset Voltage1
Offset Voltage1
Hysteresis
Input Bias Current
Input Offset Current
Input Common-Mode Voltage Range
Common-Mode Rejection
Large Signal Voltage Gain
Offset Voltage Drift
ANA =
V+DIG = +5.0 V, VCM = 0.1 V, –408C ≤ TA ≤ +1258C unless otherwise noted)
Symbol
Conditions
VOS
VOS
TA = +25°C
IB
IB
IOS
VCM
CMRR
AVO
∆VOS/∆T
TA = +25°C
Min
Typ
Max
Units
3
4
mV
mV
mV
µA
µA
µA
V
dB
V/mV
µV/°C
2
0.1 V ≤ VCM ≤ 3.9 V
RL = 10 kΩ
0
60
10
1
OUTPUT CHARACTERISTICS
Output High Voltage
Output Low Voltage
VOH
VOL
IOH = –3.2 mA
IOL = 3.2 mA
4.6
POWER SUPPLY
Power Supply Rejection Ratio
Analog Supply Current – CMP401
Digital Supply Current – CMP401
Analog Supply Current – CMP401
Digital Supply Current – CMP401
Analog Supply Current – CMP402
Digital Supply Current – CMP402
Analog Supply Current – CMP402
Digital Supply Current – CMP402
PSRR
IANA
IDIG
IANA
IDIG
IANA
IDIG
IANA
IDIG
V+ANA and V+DIG +2.7 V to +6 V
TA = +25°C
VO = 0 V, RL = ∞, TA = +25°C
60
DYNAMIC PERFORMANCE
Propagation Delay – CMP401
tP
Propagation Delay – CMP401
tP
Propagation Delay – CMP401
Propagation Delay – CMP402
tP
tP
Propagation Delay – CMP402
tP
Propagation Delay – CMP402
tP
100 mV Step with 20 mV OD,
TA = +25°C
100 mV Step with 5 mV OD,
TA = +25°C
100 mV Step with 20 mV OD
100 mV Step with 20 mV OD,
TA = +25°C
100 mV Step with 5 mV OD,
TA = +25°C
100 mV Step with 20 mV OD
ELECTRICAL SPECIFICATIONS (@ V
3
4
±3
+4.0
VO = 0 V, RL = ∞
TA = +25°C
VO = 0 V, RL = ∞, TA = +25°C
VO = 0 V, RL = ∞
ANA
Parameter
Symbol
INPUT CHARACTERISTICS
Offset Voltage1
Input Common-Mode Voltage Range
Input Differential Voltage Range
Common-Mode Rejection
17
0.2
V
V
6.5
2.0
8.0
2.25
1.4
2.0
1.75
2.25
dB
mA
mA
mA
mA
mA
mA
mA
mA
23
ns
30
ns
ns
65
ns
75
ns
ns
33
54
60
= VDIG = +3.0 V, VCM = 0.1 V, TA = +258C unless otherwise noted)
Conditions
Min
VOS
VCM
VDIFF
CMRR
0.1 V ≤ VCM ≤ 1.9 V
0
± 2.0
60
OUTPUT CHARACTERISTICS
Output High Voltage
Output Low Voltage
VOH
VOL
IOH = –3.2 mA
IOL = 3.2 mA
2.6
POWER SUPPLY
Power Supply Rejection Ratio
Analog Supply Current – CMP401
Digital Supply Current – CMP401
Analog Supply Current – CMP402
Digital Supply Current – CMP402
PSRR
IANA
IDIG
IANA
IDIG
V+ANA and V+DIG +2.7 V to +6 V
60
DYNAMIC PERFORMANCE
Propagation Delay – CMP401
Propagation Delay – CMP402
tP
tP
100 mV Step with 20 mV OD
100 mV Step with 20 mV OD
Typ
VO = 0 V, RL = ∞
VO = 0 V, RL = ∞
–2–
32
70
Max
Units
4.5
+2.0
mV
V
V
dB
0.25
V
V
6
1
1.2
1
dB
mA
mA
mA
mA
ns
ns
REV. 0
CMP401/CMP402
ELECTRICAL SPECIFICATIONS
(@ V± ANA = ±5 V, VDIG = +5.0 V, TA = +258C unless otherwise noted)
Parameter
Symbol
Conditions
INPUT CHARACTERISTICS
Offset Voltage1
Input Common-Mode Voltage Range
Input Differential Voltage Range
Common-Mode Rejection
Offset Voltage Drift
VOS
VCM
VDIFF
CMRR
∆VOS/∆T
VCM = 0 V
Max
Units
3
+4.0
5
mV
V
V
dB
µV/°C
POWER SUPPLY
Power Supply Rejection Ratio
Analog Supply Current – CMP401
Digital Supply Current – CMP401
Analog Supply Current – CMP402
Digital Supply Current – CMP402
PSRR
IANA
IDIG
IANA
IDIG
V± ANA ± 3 V to ± 6 V
VO = 0 V, RL = ∞
6.5
2.0
2.0
2.0
dB
mA
mA
mA
mA
DYNAMIC PERFORMANCE
Propagation Delay – CMP401
Propagation Delay – CMP402
tP
tP
100 mV Step with 20 mV OD
100 mV Step with 20 mV OD
23
65
ns
ns
–4.9 V ≤ VCM ≤ 3.9 V
Typ
–5.0
± 8.0
60
1
VO = 0 V, RL = ∞
NOTES
1
Offset voltage is defined as (V OS+ + VOS–)/2.
Specifications subject to change without notice.
REV. 0
Min
–3–
60
CMP401/CMP402
ABSOLUTE MAXIMUM RATINGS 1
DICE CHARACTERISTICS
Total Analog Supply Voltage . . . . . . . . . . . . . . . . . . . . . +16 V
Digital Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V
Analog Positive Supply—Digital Positive Supply . . . . –200 mV
Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 7 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ± 9 V
Output Short-Circuit Duration to GND . . . . . . . . . Indefinite
Storage Temperature Range
P, S, RU Package . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
CMP401G, CMP402G . . . . . . . . . . . . . . –40°C to +125°C
Junction Temperature Range
P, S, RU Package . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300°C
Package Type
uJA3
uJC
Units
16-Pin Plastic DIP (P)
16-Pin SO (S)
16-Lead TSSOP (RU)
90
113
180
47
37
37
°C/W
°C/W
°C/W
2
1
16 15
3
14
4
13
5
12
6
11
7
10
8
9
CMP401/CMP402 Die Size 0.065 × 0.069 inch, 4,485 sq. mils
Substrate (Die Backside) Is Connected to V+
Transistor Count 104.
V+ DIG
V+ ANA
NOTES
1
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2
The analog input voltage is equal to ± 7 volts or the analog supply voltage,
whichever is less.
3
θJA is specified for the worst case conditions, i.e., θJA is specified for device in socket
for P-DIP, and θJA is specified for device soldered in circuit board for SOIC and
TSSOP packages.
–IN
+IN
OUT
ORDERING GUIDE
Model
Temperature
Range
Package
Description
Package
Option
CMP401GP
CMP401GS
CMP401GRU
CMP402GP
CMP402GS
CMP402GRU
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
16-Pin Plastic DIP
16-Pin SOIC
16-Lead TSSOP
16-Pin Plastic DIP
16-Pin SOIC
16-Lead TSSOP
N-16
R-16A
RU-16
N-16
R-16A
RU-16
DIG GND
V– ANA
Figure 1. Simplified Schematic
CMP401/CMP402 PIN CONFIGURATIONS
16-Lead Epoxy DIP
(P Suffix)
OUT B 1
16 OUT C
OUT B
1
16 OUT C
OUT A 2
15 OUT D
OUT A
2
15 OUT D
V+ DIG 3
14 DIG GND
V+ ANA 4
13 V– ANA
16-Lead
TSSOP
(RU Suffix)
16-Lead Narrow-SO
(S Suffix)
V+ DIG
3
V+ ANA
4
CMP401/
402
TOP VIEW
(Not to Scale)
14 DIG GND
13 V– ANA
–IN A 5
12 –IN D
–IN A
5
+IN A 6
11 +IN D
+IN A
6
11 +IN D
–IN B 7
10 –IN C
–IN B
7
10 –IN C
+IN B 8
9 +IN C
+IN B
8
9 +IN C
12 –IN D
1
OUT B
OUT A
V+ DIG
V+ ANA
–IN A
+IN A
–IN B
+IN B
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the CMP401/CMP402 features proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–4–
16
OUT C
OUT D
DIG GND
V– ANA
–IN D
+IN D
–IN C
+IN C
CMP401/
402
TOP VIEW
(Not to Scale)
8
9
WARNING!
ESD SENSITIVE DEVICE
REV. 0
Typical Performance Characteristics–CMP401/CMP402
110
+VAN = +VDIG = +5V
–VAN = 0V TO –5V
RS ≤ 50Ω, CL = 15pF
TA = +25°C
30
25
+PDELAY
20
15
–PDELAY
10
5
10
20
30
OVERDRIVE – mV
40
–PDELAY
70
+PDELAY
60
50
–PDELAY
40
30
–50
–25
0
25
50
75
TEMPERATURE – °C
100
20
30
OVERDRIVE – mV
40
PROPAGATION DELAY – ns
TA = +25°C
50
+PDELAY
30
–PDELAY
20
1k
10k
100
SOURCE RESISTANCE – Ω
100k
Figure 8. CMP401 Propagation Delay
vs. Source Resistance – 20 mV OD
REV. 0
20
–PDELAY
15
25
50
20
+PDELAY
15
–PDELAY
10
+VAN = +VDIG = +5V
–VAN = 0V TO –5V
RS ≤ 50Ω, CL = 15pF
5
–25
0
25
50
75
TEMPERATURE – °C
100
0
25
50
75
TEMPERATURE – °C
100
125
+PDELAY
40
–PDELAY
30
20
+VAN = +VDIG = +5V
–VAN = 0V TO –5V
RS ≤ 50Ω, CL = 15pF
10
0
–50
125
–25
0
25
50
75
TEMPERATURE – °C
100
125
Figure 7. CMP402 Propagation Delay
vs. Temperature – 20 mV OD
80
+VAN = +VDIG = +5V
–VAN = 0V TO –5V
TA = +25°C
100
+VAN = +VDIG
70
80
+PDELAY
60
–PDELAY
40
20
0
–25
Figure 4. CMP401 Propagation Delay
vs. Temperature – 5 mV OD
60
–VAN = 0V TO –5V
RS ≤ 50Ω, CL = 15pF
60
TA = +25°C
50
40
+PDELAY
30
20
–PDELAY
10
10
10
25
120
+VAN = +VDIG = +5V
–VAN = 0V TO –5V
60
0
+PDELAY
10
–50
50
Figure 6. CMP401 Propagation Delay
vs. Temperature – 20 mV OD
90
40
10
30
30
0
–50
125
Figure 5. CMP402 Propagation Delay
vs. Temperature – 5 mV OD
0
Figure 3. CMP402 Propagation Delay
vs. Overdrive
PROPAGATION DELAY – ns
PROPAGATION DELAY – ns
+PDELAY
50
20
50
+VAN = +VDIG = +5V
–VAN = 0V TO –5V
RS ≤ 50Ω, CL = 15pF
80
PROPAGATION DELAY – ns
60
PROPAGATION DELAY – ns
0
90
70
70
40
+VAN = +VDIG = +5V
–VAN = 0V TO –5V
RS ≤ 50Ω, CL = 15pF
35
30
Figure 2. CMP401 Propagation Delay
vs. Overdrive
80
80
PROPAGATION DELAY – ns
0
40
+VAN = +VDIG = +5V
–VAN = 0V TO –5V
RS ≤ 50Ω, CL = 15pF
TA = +25°C
90
PROPAGATION DELAY – ns
PROPAGATION DELAY – ns
35
PROPAGATION DELAY – ns
40
0
10
100
1k
10k
SOURCE RESISTANCE – Ω
100k
Figure 9. CMP402 Propagation Delay
vs. Source Resistance – 20 mV OD
–5–
0
2
3
4
5
POSITIVE SUPPLY VOLTAGE – Volts
6
Figure 10. CMP401 Propagation Delay
vs. Supply Voltage – 20 mV OD
CMP401/CMP402
50
110
+VAN = +VDIG
TA = +25°C
80
70
60
+PDELAY
50
–PDELAY
35
20
15
+VAN = +VDIG = +5V
–VAN = 0V TO –5V
RS = 50Ω, TA = +25°C
10
5
30
0
6
Figure 11. CMP402 Propagation Delay
vs. Supply Voltage – 20 mV OD
–PDELAY
25
0
2
3
4
5
POSITIVE SUPPLY VOLTAGE – Volts
+PDELAY
30
40
1
80
40
100
200
300
400
CAPACITIVE LOAD – pF
80
+SLEW
600
400
200
–PDELAY
40
30
20
+VAN = +VDIG = +5V
–VAN = 0V TO –5V
10
RS ≤ 50Ω, TA = +25°C
0
100
200
300
400
CAPACITIVE LOAD – pF
500
60
TA = +25°C
TA = +25°C
50
40
+PDELAY
30
–PDELAY
20
100
–∆RAIL
10
+∆RAIL
1
10
2
3
4
5
POSITIVE SUPPLY VOLTAGE – Volts
0
6
3
4
5
2
SUPPLY VOLTAGE – Volts
0.1
6
Figure 15. CMP401 Propagation Delay
vs. Supply Voltage
2.5
DIGITAL DC SUPPLY CURRENT – mA
1.5
1
0.5
0
25 50 75 100 125 150
TEMPERATURE – °C
Figure 17. CMP401/CMP402 Input
Offset Voltage vs. Temperature
1.6
1
10
100
1000
10000
LOAD CURRENT – µA
100000
Figure 16. CMP401/CMP402 Delta
Output Swing from Power Supplies vs.
Load Current
2.0
2.0
0
–75 –50 –25
1
2.0
DIGITAL DC SUPPLY CURRENT – mA
1
Figure 14. CMP401/CMP402 Slew Rate
vs. Positive Supply Voltage
INPUT OFFSET VOLTAGE – mV
50
Figure 13. CMP402 Propagation Delay
vs. Capacitive Load
DELTA OUTPUT SWING – mV
TA = +25°C
800
–SLEW
+VAN = +VDIG
–VAN = 0V TO –5V
RS ≤ 50Ω, CL = 15pF
70
PROPAGATION DELAY – ns
SLEWRATE – V/µs
1000
+PDELAY
60
1000
+VAN = +VDIG
–VAN = 0V TO –5V
RS ≤ 50Ω, CL = 15pF
70
0
500
Figure 12. CMP401 Propagation Delay
vs. Capacitive Load
1200
0
PROPAGATION DELAY – ns
–VAN = 0V TO –5V
RS ≤ 50Ω, CL = 15pF
90
90
45
PROPAGATION DELAY – ns
PROPAGATION DELAY – ns
100
+5V
1.2
0.8
0.4
+3V
0.0
–75 –50 –25
0
25 50 75 100 125 150
TEMPERATURE – °C
Figure 18. CMP401 Digital Supply
Current vs. Temperature
–6–
1.6
+5V
1.2
0.8
0.4
+3V
0.0
–75 –50 –25
0
25 50 75 100 125 150
TEMPERATURE – °C
Figure 19. CMP402 Digital Supply
Current vs. Temperature
REV. 0
CMP401/CMP402
0.8
+125°C
0.4
2
3
4
DIGITAL SUPPLY VOLTAGE – V
+5V
+3V
1.0
0.8
0.6
0 25 50 75 100 125 150
TEMPERATURE – °C
Figure 23. CMP402 Analog Supply
Current vs. Temperature
ANALOG SUPPLY CURRENT – mA
ANALOG SUPPLY CURRENT – mA
1
2
3
4
DIGITAL SUPPLY VOLTAGE – V
±5V
+5V
5.0
+3V
4.0
3.0
0 25 50 75 100 125 150
TEMPERATURE – °C
Figure 22. CMP401 Analog Supply
Current vs. Temperature
1.4
6.0
+125°C
5.0
+25°C
–40°C
4.0
3.0
2.0
6.0
2.0
–75 –50 –25
5
7.0
±5V
REV. 0
0.4
Figure 21. CMP402 Digital Supply
Current vs. Digital Supply Voltage
1.4
0.4
–75 –50 –25
+125°C
0.8
0.0
5
Figure 20. CMP401 Digital Supply
Current vs. Digital Supply Voltage
1.2
+25°C
1
2
3
4
5
6
7
8
9
ANALOG SUPPLY VOLTAGE – V
10
Figure 24. CMP401 Analog Supply
Current vs. Analog Supply Voltage
–7–
ANALOG SUPPLY CURRENT – mA
1
–40°C
1.2
ANALOG SUPPLY CURRENT – mA
+25°C
DIGITAL SUPPLY CURRENT – mA
DIGITAL SUPPLY CURRENT – mA
–40°C
1.2
0.0
7.0
1.6
1.6
+125°C
1.2
+25°C
1.0
–40°C
0.8
0.6
0.4
1
2
3
4
5
6
7
8
9
ANALOG SUPPLY VOLTAGE – V
10
Figure 25. CMP402 Analog Supply
Current vs. Analog Supply Voltage
CMP401/CMP402
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Pin Epoxy DIP
(N-16)
16
9
1
8
0.280 (7.11)
0.240 (6.10)
0.325 (8.25)
0.300 (7.62) 0.195 (4.95)
0.115 (2.93)
0.060 (1.52)
0.015 (0.38)
PIN 1
0.210 (5.33)
MAX
0.130
(3.30)
MIN
0.160 (4.06)
0.115 (2.93)
0.022 (0.558)
0.014 (0.356)
0.015 (0.381)
0.008 (0.204)
0.070 (1.77) SEATING
0.045 (1.15) PLANE
0.100
(2.54)
BSC
C2067–18–10/95
0.840 (21.33)
0.745 (18.93)
16-Pin Narrow-SOIC
(R-16A)
16
9
0.1574 (4.00)
0.1497 (3.80)
PIN 1
0.2440 (6.20)
0.2284 (5.80)
8
1
0.3937 (10.00)
0.3859 (9.80)
0.0196 (0.50)
x 45 °
0.0099 (0.25)
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
0.0500 (1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
8°
0°
0.0099 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
16-Lead TSSOP
(RU-16)
0.201 (5.10)
0.193 (4.90)
9
0.256 (6.50)
0.246 (6.25)
0.177 (4.50)
0.169 (4.30)
16
1
PRINTED IN U.S.A.
8
PIN 1
0.006 (0.15)
0.002 (0.05)
SEATING
PLANE
0.0433
(1.10)
MAX
0.0256
(0.65)
BSC
0.0118 (0.30)
0.0075 (0.19)
0.0079 (0.20)
0.0035 (0.090)
–8–
8°
0°
0.028 (0.70)
0.020 (0.50)
REV. 0