AD ADG1408

5Ω Μax Ron, 4-/8-Channel
±15V/12V/±5V Multiplexers
ADG1408/ADG1409
Preliminary Technical Data
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
5Ω Max On Resistance
0.5Ω Max On Resistance Flatness
33 V Supply Maximum Ratings
Fully specified at ±15V/12V/±5V
3V Logic Compatible Inputs
Rail-to-Rail Operation
Break-Before-Make Switching Action
16-Lead TSSOP Packages
Typical Power Consumption (< 0.03 µW)
ADG1408
ADG1409
S1
S1A
DA
S4A
D
S1B
DB
S4B
S8
APPLICATIONS
1 OF 8
DECODER
Relay Replacement
Audio and Video Routing
Automatic Test Equipment
Data Acquisition Systems
Battery-Powered Systems
Sample-and-Hold Systems
Communication Systems
GENERAL DESCRIPTION
The ADG1408 and ADG1409 are monolithic CMOS analog
multiplexers comprising eight single channels and four
differential channels, respectively. The ADG1408 switches one
of eight inputs to a common output as determined by the 3-bit
binary address lines A0, A1, and A2. The ADG1409 switches
one of four differential inputs to a common differential output
as determined by the 2-bit binary address lines A0 and A1. An
EN input on both devices is used to enable or disable the device.
When disabled, all channels are switched OFF.
A0 A1
A2 EN
1 OF 4
DECODER
A0
A1
EN
SWITCHES SHOWN FOR A “1” LOGIC INPUT
PRODUCT HIGHLIGHTS
1.
5Ω Max On Resistance
2.
0.5Ω Max On Resistance Flatness
3.
3V Logic Compatible Digital Input
VIH = 2.0V, VIL = 0.8V
4.
16 Lead TSSOP package
The ADG1408/ADG1409 are designed on an enhanced CMOS
process that provides low power dissipation yet gives high
switching speed and low on resistance. Each channel conducts
equally well in both directions when ON and has an input
signal range that extends to the supplies. In the OFF condition,
signal levels up to the supplies are blocked. All channels exhibit
break-before- make switching action, preventing momentary
shorting when switching channels. Inherent in the design is low
charge injection for minimum transients when switching the
digital inputs.
RevPrA
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004
2003 Analog Devices, Inc. All rights reserved.
©
ADG1408/ADG1409
Preliminary Technical Data
TABLE OF CONTENTS
ADG1408/ADG1409—Specifications ........................................... 3
Terminology .......................................................................................9
Dual Supply ................................................................................... 3
Typical Performance Characteristics ........................................... 10
Single Supply ................................................................................. 4
Test Circuits..................................................................................... 12
Absolute Maximum Ratings............................................................ 7
Outline Dimensions ....................................................................... 15
ESD Caution.................................................................................. 7
Ordering Guide............................................................................... 16
Pin Configurations (TSSOP) .......................................................... 8
REVISION HISTORY
RevPr. A | Page 2 of 16
Preliminary Technical Data
ADG1408/ADG1409
ADG1408/ADG1409—SPECIFICATIONS
DUAL SUPPLY1
Table 1. VDD = +15 V ± 10%, VSS = –15 V ± 10%, GND = 0 V, unless otherwise noted.
Parameter
ANALOG SWITCH
Analog Signal Range
RON
+25ºC
−40ºC to
+85ºC
−40ºC to
+125ºC
VSS to VDD
3
4
5
5
RON Flatness
∆RON
0.5
0.5
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
Test Conditions/Comments
VD = ±10 V, IS = −10 mA
VD = +10 V, −10 V
VD = +10 V, −10 V
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
ADG1408
ADG1409
Channel ON Leakage ID, IS (ON)
ADG1408
ADG1409
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
tTRANSITION
±0.01
nA typ
VD = ±10 V, VS = −10 V;
Test Circuit 2
±0.5
VD = ±10 V; VS = ±10 V;
Test Circuit 3
±0.5
±2.5
±50
nA max
±1
±1
±100
±50
±100
±50
nA max
nA max
±1
±1
±100
±50
±100
±50
nA max
nA max
2.0
0.8
2.0
0.8
V min
V max
±0.5
µA max
µA max
pF typ
VIN= VINL or VINH
±0.5
120
120
ns typ
250
250
ns max
10
1
125
225
65
150
ns typ
ns min
ns typ
ns max
ns typ
ns max
20
pC typ
RL = 300 Ω, CL = 35 pF;
VS1 = ±10 V, VS8 = ±10 V;
Test Circuit 5
RL = 300 Ω, CL = 35 pF;
VS = 10 V; Test Circuit 6
RL = 300 Ω CL = 35 pF;
VS = 5 V; Test Circuit 7
RL = 300 Ω, CL = 35 pF;
VS = 5 V; Test Circuit 7
VS = 0 V, RS = 0 Ω, CL = 10 nF; Test Circuit
8
RL = 1 kΩ, f = 100 kHz;
VEN = 0 V; Test Circuit 9
RL = 1 kΩ, f = 100 kHz;
Test Circuit 10
±0.005
5
80
VS = VD = ±10 V;
Test Circuit 4
TBBM
10
10
tON(EN)
tOFF(EN)
85
150
40
125
225
65
150
Charge Injection
20
OFF Isolation
75
dB typ
Channel-to-Channel Crosstalk
85
dB typ
Total Harmonic Distortion, THD +
N
0.002
% typ
RL = 600 Ω, 5Vrms; f=20Hz to 20kHz
-3dB Bandwidth
50
MHz
typ
RL = 300 Ω, CL = 5 pF; Test Circuit 10
CS (OFF)
CD (OFF)
15
pF typ
Test Circuit 10
f = 1 MHz
f = 1 MHz
Rev. B | Page 3 of 16
ADG1408/ADG1409
Parameter
ADG1408
ADG1409
CD, CS(ON)
ADG1408
ADG1409
POWER REQUIREMENTS
IDD
Preliminary Technical Data
+25ºC
100
50
−40ºC to
+85ºC
−40ºC to
+125ºC
pF typ
pF typ
0.001
µA typ
µA max
µA typ
µA max
µA typ
µA max
µA typ
µA max
µA typ
µA max
5
150
300
ISS
IGND
IGND
1
2
Test Conditions/Comments
f = 1 MHz
150
75
5
IDD
Unit
pF typ
pF typ
0.001
5
5
5
5
5
300
0.001
150
VDD = +16.5V, VSS = -16.5V
Digital Inputs= 0 V or VDD
Digital Inputs= 5 V
Digital Inputs= 0 V or VDD
Digital Inputs= 0 V or VDD
Digital Inputs= 5 V
Temperature ranges are as follows: B Version: −40°C to +85°C; T Version: −40°C to +125°C.
Guaranteed by design, not subject to production test.
SINGLE SUPPLY1
Table 2. VDD = 12 V V ± 10%,, VSS = 0 V, GND = 0 V, unless otherwise noted.
Parameter
ANALOG SWITCH
Analog Signal Range
RON
+25ºC
6
7
−40ºC to +85ºC
8
−40ºC to +125ºC
Unit
0 to VDD
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
9
RON Flatness
∆RON
Channel ON Leakage ID, IS (ON)
ADG1408
ADG1409
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
tTRANSITION
TBBM
1.5
0.5
±1
±1
Test Conditions/Comments
VD = 3 V, 10 V, IS = –1 mA
VD = 3 V, 10 V, IS = –1 mA
VD = 3 V, 10 V, IS = –1 mA
VS = VD = 8 V/0 V;
Test Circuit 4
±100
±50
±100
±50
nA max
nA max
2.0
0.8
2.0
0.8
V min
V max
±10
±10
8
µA max
pF typ
VIN = 0 or VDD
f = 1 MHz
130
ns typ
RL = 300 Ω, CL = 35 pF;
VS1 = 8 V/0 V, VS8 = 0 V/8 V;
Test Circuit 5
RL = 300 Ω, CL = 35 pF;
VS = 5 V; Test Circuit 6
RL = 300 Ω CL = 35 pF;
VS = 5 V; Test Circuit 7
RL = 300 Ω, CL = 35 pF;
VS = 5 V; Test Circuit 7
VS = 0 V, RS = 0Ω, CL = 10 nF;
10
tON (EN)
140
ns typ
ns min
ns typ
tOFF (EN)
60
ns typ
Charge Injection
5
pC typ
1
RevPr. A | Page 4 of 16
Preliminary Technical Data
Parameter
+25ºC
ADG1408/ADG1409
−40ºC to +85ºC
−40ºC to +125ºC
OFF Isolation
–75
dB typ
Channel-to-Channel Crosstalk
85
dB typ
0.002
50
15
% typ
MHz typ
pF typ
100
50
pF typ
pF typ
150
75
pF typ
pF typ
Total Harmonic Distortion, THD + N
-3dB Bandwidth
CS (OFF)
CD (OFF)
ADG1408
ADG1409
CD, CS (ON)
ADG1408
ADG1409
POWER REQUIREMENTS
IDD
1
5
1
5
150
300
2
Test Conditions/Comments
Test Circuit 8
RL = 1 kΩ f = 100 kHz;
VEN = 0 V; Test Circuit 9
RL = 1 kΩ, f = 100 kHz;
Test Circuit 10
RL = 600 Ω, 5Vrms; f=20Hz to 20kHz
RL = 300 Ω, CL = 5 pF; Test Circuit 10
f = 1 MHz
f = 1 MHz
f = 1 MHz
IDD
1
Unit
µA typ
µA max
µA typ
µA max
VDD = 13.2V
Digital Inputs= 0 V or VDD
Digital Inputs= 5
Temperature ranges are as follows: B Version: –40°C to +85° ; T Version: –55°C to +125°.
Guaranteed by design, not subject to production test.
DUAL SUPPLY1
Table 3. VDD = +5 V ± 10%, VSS = –5 V ± 10%, GND = 0 V, unless otherwise noted.
Parameter
ANALOG SWITCH
Analog Signal Range
RON
∆RON
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
ADG1408
ADG1409
Channel ON Leakage ID, IS (ON)
ADG1408
ADG1409
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
tTRANSITION
+25ºC
−40ºC to
+85ºC
−40ºC to
+125ºC
VSS to VDD
6
7
0.5
8
10
±0.01
Unit
V
Ω typ
Ω max
Ω max
nA typ
Test Conditions/Comments
VD = ±3.3 V, IS = −10 mA
VD = +3.3 V, −3.3 V
VD = ±3.3 V, VS = −3.3 V;
Test Circuit 2
±0.5
±2.5
±50
nA max
±1
±1
±100
±50
±100
±50
nA max
nA max
±1
±1
±100
±50
±100
±50
nA max
nA max
2.0
0.8
2.0
0.8
V min
V max
±0.5
µA max
µA max
pF typ
VIN= VINL or VINH
±0.5
120
120
ns typ
RL = 300 Ω, CL = 35 pF;
±0.005
5
Rev. B | Page 5 of 16
VD = ±3.3. V; VS = ±3.3 V;
Test Circuit 3
VS = VD = ±3.3 V;
Test Circuit 4
ADG1408/ADG1409
Parameter
Preliminary Technical Data
+25ºC
−40ºC to
+85ºC
−40ºC to
+125ºC
Unit
250
250
ns max
125
225
65
150
1
125
225
65
150
ns typ
ns min
ns typ
ns max
ns typ
ns max
TBBM
tON(EN)
85
150
tOFF(EN)
Charge Injection
20
OFF Isolation
−75
−75
dB typ
Channel-to-Channel Crosstalk
85
85
dB typ
Total Harmonic Distortion, THD +
N
0.002
% typ
RL = 600 Ω, 5Vrms; f=20Hz to 20kHz
-3dB Bandwidth
50
MHz
typ
RL = 300 Ω, CL = 5 pF; Test Circuit 10
15
pF typ
Test Circuit 10
f = 1 MHz
f = 1 MHz
100
50
pF typ
pF typ
150
75
pF typ
pF typ
0.001
µA typ
µA max
µA typ
µA max
µA typ
µA max
µA typ
µA max
µA typ
µA max
CS (OFF)
CD (OFF)
ADG1408
ADG1409
CD, CS(ON)
ADG1408
ADG1409
POWER REQUIREMENTS
IDD
pC typ
f = 1 MHz
5
IDD
5
150
300
ISS
0.001
IGND
0.001
IGND
1
2
Test Conditions/Comments
VS1 = ±10 V, VS8 = ±10 V;
Test Circuit 5
RL = 300 Ω, CL = 35 pF;
VS = 5 V; Test Circuit 6
RL = 300 Ω CL = 35 pF;
VS = 5 V; Test Circuit 7
RL = 300 Ω, CL = 35 pF;
VS = 5 V; Test Circuit 7
VS = 0 V, RS = 0 Ω, CL = 10 nF; Test Circuit
8
RL = 1 kΩ, f = 100 kHz;
VEN = 0 V; Test Circuit 9
RL = 1 kΩ, f = 100 kHz;
Test Circuit 10
5
5
5
5
5
300
150
Temperature ranges are as follows: B Version: −40°C to +85°C; Y Version: −40°C to +125°C.
Guaranteed by design, not subject to production test.
RevPr. A | Page 6 of 16
VDD = +16.5V, VSS = -16.5V
Digital Inputs= 0 V or VDD
Digital Inputs= 5 V
Digital Inputs= 0 V or VDD
Digital Inputs= 0 V or VDD
Digital Inputs= 5 V
Preliminary Technical Data
ADG1408/ADG1409
ABSOLUTE MAXIMUM RATINGS1
Table 4. Absolute Maximum Ratings (TA = 25°C, unless
otherwise noted.)
Parameter
VDD to VSS
VDD to GND
VSS to GND
Analog, Digital Inputs2
Continuous Current, S or D
Peak Current, S or D
(Pulsed at 1 ms, 10%
Duty Cycle max)
Operating Temperature
Range
Industrial (B Version)
Automotive (Y Version)
Storage Temperature
Range
Junction Temperature
Rating
36 V
−0.3 V to +25 V
+0.3 V to −25 V
VSS − 0.3 V to VDD + 0.3V or 20 mA,
Whichever Occurs First
30 mA
100 mA
−40° C to +85°C
–40° C to +125°C
–65° C to +150°C
Parameter
TSSOP Package, Power Dissipation
θJA, Thermal Impedance
θJC, Thermal Impedance
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
1
Rating
450 mW
150.4°C/W
50°C/W
215°C
220°C
Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those listed
in the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device
reliability. Only one absolute maximum rating may be applied at any one
time.
2
Overvoltages at A, EN, S, or D will be clamped by internal diodes. Current
should be limited to the maximum ratings given.
150°C
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. B | Page 7 of 16
ADG1408/ADG1409
Preliminary Technical Data
PIN CONFIGURATIONS - TSSOP
A0 1
16 A1
A0 1
16 A1
EN 2
15 A2
EN 2
15 GND
14 GND
VSS 3
13 VDD
TOP VIEW
(Not to Scale)
12 S5
S2 5
S1A 4
VSS 3
S1 4
ADG1408
ADG1409
14 VDD
13 S1B
TOP VIEW
S2A 5 (Not to Scale) 12 S2B
S3 6
11 S6
S3A 6
11 S3B
S4 7
10 S7
S4A 7
10 S4B
D 8
9 S8
DA 8
9 DB
Figure 1. Pin Configurations - TSSOP
Table 5. ADG408 Truth Table
A2
X
0
0
0
0
1
1
1
1
A1
X
0
0
1
1
0
0
1
1
A0
X
0
1
0
1
0
1
0
1
EN
0
1
1
1
1
1
1
1
1
ON SWITCH
NONE
1
2
3
4
5
6
7
8
Table 6. ADG409 Truth Table
Al
X
0
0
1
1
RevPr. A | Page 8 of 16
A0
X
0
1
0
1
EN
0
1
1
1
1
ON SWITCH
PAIR
NONE
1
2
3
4
Preliminary Technical Data
ADG1408/ADG1409
TERMINOLOGY
VDD
VSS
GND
RON
∆RON
IS (OFF)
ID (OFF)
ID, IS (ON)
VD (VS)
CS (OFF)
CD (OFF)
CD, CS (ON)
CIN
tON (EN)
tOFF (EN)
tTRANSITION
tOPEN
VINL
VINH
IINL (IINH)
IDD
ISS
Off Isolation
Charge Injection
Bandwidth
On Response
THD + N
Most positive power supply potential.
Most negative power supply potential in dual supplies. In single supply applications, it may be connected to ground.
Ground (0 V) reference.
Ohmic resistance between D and S.
Difference between the RON of any two channels.
Source leakage current when the switch is off.
Drain leakage current when the switch is off.
Channel leakage current when the switch is on.
Analog voltage on terminals D, S.
Channel input capacitance for OFF condition.
Channel output capacitance for OFF condition.
ON switch capacitance.
Digital input capacitance.
Delay time between the 50% and 90% points of the digital input and switch ON condition.
Delay time between the 50% and 90% points of the digital input and switch OFF condition.
Delay time between the 50% and 90% points of the digital inputs and the switch ON condition when switching from
one address state to another.
OFF time measured between the 80% point of both switches when switching from one address state to another.
Maximum input voltage for Logic 0.
Minimum input voltage for Logic 1.
Input current of the digital input.
Positive supply current.
Negative supply current.
A measure of unwanted signal coupling through an OFF channel.
A measure of the glitch impulse transferred from the digital input to the analog output during switching.
The frequency at which the output is attenuated by 3dBs.
The Frequency response of the “ON” switch.
The ratio of the harmonic amplitude plus noise of the signal to the fundamental.
Rev. B | Page 9 of 16
ADG1408/ADG1409
Preliminary Technical Data
TYPICAL PERFORMANCE CHARACTERISTICS
TBD
TBD
TPC 1. On Resistance as a Function of VD(VS) for for Single Supply
TPC 4. On Resistance as a Functionof VD(VS) for Different Temperatures,
Single Supply
TBD
TBD
TPC 2. On Resistance as a Function of VD(VS) for Dual Supply
TPC 5. On Resistance as a Functionof VD(VS) for Different Temperatures,
Dual Supply
TBD
TBD
TPC 3. On Resistance as a Functionof VD(VS) for Different Temperatures,
Single Supply
TPC 6. Leakage Currents as a Function of VD (VS)
RevPr. A | Page 10 of 16
Preliminary Technical Data
ADG1408/ADG1409
TBD
TBD
TPC 10. TON/TOFF Times vs. Temperature)
TPC 7. Leakage Currents as a function of Temperature
TBD
TBD
TPC 8 Supply Currents vs. Input Switching Frequency
TPC 11 Off Isolation vs. Frequency
TBD
TBD
TPC 12 Crosstalk vs. Frequency
TPC 9 . Charge Injection vs. Source Voltage
TBD
TPC 13. On Response vs. Frequency
Rev. B | Page 11 of 16
ADG1408/ADG1409
Preliminary Technical Data
TBD
TPC 14. THD + N vs. Frequency
TEST CIRCUITS
Figure 2. Test Circuit 1. On Resistance
Figure 4. Test Circuit 3. ID (OFF)
Figure 3. Test Circuit 2. IS (OFF)
Figure 5. Test Circuit 4. ID (ON)
RevPr. A | Page 12 of 16
Preliminary Technical Data
ADG1408/ADG1409
Figure 6. Test Circuit 5. Switching Time of Multiplexer, tTRANSlTlON
Figure 7. Test Circuit 6. Break-Before-Make Delay, tOPEN
Figure 8. Test Circuit 7. Enable Delay, tON (EN), tOFF (EN)
Rev. B | Page 13 of 16
ADG1408/ADG1409
Preliminary Technical Data
Figure 9. Test Circuit 8. Charge Injection
Figure 10. Test Circuit 9. OFF Isolation
Figure 11. Test Circuit 10. Channel-to-Channel Crosstalk
RevPr. A | Page 14 of 16
Preliminary Technical Data
ADG1408/ADG1409
OUTLINE DIMENSIONS
Figure 12. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16)
Rev. B | Page 15 of 16
ADG1408/ADG1409
Preliminary Technical Data
ORDERING GUIDE
Temperature Range
−40°C to +125°C
Package Option1
RU-16
ADG1409BRU
−40°C to +125°C
RU-16
1
PR04861-0-4/04(PrA)
Model
ADG1408BRU
RU = Thin Shrink Small Outline Package (TSSOP)
© 2003 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective companies.
Printed in the U.S.A.
PR04861-0-4/04(PrA)
RevPr. A | Page 16 of 16