FAIRCHILD MM74C154

Revised January 1999
MM74C154
4-Line to 16-Line Decoder/Demultiplexer
General Description
Features
The MM74C154 one of sixteen decoder is a monolithic
complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors.
The device is provided with two strobe inputs, both of
which must be in the logical “0” state for normal operation.
If either strobe input is in the logical “1” state, all 16 outputs
will go to the logical “1” state.
■ Supply voltage range:
To use the product as a demultiplexer, one of the strobe
inputs serves as a data input terminal, while the other
strobe input must be maintained in the logical “0” state. The
information will then be transmitted to the selected output
as determined by the 4-line input address.
• Automotive
3V to 15V
■ Tenth power TTL compatible:
Drive 2 LPTTL loads
■ High noise margin: 1V guaranteed
■ High noise immunity:
0.45 VCC (typ.)
Applications
• Data terminals
• Instrumentation
• Medical electronics
• Alarm systems
• Industrial electronics
• Remote metering
• Computers
Ordering Code:
Order Number
Package Number
Package Description
MM74C154WM
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
MM74C154N
N24A
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP and SOIC
Top View
© 1999 Fairchild Semiconductor Corporation
DS005893.prf
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MM74C154 4-Line to 16-Line Decoder/Demultiplexer
October 1987
MM74C154
Logic Diagram
Truth Table
Inputs
Outputs
G1
G2
D
C
B
A
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
H
L
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
H
L
L
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
L
L
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
L
L
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
L
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
L
H
L
L
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
L
L
H
L
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
L
L
H
L
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
L
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
L
L
H
H
L
L
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
L
L
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
L
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
H
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X = “Don't Care” Condition
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2
Operating VCC Range
−0.3V to VCC + 0.3V
Voltage at Any Pin
Operating Temperature Range
Storage Temperature Range
(Soldering, 10 seconds)
−40°C to +85°C
−65°C to +150°C
Maximum VCC Voltage
Power Dissipation
700 mW
Small Outline
500 mW
260°C
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides
conditions for actual device operation.
18V
Dual-In-Line
3V to 15V
Lead Temperature
DC Electrical Characteristics
Min/max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
VIN(1)
VIN(0)
VOUT(1)
VOUT(0)
Logical “1” Input Voltage
Logical “0” Input Voltage
Logical “1” Output Voltage
Logical “0” Output Voltage
VCC = 5.0V
3.5
V
VCC = 10V
8.0
V
VCC = 5.0V
1.5
V
VCC = 10V
2.0
V
VCC = 5.0V, IO = −10µA
4.5
V
VCC = 10V, IO = −10 µA
9.0
V
VCC = 5.0V, IO = 10µA
0.5
V
VCC = 10V, IO = 10 µA
1.0
V
1.0
µA
IIN(1)
Logical “1” Input Current
VCC = 15V, VIN = 15V
IIN(0)
Logical “0” Input Current
VCC = 15V, VIN = 0V
ICC
Supply Current
VCC = 15V
0.005
−1.0
−0.005
0.05
µA
300
µA
0.8
V
CMOS TO LPTTL INTERFACE
VIN(1)
Logical “1” Input Voltage
VCC = 4.75V
VIN(0)
Logical “0” Input Voltage
VCC = 4.75V
VCC − 1.5
VOUT(1)
Logical “1” Output Voltage
VCC = 4.75V, IO = −100 µA
VOUT(0)
Logical “0” Output Voltage
VCC = 4.75V, IO = 360 µA
V
2.4
V
0.4
V
OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current)
ISOURCE
Output Source Current
VCC = 5.0V, VIN(0) = 0V
−1.75
mA
−8.0
mA
1.75
mA
8.0
mA
TA = 25°C, VOUT = 0V
ISOURCE
Output Source Current
VCC = 10V, VIN(0) = 0V
TA = 25°C, VOUT = 0V
ISINK
Output Sink Current
VCC = 5.0V, VIN(1) = 5.0V
TA = 25°C, VOUT = VCC
ISINK
Output Sink Current
VCC = 10V, VIN(1) = 10V
TA = 25°C, VOUT = VCC
3
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MM74C154
Absolute Maximum Ratings(Note 1)
MM74C154
AC Electrical Characteristics
(Note 2)
TA = 25°C, CL = 50 pF, unless otherwise noted
Symbol
tpd0
tpd0
tpd0
tpd1
Typ
Max
Propagation Delay to a Logical
Parameter
VCC = 5.0V
Conditions
Min
275
400
Units
ns
“0” from Any Input to Any Output
VCC = 10V
100
200
ns
Propagation Delay to a Logical
VCC = 5.0V
275
400
ns
“0” from G1 or G2 to Any Output
VCC = 10V
100
200
ns
Propagation Delay to a Logical
VCC = 5.0V
265
400
ns
“0” from Any Input to Any Output
VCC = 10V
100
200
ns
Propagation Delay to a Logical
VCC = 5.0V
265
400
ns
“1” from G1 or G2 to Any Output
VCC = 10V
100
200
ns
CIN
Input Capacitance
(Note 3)
5.0
pF
CPD
Power Dissipation Capacitance
(Note 4)
60
pF
Note 2: AC Parameters are guaranteed by DC correlated testing.
Note 3: Capacitance is guaranteed by periodic testing.
Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note
AN-90.
Switching Time Waveforms
tr = tf = 20 ns
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4
MM74C154
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
Package Number M24B
5
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MM74C154 4-Line to 16-Line Decoder/Demultiplexer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600” Wide
Package Number N24A
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
1. Life support devices or systems are devices or systems
device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the
sonably expected to cause the failure of the life support
body, or (b) support or sustain life, and (c) whose failure
device or system, or to affect its safety or effectiveness.
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
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user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.