FAIRCHILD FDS4885C

FDS4885C
Dual N & P-Channel PowerTrench MOSFET
General Description
Features
These dual N- and P-Channel enhancement mode
power field effect transistors are produced using
Fairchild Semiconductor’s advanced PowerTrench
process that has been especially tailored to minimize
on-state resistance and yet maintain superior switching
performance.
•
RDS(on) = 22mΩ @ VGS = 10V
RDS(on) = 35mΩ @ VGS = 7V
•
Q2:
P-Channel
–6A, –40V
RDS(on) = 31mΩ @ VGS = –10V
RDS(on) = 42mΩ @ VGS = –4.5V
Applications
Synchronous rectifier
Backlight inverter stage
•
Fast switching speed
•
High power and handling capability in a widely
used surface mount package
DD2
DD2
D1
D
N-Channel
7.5A, 40V
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
•
•
Q1:
Q2
5
DD1
4
6
3
Q1
G2
S2 G
SO-8
Pin 1 SO-8
G1
S1 S
Drain-Source Voltage
Gate-Source Voltage
ID
Drain Current
(Note 1a)
Q2
Units
40
40
±20
7.5
20
±20
–6
–20
V
V
A
2
1.6
1
0.9
–55 to +150
°C
(Note 1a)
78
°C/W
(Note 1)
40
(Note 1a)
(Note 1b)
(Note 1c)
TJ, TSTG
1
Q1
- Continuous
- Pulsed
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
PD
8
TA = 25°C unless otherwise noted
Parameter
VDSS
VGSS
2
S
Absolute Maximum Ratings
Symbol
S
7
Operating and Storage Junction Temperature Range
W
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDS4885C
FDS4885C
13”
12mm
2500 units
2005 Fairchild Semiconductor Corporation
FDS4885C Rev D(W)
FDS4885C
January 2005
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Type Min Typ Max Units
Off Characteristics
BVDSS
VGS = 0 V,
ID = 250 µA
VGS = 0 V,
ID = –250 µA
ID = 250 µA, Referenced to 25°C
ID = –250 µA, Referenced to 25°C
VDS = 32 V,
VGS = 0 V
VDS = –32 V,
VGS = 0 V
VGS = 20 V,
VDS = 0 V
IGSSF
Drain-Source Breakdown
Voltage
Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain
Current
Gate-Body Leakage, Forward
IGSSR
Gate-Body Leakage, Reverse VGS = –20 V,
∆BVDSS
∆TJ
IDSS
On Characteristics
40
–40
V
40
–30
mV/°C
1
–1
100
µA
–100
nA
4
–1.6
–9
5
17
27
26
5
–3
V
31
42
47
All
nA
(Note 2)
VGS(th)
Gate Threshold Voltage
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain-Source
On-Resistance
gFS
VDS = 0 V
Q1
Q2
Q1
Q2
Q1
Q2
All
Forward Transconductance
VDS = VGS,
ID = 250 µA
VDS = VGS,
ID = –250 µA
ID = 250 µA, Referenced to 25°C
ID = –250 µA, Referenced to 25°C
VGS = 10 V,
ID = 7.5 A
VGS = 7 V,
ID = 6.5 A
VGS = 10 V, ID = 7.5 A, TJ = 125°C
VGS = –10 V,
ID = –6 A
VGS = –4.5 V,
ID = –5.3 A
VGS = –10 V, ID = –6 A, TJ = 125°C
VDS = 10 V,
ID = 7.5 A
VDS = –10 V,
ID =–6 A
Q1
Q2
Q1
Q2
Q1
Q1
Q2
26
34
37
14
19
Q1
VDS = 20 V, VGS = 0 V, f = 1.0 MHz
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
900
1560
200
215
100
110
2
9
Q2
2
–1
mV/°C
22
35
36
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Q2
Reverse Transfer Capacitance VDS = –20 V, VGS = 0 V, f = 1.0 MHz
RG
Gate Resistance
VGS = 15 mV,
f = 1.0 MHz
pF
pF
pF
Ω
FDS4885C Rev D(W)
FDS4885C
Electrical Characteristics
Symbol
Parameter
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
(continued)
TA = 25°C unless otherwise noted
Test Conditions
Type Min
Typ
Max Units
(Note 2)
Gate-Drain Charge
Q1
VDD = 20 V, ID = 1 A,
VGS = 10V, RGEN = 6 Ω
Q2
VDD = –20 V, ID = –1 A,
VGS = –10V, RGEN = 6 Ω
Q1
VDS = 20 V, ID = 7.5 A, VGS = 10 V
Q2
VDS = –20 V, ID = –6 A,VGS = –10 V
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
26
11
36
14
45
71
33
30
15
29
5
4
4.6
5
42
20
58
25
72
114
53
48
21
41
ns
ns
ns
ns
nC
nC
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
VSD
Drain-Source Diode Forward
Voltage
Diode Reverse Recovery
Time
Diode Reverse Recovery
Charge
trr
Qrr
VGS = 0 V, IS = 1.3 A
VGS = 0 V, IS = –1.3 A
Q1
IF = 7.5 A, diF/dt = 100 A/µs
Q2
IF = –6 A, diF/dt = 100 A/µs
(Note 2)
(Note 2)
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
0.7
–0.7
26
26
18
13
1.3
–1.3
1.2
–1.2
A
V
nS
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 78°/W when
mounted on a
0.5 in2 pad of 2 oz
copper
b) 125°/W when
mounted on a .02 in2
pad of 2 oz copper
c) 135°/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS4885C Rev D(W)
FDS4885C
Electrical Characteristics
FDS4885C
Typical Characteristics: Q1 (N-Channel)
4.2
20
ID, DRAIN CURRENT (A)
16
8.0V
7.0V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS = 10V
6.5V
12
6.0V
8
4
5.5V
0
3.4
VGS = 6.0V
3
2.6
2.2
6.5V
1.8
7.0V
1.4
8.0V
10V
1
0.6
0
0.25
0.5
0.75
1
1.25
VDS, DRAIN TO SOURCE VOLTAGE (V)
1.5
0
Figure 1. On-Region Characteristics.
4
8
12
ID, DRAIN CURRENT (A)
16
20
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.8
0.075
ID = 7.5A
VGS = 10V
ID = 3.8A
1.6
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
3.8
1.4
1.2
1
0.8
0.065
0.055
0.045
TA = 125oC
0.035
0.025
TA = 25oC
0.6
0.015
-50
-25
0
25
50
75
100
o
TJ, JUNCTION TEMPERATURE ( C)
125
150
5
Figure 3. On-Resistance Variation with
Temperature.
50
IS, REVERSE DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
10
100
TA = -55oC
40
7
8
9
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
25oC
VDS = 5V
45
6
125oC
35
30
25
20
15
10
5
VGS = 0V
10
1
TA = 125oC
0.1
25oC
0.01
-55oC
0.001
0.0001
0
3
4
5
6
7
VGS, GATE TO SOURCE VOLTAGE (V)
8
Figure 5. Transfer Characteristics.
9
0
0.2
0.4
0.6
0.8
1
VSD, BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS4885C Rev D(W)
FDS4885C
Typical Characteristics: Q1 (N-Channel)
14
1200
VDS = 10V
20V
f = 1 MHz
VGS = 0 V
Ciss
12
1000
10
CAPACITANCE (pF)
VGS, GATE-SOURCE VOLTAGE (V)
ID = 7.5A
30V
8
6
4
800
600
Coss
400
2
200
0
0
Crss
0
4
8
12
16
20
24
0
5
10
15
20
25
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
40
Figure 8. Capacitance Characteristics.
50
P(pk), PEAK TRANSIENT POWER (W)
100
RDS(ON) LIMIT
100µs
ID, DRAIN CURRENT (A)
35
10
1ms
10ms
100ms
1
1s
10s
DC
VGS = 10.0V
SINGLE PULSE
o
RθJA = 135 C/W
0.1
TA = 25oC
0.01
0.1
1
10
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
100
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
40
30
20
10
0
0.001
0.01
0.1
1
t1, TIME (sec)
10
100
1000
Figure 10. Single Pulse Maximum
Power Dissipation.
FDS4885C Rev D(W)
FDS4885C
Typical Characteristics: Q2 (P-Channel)
30
2.6
-4.5V
-4.0V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS = -10V
-ID, DRAIN CURRENT (A)
25
-6.0V
-3.5V
20
15
-3.0V
10
5
0
2.4
VGS = - 3.0V
2.2
2
1.8
-3.5V
1.6
-4.0V
-4.5V
1.4
-6.0V
1.2
-10V
1
0.8
0
0.5
1
1.5
2
2.5
3
3.5
0
5
10
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 11. On-Region Characteristics.
25
30
0.1
ID = -3A
ID = -6A
VGS = - 10V
1.5
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
20
Figure 12. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
1.4
1.3
1.2
1.1
1
0.9
0.8
0.09
0.08
0.07
0.06
0.04
0.03
0.6
0.02
-50
-25
0
25
50
75
100
125
TA = 125oC
0.05
0.7
150
TA = 25oC
2
4
o
6
8
10
-VGS, GATE TO SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE ( C)
Figure 13. On-Resistance Variation with
Temperature.
Figure 14. On-Resistance Variation with
Gate-to-Source Voltage.
25
100
25oC
TA = -55oC
-IS, REVERSE DRAIN CURRENT (A)
VDS = -5V
-ID, DRAIN CURRENT (A)
15
-ID, DRAIN CURRENT (A)
20
o
125 C
15
10
5
0
VGS = 0V
10
o
TA = 125 C
1
25oC
0.1
o
-55 C
0.01
0.001
0.0001
1
1.5
2
2.5
3
3.5
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 15. Transfer Characteristics.
4
0
0.2
0.4
0.6
0.8
1
1.2
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 16. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS4885C Rev D(W)
FDS4885C
Typical Characteristics: Q2 (P-Channel)
2000
ID = -6A
VDS = -10V
f = 1 MHz
VGS = 0 V
CISS
-20V
8
1600
CAPACITANCE (pF)
-VGS, GATE-SOURCE VOLTAGE (V)
10
-30V
6
4
2
1200
800
COSS
400
CRSS
0
0
0
5
10
15
20
25
30
0
5
10
Qg, GATE CHARGE (nC)
Figure 17. Gate Charge Characteristics.
20
25
30
35
40
Figure 18. Capacitance Characteristics.
50
P(pk), PEAK TRANSIENT POWER (W)
100
RDS(ON) LIMIT
-ID, DRAIN CURRENT (A)
15
-VDS, DRAIN TO SOURCE VOLTAGE (V)
100µ
10
1ms
1s
10s
1
10ms
100ms
DC
VGS = -10V
SINGLE PULSE
RθJA = 135oC/W
0.1
o
TA = 25 C
0.01
0.1
1
10
100
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
40
30
20
10
0
0.001
0.01
0.1
1
-VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 19. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
10
100
1000
t1, TIME (sec)
Figure 20. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) * RθJA
0.2
0.1
o
RθJA = 135 C/W
0.1
0.05
P(pk)
0.02
0.01
t1
t2
0.01
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS4885C Rev D(W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
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I2C™
EnSigna™
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FACT™
ImpliedDisconnect™
FACT Quiet Series™
IntelliMAX™
ISOPLANAR™
LittleFET™
MICROCOUPLER™
MicroFET™
MicroPak™
MICROWIRE™
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
Across the board. Around the world.™ OPTOLOGIC
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The Power Franchise
PACMAN™
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Quiet Series™
RapidConfigure™
RapidConnect™
µSerDes™
SILENT SWITCHER
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I15