FDS6894A Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET General Description Features These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. • 8 A, 20 V. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. • High performance trench technology for extremely RDS(ON) = 17 mΩ @ VGS = 4.5 V RDS(ON) = 20 mΩ @ VGS = 2.5 V RDS(ON) = 30 mΩ @ VGS = 1.8 V • Low gate charge (17 nC) low RDS(ON) • High power and current handling capability DD1 DD1 D2 D 5 DD2 6 4 Q1 3 7 SO-8 Pin 1 SO-8 G2 S2 S 8 S 2 Q2 1 S Absolute Maximum Ratings Symbol G1 S1 G o TA=25 C unless otherwise noted Ratings Units VDSS Drain-Source Voltage Parameter 20 V VGSS Gate-Source Voltage ±8 V ID Drain Current 8 A PD Power Dissipation for Dual Operation – Continuous (Note 1a) – Pulsed 32 2 Power Dissipation for Single Operation TJ, TSTG (Note 1a) W 1.6 (Note 1b) 1 (Note 1c) 0.9 –55 to +150 °C (Note 1a) 78 °C/W (Note 1) 40 °C/W Operating and Storage Junction Temperature Range Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDS6894A FDS6894A 13’’ 12mm 2500 units 2001 Fairchild Semiconductor Corporation FDS6894A Rev C (W) FDS6894A October 2001 Symbol Parameter TA = 25°C unless otherwise noted Test Conditions Min VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C 20 Typ Max Units Off Characteristics BVDSS ∆BVDSS ∆TJ IDSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current IGSSF IGSSR V mV/°C 13 1 10 µA Gate–Body Leakage, Forward VDS = 16 V, VGS = 0 V VDS = 16 V, VGS = 0 V, TJ = 55°C VGS = 8 V, VDS = 0 V 100 nA Gate–Body Leakage, Reverse VGS = – 8 V, –100 nA 0.8 –3 1.5 V mV/°C 13 16 21 18 17 20 30 25 mΩ On Characteristics VDS = 0 V (Note 2) VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25°C VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance ID(on) On–State Drain Current VGS = 4.5 V, ID = 8 A VGS = 2.5 V, ID = 7 A VGS = 1.8 V, ID = 6 A VGS = 4.5 V, ID = 8 A,TJ = 125°C VGS = 4.5V, VDS = 5 V gFS Forward Transconductance VDS = 5 V, ID = 8 A VDS = 10 V, f = 1.0 MHz V GS = 0 V, 0.6 16 A 44 S 1676 pF 288 pF 146 pF Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) (Note 2) 10 20 ns 14 25 ns Turn–Off Delay Time 33 53 ns tf Turn–Off Fall Time 12 22 ns Qg Total Gate Charge 17 24 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDD = 10 V, VGS = 4.5 V, VDS = 10 V, VGS = 4.5 V ID = 1 A, RGEN = 6 Ω ID = 8 A, 2.8 nC 3.3 nC Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current VSD Drain–Source Diode Forward Voltage VGS = 0 V, IS = 1.3 A (Note 2) 0.7 1.3 A 1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 78°C/W when 2 mounted on a 0.5in pad of 2 oz copper b) 125°C/W when mounted on a 0.02 2 in pad of 2 oz copper c) 135°C/W when mounted on a minimum mounting pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDS6894A Rev C (W) FDS6894A Electrical Characteristics FDS6894A Typical Characteristics 50 VGS = 4.5V 2 2.5V 40 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID, DRAIN CURRENT (A) 3.0V 2.0V 30 1.8V 20 10 0 0 0.5 1 1.5 2 2.5 3 1.8 VGS = 1.8V 1.6 2.0V 1.4 2.5V 1.2 3.0V 0 10 20 30 40 50 ID, DIRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 0.045 ID = 8A VGS = 4.5V ID = 4A RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 4.5V 0.8 3.5 VDS, DRAIN TO SOURCE VOLTAGE (V) 1.4 1.2 1 0.8 0.6 0.04 0.035 0.03 o TA = 125 C 0.025 0.02 TA = 25oC 0.015 0.01 -50 -25 0 25 50 75 100 125 150 1 2 o 3 4 5 VGS , GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 30 10 25oC 25 IS, REVERSE DRAIN CURRENT (A) TA = -55 oC VDS = 5V ID, DRAIN CURRENT (A) 3.5V 1 o 125 C 20 15 10 5 0 VGS = 0V 1 o TA = 125 C 0.1 o 25 C 0.01 o -55 C 0.001 0.0001 0.5 0.8 1.1 1.4 1.7 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 2 0 0.2 0.4 0.6 0.8 1 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS6894A Rev C (W) FDS6894A Typical Characteristics 2500 ID = 8A VDS = 5V f = 1 MHz VGS = 0 V 10V 4 2000 15V CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 5 3 2 1 CISS 1500 1000 COSS 500 CRSS 0 0 5 10 15 0 20 0 5 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 20 P(pk), PEAK TRANSIENT POWER (W) 50 100µs 1ms 10ms 100ms 1s 10s DC RDS(ON) LIMIT 10 1 VGS = 4.5V SINGLE PULSE o RθJA = 135 C/W 0.1 o TA = 25 C 0.01 0.01 0.1 1 10 100 SINGLE PULSE RθJA = 135°C/W TA = 25°C 40 30 20 10 0 0.01 0.1 1 10 100 t1, TIME (sec) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 15 Figure 8. Capacitance Characteristics. 100 ID, DRAIN CURRENT (A) 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) * RθJA o 0.2 0.1 RθJA = 135 C/W 0.1 0.05 P(pk) 0.02 0.01 t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.01 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS6894A Rev C (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4