Data Sheet No.PD60203 IPS022G DUAL FULLY PROTECTED POWER MOSFET SWITCH Features • • • • • Product Summary Over temperature shutdown Over current shutdown Active clamp Low current & logic level input E.S.D protection Description The IPS022G are fully protected dual low side SMART POWER MOSFETs respectively. They feature overcurrent, over-temperature, ESD protection and drain to source active clamp.These devices combine a HEXFET® POWER MOSFET and a gate driver. They offer full protection and high reliability required in harsh environments. The driver allows short switching times and provides efficient protection by turning OFF the power MOSFET when the temperature exceeds 165oC or when the drain current reaches 5A. These devices restart once the input is cycled. The avalanche capability is significantly enhanced by the active clamp and covers most inductive load demagnetizations. Rds(on) 150mΩ (max) V clamp 50V Ishutdown 5A Ton/Toff 1.5µs Package 8-Lead SOIC IPS022G (Dual) Typical Connection Load R in series (if needed) D IN Q control S S Logic signal (Refer to lead assignment for correct pin configuration) www.irf.com 1 IPS022G Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are referenced to SOURCE lead. (TAmbient = 25oC unless otherwise specified). PCB mounting uses the standard footprint with 70 µm copper thickness. Symbol Parameter Min. Max. — 47 Maximum input voltage -0.3 7 Maximum IN current -10 +10 mA A Vds Maximum drain to source voltage Vin Iin, max Isd cont. Diode max. continuous current (1) (∑ lsd mosfets, rth=125oC/W) Units V — 1.4 — 10 (∑ Pd mosfets, rth=125oC/W) — 1 ESD1 Electrostatic discharge voltage (Human Body) — 4 ESD2 Electrostatic discharge voltage (Machine Model) — 0.5 T stor. Tj max. Max. storage temperature -55 150 Max. junction temperature -40 +150 Min. Typ. — 100 — — 127 — — 60 — Isd pulsed Diode max. pulsed current (1) (for ea. mosfet) Pd Maximum power dissipation(1) Test Conditions W C=100pF, R=1500Ω, kV o C=200pF, R=0Ω, L=10µH C Thermal Characteristics Symbol Parameter Rth1 Thermal resistance with standard footprint (2 mos on) (2 mosfets on) Rth2 Thermal resistance with standard footprint (1 mos on) (1 mosfet on) Rth3 Thermal resistance with 1" square footprint (2 mos on) (2 mosfets on) Max. Units Test Conditions o C/W (1) Limited by junction temperature (pulsed current limited also by internal wiring) 2 www.irf.com IPS022G Recommended Operating Conditions These values are given for a quick design. For operation outside these conditions, please consult the application notes. Symbol Parameter Vds (max) Continuous drain to source voltage VIH High level input voltage VIL Low level input voltage I ds Continuous drain current (TAmbient = 85oC, IN = 5V, rth = 100oC/W, Tj = 85oC) Rin Recommended resistor in series with IN pin Tr-in (max) Max recommended rise time for IN signal (see fig. 2) Fr-Isc (2) Max. frequency in short circuit condition (Vcc = 14V) Min. Max. — 4 0 35 6 0.5 — 0.5 — 0 1 5 1 1 Units V A kΩ µS kHz Static Electrical Characteristics Standard footprint 70 µm copper thickness. (Tj = 25oC unless otherwise specified.) Symbol Parameter ON state resistance Tj = 25oC Tj = 150oC Idss 1 Drain to source leakage current Idss 2 Drain to source leakage current V clamp 1 Drain to source clamp voltage 1 V clamp 2 Drain to source clamp voltage 2 V in clamp IN to source clamp voltage V th IN threshold voltage Iin, -on ON state IN positive current Iin, -off OFF state IN positive current Rds(on) Min. Typ. 100 — 0 0 130 220 0.01 0.1 48 50 7 1 25 50 54 56 8 1.5 90 130 Max. Units Test Conditions 150 280 25 50 56 60 9.5 2 200 250 mΩ µA V µA Vin = 5V, Ids = 1A Vcc = 14V, Tj = 25oC Vcc = 40V, Tj = 25oC Id = 20mA (see Fig.3 & 4) Id=Ishutdown (see Fig.3 & 4) Iin = 1 mA Id = 50mA, Vds = 14V Vin = 5V Vin = 5V over-current triggered Switching Electrical Characteristics Vcc = 14V, Resistive Load = 10Ω, Rinput = 50Ω, 100µs pulse, Tj = 25oC, (unless otherwise specified). Symbol Parameter Min. Ton Tr Trf Toff Tf Qin 0.15 0.4 2 0.8 0.5 — Turn-on delay time Rise time Time to 130% final Rds(on) Turn-off delay time Fall time Total gate charge Typ. Max. Units Test Conditions 0.5 0.9 6 2 1.3 3.3 1 2 12 3.5 2.5 — See figure 2 µs See figure 2 nC Vin = 5V (2) Operations at higher switching frequencies is possible. See Appl. notes. www.irf.com 3 IPS022G Protection Characteristics Symbol Parameter T sd Isd Vreset Treset EOI_OT Over temperature threshold Over current threshold IN protection reset threshold Time to reset protection Short circuit energy (see application note) Min. Typ. — 4 1.5 2 — 165 5.5 2.3 10 400 Max. Units Test Conditions — 7 3 40 — o C A V µs µJ See fig. 1 See fig. 1 Vin = 0V, Tj = 25oC Vcc = 14V Functional Block Diagram All values are typical DRAIN 47 V 200 kΩ 1000 Ω IN 8.1 V S Q R Q I sense 80 µA T > 165°c I > Isd SOURCE Lead Assignments D1 D1 D2 D2 In1 S2 In2 1 S1 8 Lead SOIC (Dual) IPS022G Part Number 4 www.irf.com IPS022G Vin 5V 0V 90 % Vin 10 % t < T reset Ids t > T reset Tr-in I shutdown Isd 90 % Ids 10 % Td on T Td off tf tr T shutdown Tsd (165 °c) Vds Figure 2 - IN rise time & switching time definitions Figure 1 - Timing diagram T clamp Vin L Rem : V load is negative during demagnetization V load + R 14 V - Ids Vin Vds clamp ( Vcc ) Vds 5v 0v D IN Vds S Ids ( see Appl . Notes to evaluate power dissipation ) Figure 3 - Active clamp waveforms www.irf.com Figure 4 - Active clamp test circuit 5 IPS022G All curves are typical values with standard footprints. Operating in the shaded area is not recommended. 300 200% 180% 250 160% 140% o 200 Tj = 150 C 120% 100% 150 80% 100 Tj = 25oC 60% 40% 50 20% 0% -50 -25 0 0 1 2 3 4 5 6 7 8 4 ton de lay ris e tim e 130% rds on 9 8 25 50 75 100 125 150 175 Figure 6 - Normalized Rds(on) (%) Vs Tj (oC) Figure 5 - Rds ON (mΩ) Vs Input Voltage (V) 10 0 toff delay fall tim e 3 7 6 5 2 4 3 1 2 1 0 0 1 2 3 4 5 6 7 8 Figure 7 - Turn-ON Delay Time, Rise Time & Time to 130% final Rds(on) (us) Vs Input Voltage (V) 6 0 0 1 2 3 4 5 6 7 8 Figure 8 - Turn-OFF Delay Time & Fall Time (us) Vs Input Voltage (V) www.irf.com IPS022G 100 100 delay on rise tim e 130% rdson delay off fall tim e 10 10 1 1 0 .1 0 .1 10 100 1000 10000 Figure 9 - Turn-ON Delay Time, Rise Time & Time to 130% final Rds(on) (us) Vs IN Resistor (Ω) 8 10 100 1000 10000 Figure 10 - Turn-OFF Delay Time & Fall Time (us) Vs IN Resistor (Ω) 6 5 6 4 4 3 2 2 Isd 25°C 1 Ilim 25°C 0 0 1 2 3 4 5 6 7 Figure 11 - Current Iim. & I shutdown (A) Vs Vin (V) www.irf.com 8 0 -50 -25 0 25 50 75 100 125 150 Figure 12 - I shutdown (A) Vs Temperature (oC) 7 IPS022G 5 Std. footprint 127°C/W 1 m osfet on Std. footprint 100°C/W 2 m osfets on 4 100 T=25°C Std. footprint T=100°C Std footprint Current path capability should be above this curve 3 10 2 1 Load characteristic should be below this curve 0 -50 1 0 50 100 150 200 Figure 13 - Max.Cont. Ids (A) Vs Amb. Temperature (oC) Figure 14 - Ids (A) Vs Protection Resp. Time (s) 100 single pulse 100 Hz rth=100°C/W dT=25°C 1kHz rth=100°C/W dT=25°C 10 10 1 1 0 .1 Single pulse rth 1 mosfet active rth 2 mosfets active Vbat = 14 V Tjini = T sd for single pulse all curves for 1 mosfet active 0 .0 1 0.1 0 .0 1 0 .1 1 10 100 Figure 15 - Iclamp (A) Vs Inductive Load (mH) 8 Figure 16 - Transient Thermal Imped. (oC/W) Vs Time (s) www.irf.com IPS022G 200 16 180 14 Treset rise tim e 12 fall time 160 140 10 120 100 8 80 6 60 40 Iin,on 20 Iin,off 0 -50 -25 0 25 4 2 50 75 100 125 150 Figure 17 - Input Current (uA) Vs Junction Temperature (oC) 0 -50 -25 0 25 50 75 100 125 150 Figure 18 - Rise Time, Fall Time and Treset (µs) Vs Tj (oC) 120% 115% 110% 105% 100% 95% 90% Vds clamp @ Isd 85% Vin clamp @ 10mA 80% -50 -25 0 25 50 75 100 125 150 Figure 19 -Vin clamp and Vds clamp2 (%) Vs Tj (oC) www.irf.com 9 IPS022G Case Outline D DIM B 5 A FOOT PRINT 8 7 6 5 6 H E 0.25 [.010] 1 6X 2 3 A 4 6.46 [.255] e 3X 1.27 [.050] 8X 1.78 [.070] MILLIMETERS MAX MIN .0532 .0688 1.35 1.75 A1 .0040 .0098 0.10 0.25 b .013 .020 0.33 0.51 c .0075 .0098 0.19 0.25 D .189 .1968 4.80 5.00 E .1497 .1574 3.80 4.00 e .050 BAS IC 1.27 BAS IC e1 A 8X 0.72 [.028] INCHES MIN MAX .025 BAS IC 0.635 BAS IC H .2284 .2440 5.80 6.20 K .0099 .0196 0.25 0.50 L .016 .050 0.40 1.27 y 0° 8° 0° 8° K x 45° e1 A C y 0.10 [.004] 8X b 0.25 [.010] A1 8X L 8X c 7 C A B NOTES: 1. DIMENSIONING & T OLERANCING PER ASME Y14.5M-1994. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES ]. 4. OUT LINE CONFORMS T O JEDEC OUTLINE MS-012AA. 8-Lead SOIC 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS . MOLD PROTRUS IONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS . MOLD PROTRUS IONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS T HE LENGTH OF LEAD FOR SOLDERING TO A S UBS TRAT E. 01-6027 01-0021 11 (MS-012AA) IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 10/16/2002 10 www.irf.com