IRF 19MT050XF

Bulletin I27128 Rev.C 07/03
19MT050XF
"FULL-BRIDGE" FREDFET MTP
HEXFET® Power MOSFET
Features
• Low On-Resistance
• High Performance Optimised Built-in Fast
Recovery Diodes
• Fully Characterized Capacitance and
Avalanche Voltage and Current
• Aluminum Nitride DBC
• Very Low Stray Inductance Design for
High Speed Operation
31 A
VDSS = 500V
Benefits
• Low Gate Charge Qg results in Simple
Drive Requirement
• Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
• Low Trr and Soft Diode Reverse Recovery
• Optimized for Welding, UPS and SMPS
Applications
• Outstanding ZVS and High Frequency
Operation
• Direct Mounting to Heatsink
• PCB Solderable Terminals
• Very Low Junction-to-Case Thermal Resistance
• UL Approved E78996
MMTP
Absolute Maximum Ratings
Parameters
ID
Continuos Drain Current @ VGS = 10V
IDM
Pulsed Drain Current
PD
Maximum Power Dissipation
Max
Units
@ TC = 25°C
31
A
@ TC = 100°C
19
@ TC = 25°C
1140
@ TC = 100°C
456
(1)
124
VGS
Gate-to-Source Voltage
± 30
VISOL
RMS Isolation Voltage, Any Terminal to Case, t = 1 min
2500
dv/dt
Peak Diode Recovery dv/dt
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(3)
15
W
V
V/ ns
1
19MT050XF
Bulletin I27128 Rev.C 07/03
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameters
Min Typ Max Units Test Conditions
V(BR)DSS
∆V(BR)DSS/
∆T J
R DS(ON)
Drain-to-Source Breakdown Voltage
Temperature Coeff. of
Breakdown Voltage
Static Drain-to-Source On-Resistance
500
V GS(th)
Gate Threshold Voltage
3.0
I DSS
Drain-to-Source Leakage Current (6)
I GSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
V
V GS = 0V, I D = 250µA
V/°C I D = 4mA, reference to T J = 25°C
0.48
0.19
0.21
0.22
0.25
Ω
6.0
V
50
2
150
- 150
µA
mA
nA
V GS = 10V, I D = 19A
V GS = 10V, I D = 31A
(4)
V DS = V GS , I D = 250µA
V DS =
V DS =
V GS =
V GS =
500V, V GS = 0V
400V, V GS = 0V, T J = 125°C
30V
- 30V
Dynamic Characteristics @ TJ = 25°C (unless otherwise specified)
Parameters
Min Typ Max Units Test Conditions
gfs
Qg
Qgs
Qgd
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
26
105
36
46
160
55
70
td(on)
td(off)
tr
tf
Ciss
Coss
Crss
Turn-on Delay Time
Turn-off Delay Time
Rise Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
49
80
165
76
4808
1165
40
74
120
250
115
7210
1750
60
S
nC
V DS = 50V, ID = 19A
I D = 31A
VDS = 400V
VGS = 10V
ns
I D = 31A
VDS = 250V
VGS = 10V
RG = 4.3Ω
VGS = 0V
VDS = 25V
f = 1.0 MHz
pF
(4)
Diode Characteristics @ TJ = 25°C (unless otherwise specified)
Parameters
IS
ISM
Continuous Source Current
(Body Diode)
Pulsed Source Current
VSD
trr
Qrr
(Body Diode)
(1)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
2
Min Typ Max Units Test Conditions
31
1.01
252
1619
A
124
MOSFET symbol
showing the
integral reverse
1.1
378
2428
p-n junction diode
TJ = 25°C, IS = 31A, VGS = 0V
TJ = 125°C, IF = 31A
di/dt = 100A/µs
V
ns
nC
D
G
S
(4)
(4)
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19MT050XF
Bulletin I27128 Rev.C 07/03
Avalanche Characteristics
Max
Units
EAS
Parameters
Single Pulse Avalanche Energy
(2)
Min
Typ
493
mJ
IAR
Avalanche Current
(1)
31
A
EAR
Repetitive Avalanche Energy
(1)
114
mJ
Thermal- Mechanical Specifications
Parameters
Min
Max
Units
TJ
Operating Junction Temperature Range
- 40
Typ
150
°C
TSTG
Storage Temperature Range
- 40
125
R thJC
Junction-to-Case (per MOSFET)
R thCS
Case-to-Sink
0.44
°C/ W
0.06
(Heatsink Compound Thermal Conductivity = 1 W/mK)
Clearance
(5)
(external shortest distance in air
5.5
mm
between two terminals)
Creepage
(5)
(shortest distance along external
8
surface of the insulating material between 2 terminals)
Weight
Notes:
(1) Repetitive rating; pulse width limited by
max. junction temperature
(2) Starting TJ = 25°C, L = 1.0mH, RG = 25Ω
IAS = 31A
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66
g
(3) ISD ≤ 31A, di/dt ≤ 340 A/µs, VDD≤ V(BR)DSS,
TJ ≤ 150°C
(4) Pulse width ≤ 400µs; duty cycle ≤ 2%
(5) Standard version only i.e. without optional thermistor
(6) ICES includes also opposite leg overall leakage
3
19MT050XF
Bulletin I27128 Rev.C 07/03
1000
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
10
1
5.0V
0.1
10
5.0V
1
20µs PULSE WIDTH
Tj = 25°C
20µs PULSE WIDTH
Tj = 150°C
0.01
0.1
0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
100
2.5
100
T J = 150°C
10
1
T J = 25°C
VDS = 50V
20µs PULSE WIDTH
0
ID = 31A
VGS = 10V
2.0
(Normalized)
R DS(on) , Drain-to-Source On Resistance
ID, Drain-to-Source Current ( A)
10
Fig 2. Typical Output Characteristics
1000
1.5
1.0
0.5
4.0
5.0
6.0
7.0
8.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
4
1
VDS, Drain-to-Source Voltage (V)
9.0
-60 -40 -20
0
20
40
60
80 100 120 140 160
T J , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
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19MT050XF
Bulletin I27128 Rev.C 07/03
100000
VGS , Gate-to-Source Voltage (V)
Coss = Cds + Cgd
10000
C, Capacitance (pF)
16
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Ciss
1000
Coss
100
Crss
ID= 31A
VDS= 400V
VDS= 250V
VDS= 100V
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
10
1
10
100
0
1000
40
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
120
160
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
ID, Drain-to-Source Current (A)
1000.0
ISD, Reverse Drain Current (A)
80
Q G Total Gate Charge (nC)
100.0
T J = 150°C
10.0
1.0
T J = 25°C
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
1msec
1
VGS = 0V
0.1
0.1
0.2
0.4
0.6
0.8
1.0
1.2
VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
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1.4
100µsec
10
Tc = 25°C
Tj = 150°C
Single Pulse
1
10
10msec
100
1000
10000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
5
19MT050XF
Bulletin I27128 Rev.C 07/03
32
RD
VDS
28
VGS
ID, Drain Current (A)
24
D.U.T.
RG
+
- VDD
20
10V
16
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
12
Fig 10a. Switching Time Test Circuit
8
VDS
4
90%
0
25
50
75
100
125
150
TC, Case Temperature
10%
VGS
tr
td(on)
Fig 9. Maximum Drain Current Vs.
Case Temperature
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal
Response (ZZthJC
(°C/W)
)
Thermal Response
thJC
1
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
τJ
R1
R1
τJ
τ1
R2
R2
τ2
τ1
τ3
τC
τ
τ3
Ri (°C/W)
0.1272
0.2697
0.0429
Ci= τi/Ri
Ci= i/Ri
0.001
τ2
R3
R3
τi (sec)
0.00109
0.03739
3.749
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
6
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19MT050XF
Bulletin I27128 Rev.C 07/03
EAS, Single Pulse Avalanche Energy (mJ)
1000
ID
14A
19A
BOTTOM 31A
TOP
800
15V
600
400
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
tp
200
A
0.01Ω
Fig 12b. Unclamped Inductive Test Circuit
and vs Junction Temperature
0
25
50
75
100
125
150
V(BR)DSS
Starting T J , Junction Temperature (°C)
tp
Fig 12a. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12c. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
.2µF
12V
.3µF
D.U.T.
+
V
- DS
VGS
QGS
QGD
VG
3mA
IG
ID
Current Sampling Resistors
Fig 13a. Gate Charge Test Circuit
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VGS
Charge
Fig 13b. Basic Gate Charge Waveform
7
19MT050XF
Bulletin I27128 Rev.C 07/03
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D.U.T
ƒ
+
‚
-
-
„
+

RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
D=
Period
P.W.
+
-
VDD
P.W.
Period
VGS=10V *
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
8
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19MT050XF
Bulletin I27128 Rev.C 07/03
Outline Table
Dimensions in millimeters
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9
19MT050XF
Bulletin I27128 Rev.C 07/03
Ordering Information Table
Device Code
19
1
MT 050
2
3
X
F
4
5
1
-
Current rating
2
-
Essential Part Number
(19 = 19A)
3
-
Voltage code
(050 = 500V)
4
-
Speed/ Type
(X = HexFet)
5
-
Circuit Configuration (F = Full Bridge)
Data and specifications subject to change without notice.
This product has been designed and qualified for Industrial Level.
Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7309
Visit us at www.irf.com for sales contact information. 09/02
10
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