IRF IRFB17N50LPBF

PD - 95123
IRFB17N50LPbF
SMPS MOSFET
Applications
Switch Mode Power Supply (SMPS)
Uninterruptible Power Supply
High Speed Power Switching
ZVS and High Frequency Circuit
PWM Inverters
Lead-Free
l
l
l
l
l
l
VDSS
HEXFET® Power MOSFET
RDS(on) typ.
ID
0.28Ω
16A
500V
Benefits
l
l
l
l
l
Low Gate Charge Qg results in Simple Drive Requirement
Improved Gate, Avalanche and Dynamic dv/dt Ruggedness
Fully Characterized Capacitance and Avalanche Voltage
and Current
Low Trr and Soft Diode Recovery
High Performance Optimised Anti-parallel Diode
TO-220AB
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case )
Mounting Torque, 6-32 or M3 screw
16
11
64
220
1.8
± 30
13
-55 to + 150
Units
A
W
W/°C
V
V/ns
300
°C
10
lbft.in(N.m)
Diode Characteristics
Symbol
IS
VSD
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
ISM
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
16
MOSFET symbol
––– –––
showing the
A
G
64
integral reverse
––– –––
S
p-n junction diode.
––– ––– 1.5
V
TJ = 25°C, IS = 16A, VGS = 0V „
––– 170 250
TJ = 25°C
IF = 16A
ns
––– 220 330
TJ = 125°C
di/dt = 100A/µs „
––– 470 710
TJ = 25°C
nC
––– 810 1210
TJ = 125°C
––– 7.3
11
A
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Typical SMPS Topologies
l
Bridge Converters
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l
All Zero Voltage Switching
1
3/18/04
IRFB17N50LPbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
RDS(on)
VGS(th)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
∆V(BR)DSS/∆TJ
Min. Typ. Max. Units
Conditions
500 ––– –––
V
VGS = 0V, ID = 250µA
–––
0.6 ––– V/°C Reference to 25°C, ID = 1mA†
––– 0.28 0.32
Ω
VGS = 10V, ID = 9.9A „
3.0
––– 5.0
V
VDS = VGS, ID = 250µA
––– ––– 50
µA
VDS = 500V, VGS = 0V
––– ––– 2.0
mA VDS = 400V, VGS = 0V, TJ = 125°C
––– ––– 100
VGS = 30V
nA
––– ––– -100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
11
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
–––
21
51
50
28
2760
325
37
3690
84
159
Max. Units
Conditions
–––
S
VDS = 50V, ID = 9.9A
130
ID = 16A
33
nC
VDS = 400V
59
VGS = 10V „
–––
VDD = 250V
–––
ID = 16A
ns
–––
RG = 7.5Ω
–––
VGS = 10V „
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 400V …
Avalanche Characteristics
Symbol
EAS
IAR
EAR
Parameter
Single Pulse Avalanche Energy‚
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
390
16
22
mJ
A
mJ
Typ.
Max.
Units
–––
0.50
–––
0.56
–––
62
°C/W
Thermal Resistance
Symbol
RθJC
RθCS
RθJA
Parameter
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature.
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
‚ Starting TJ = 25°C, L = 3.0mH, RG = 25Ω,
IAS = 16A.
ƒ ISD ≤ 16A, di/dt ≤ 347A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
2
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IRFB17N50LPbF
100
100
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
10
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
1
5.0V
0.1
20µs PULSE WIDTH
Tj = 25°C
0.01
10
5.0V
1
20µs PULSE WIDTH
Tj = 150°C
0.1
0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
I D , Drain-to-Source Current (A)
TJ = 150 ° C
10
TJ = 25 ° C
1
V DS = 50V
20µs PULSE WIDTH
5.0
6.0
7.0
8.0
9.0
10.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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100
Fig 2. Typical Output Characteristics
100
0.1
4.0
10
VDS, Drain-to-Source Voltage (V)
RDS(on) , Drain-to-Source On Resistance
(Normalized)
Fig 1. Typical Output Characteristics
1
3.0
ID = 16A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20 40 60
80 100 120 140 160
TJ , Junction Temperature ( ° C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFB17N50LPbF
20
100000
Coss = Cds + Cgd
10000
C, Capacitance(pF)
VGS , Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Ciss
1000
Coss
100
Crss
10
10
100
V DS= 400V
V DS= 250V
V DS= 100V
16
12
8
4
0
1
ID = 16A
1000
0
30
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
90
120
150
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
TJ = 150 ° C
100
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
60
QG , Total Gate Charge (nC)
10
TJ = 25 ° C
1
0.1
0.2
V GS = 0 V
0.6
0.9
1.3
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
1.6
10us
10
100us
1ms
1
0.1
10ms
TC = 25 °C
TJ = 150 °C
Single Pulse
10
100
1000
10000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFB17N50LPbF
20
V GS
16
ID , Drain Current (A)
RD
VDS
RG
12
D.U.T.
+
- VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
8
Fig 10a. Switching Time Test Circuit
4
VDS
90%
0
25
50
75
100
125
TC , Case Temperature ( °C)
150
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response(Z thJC )
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
PDM
0.01
t1
t2
0.001
0.00001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x ZthJC + TC
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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EAS , Single Pulse Avalanche Energy (mJ)
IRFB17N50LPbF
800
TOP
640
BOTTOM
ID
7A
10A
16A
15V
480
D.U.T
RG
320
DRIVER
L
VDS
+
- VDD
IAS
20V
160
tp
A
0.01Ω
Fig 12c. Unclamped Inductive Test Circuit
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( ° C)
Fig 12a. Maximum Avalanche Energy
Vs. Drain Current
V(BR)DSS
tp
I AS
Fig 12d. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
50KΩ
12V
VGS
.2µF
.3µF
D.U.T.
QGS
+
V
- DS
QGD
VG
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 13a. Gate Charge Test Circuit
6
Charge
Fig 13b. Basic Gate Charge Waveform
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IRFB17N50LPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

RG
•
•
•
•
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFB17N50LPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
1
2
3
4- DRAIN
14.09 (.555)
13.47 (.530)
4- COLLECTOR
4.06 (.160)
3.55 (.140)
3X
3X
LEAD ASSIGNMENTS
IGBTs, CoPACK
1 - GATE
2 - DRAIN
1- GATE
1- GATE
3 - SOURCE 2- COLLECTOR
2- DRAIN
3- SOURCE
3- EMITTER
4 - DRAIN
HEXFET
1.40 (.055)
1.15 (.045)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010
LOT CODE 1789
AS S E MB L E D ON WW 19, 1997
IN T H E AS S E MB L Y LINE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INT E R NAT IONAL
R E CT IF IE R
L OGO
AS S E MB L Y
L OT CODE
PAR T NU MB E R
DAT E CODE
YE AR 7 = 1997
WE E K 19
L INE C
Data and specifications subject to change without notice.
This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.03/04
8
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