SEMICONDUCTOR TECHNICAL DATA The MC100LVEL11 is a differential 1:2 fanout buffer. The device is functionally similar to the E111 device but with higher performance capabilities. Having within-device skews and output transition times significantly improved over the E111, the LVEL11 is ideally suited for those applications which require the ultimate in AC performance. The differential inputs of the LVEL11 employ clamping circuitry to maintain stability under open input conditions. If the inputs are left open (pulled to VEE) the Q outputs will go LOW. • • • • • 8 1 D SUFFIX PLASTIC SOIC PACKAGE CASE 751-05 330ps Propagation Delay 5ps Skew Between Outputs High Bandwidth Output Transitions 75kΩ Internal Input Pulldown Resistors >2000V ESD Protection LOGIC DIAGRAM AND PINOUT ASSIGNMENT PIN DESCRIPTION Q0 8 1 VCC Q0 2 7 D Q1 3 6 D Q1 4 5 VEE PIN FUNCTION D Q0, Q1 Data Inputs Data Outputs DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = GND) –40°C Symbol Characteristic Min IEE Power Supply Current VEE Power Supply Voltage IIH Input HIGH Current IIL Input LOW Current –3.0 0°C Typ Max 24 28 –3.3 –3.8 Min –3.0 150 Dn Dn 0.5 –600 25°C Typ Max 24 28 –3.3 –3.8 Min –3.0 Typ Max 24 28 –3.3 –3.8 150 0.5 –600 4–1 Min –3.0 150 0.5 –600 1/96 Motorola, Inc. 1996 85°C REV 0 0.5 –600 Typ Max Unit 25 30 mA –3.3 –3.8 V 150 µA µA MC100LVEL11 AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = GND) –40°C Symbol Characteristic Min Typ 235 0°C Max Min 385 245 Typ 25°C Max Min Typ Max Min 395 255 330 405 285 5 5 20 20 tPLH tPHL Propagation Delay to Output tSKEW Within-Device Skew1 Duty Cycle Skew2 VPP Minimum Input Swing3 200 VCMR Common Mode Range4 VPP < 500mV VPP ≥ 500mV –2.1 –1.9 –0.2 –0.2 –2.2 –2.0 –0.2 –0.2 –2.2 –2.0 tr tf Output Rise/Fall Times Q (20% – 80%) 120 320 120 320 120 5 5 20 20 5 5 85°C 20 20 200 200 Typ 5 5 Max Unit 435 ps 20 20 ps 200 mV V 220 –0.2 –0.2 –2.2 –2.0 –0.2 –0.2 320 120 320 ps 1. Within-device skew defined as identical transitions on similar paths through a device. 2. Duty cycle skew is the difference between a TPLH and TPHL propagation delay through a device. 3. Minimum input swing for which AC parameters guaranteed. The device will function properly with input swings below 200mV, however, AC delays may move outside of the specified range. The device has a DC gain of ≈40. 4. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1V. The lower end of the CMR range varies 1:1 with VEE. The number in the spec table assumes a nominal VEE = –3.3V. Note for PECL operation, the VCMR(min) will be fixed at 3.3V – |VCMR(min)|. 800 VOUT(PP)(mV) 600 400 200 0 0 200 400 600 800 1000 1200 1400 1600 1800 2000 f (MHz) Figure 1. Output Swing versus Frequency MOTOROLA 4–2 ECLinPS and ECLinPS Lite DL140 — Rev 3 MC100LVEL11 OUTLINE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751–05 ISSUE P –A– M 1 4 R 0.25 (0.010) 4X –B– X 45 _ B M 5 P 8 NOTES: 1. DIMENSIONS A AND B ARE DATUMS AND T IS A DATUM SURFACE. 2. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 3. DIMENSIONS ARE IN MILLIMETER. 4. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 5. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 6. DIMENSION D DOES NOT INCLUDE MOLD PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. J M_ C F G –T– K SEATING PLANE 8X D 0.25 (0.010) M T B S A S DIM A B C D F G J K M P R MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.18 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 Motorola reserves the right to make changes without further notice to any products herein. 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How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 MFAX: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 ◊ ECLinPS and ECLinPS Lite DL140 — Rev 3 4–3 *MC100LVEL11/D* MC100LVEL11/D MOTOROLA