MOTOROLA MC100LVEL37DW

SEMICONDUCTOR TECHNICAL DATA
÷÷
The MC100LVEL37 is a fully differential 1:4 fanout buffer. The device
offers two outputs at ÷1 of the input frequrency, and two outputs at ÷2 of
the input frequency. The Low Output–Output Skew of the device makes it
ideal for distributing1x and 1/2x frequency synchronous signals.
The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs are left
open the D input will pull down to VEE, The D input will bias around VCC/2
and the Q output will go LOW.
•
•
•
•
•
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DW SUFFIX
20–LEAD PLASTIC SOIC WIDE PACKAGE
CASE 751D–04
Differential Inputs and Outputs
20–Lead SOIC Packaging
700ps Typical Propagation Delays
50ps Output–Output Skews
Low Voltage 100K ECL
>2000V ESD Protection
NC
Q0
Q0
Q1
Q1
Q2
Q2
20
19
18
17
16
15
14
Q3
Q3
NC
13
12
11
PIN NAMES
Pins
Function
Qna, Qna
CLKn, CLKn
Clk_Sel
÷1 ÷2
MR
1
2
NC
3
4
5
6
7
VCC CLK0 CLK0 Clk_Sel CLK1 CLK1
8
9
10
MR
VEE
NC
Differential Clock Outputs
Differential Clock Inputs
Input Clock Selection
‘0’ Selects CLK0; ‘1‘ Selects CLK1
Asynchronous Master Reset
‘1’ Resets Dividers
Figure 1. 20–Lead Pinout (Top View)
MC100LVEL37
DC CHARACTERISTICS (VEE = –3.0V to –3.8V; VCC = GND)
–40°C
Symbol
Characteristic
IEE
Power Supply Current
IIH
Input HIGH Current
IINL
Input LOW Current
Min
Typ
0°C
Max
Min
38
0.5
–300
Max
Min
38
150
CLKn
CLKn
Typ
25°C
0.5
–300
5/97
4–1
Min
REV 0
Typ
Max
38
150
This document contains information on a product under development. Motorola reserves the right to change or
discontinue this product without notice.
 Motorola, Inc. 1997
Max
38
150
0.5
–300
Typ
85°C
mA
150
0.5
–300
Unit
µA
µA
MC100LVEL37
MC100LVEL37
AC CHARACTERISTICS (VEE = –3.0V to –3.8V; VCC = GND)
–40°C
Symbol
Characteristic
Min
Typ
0°C
Max
Min
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
Max
tPLH
tPHL
Propagation Delay
CLK→Q/Q
Clk_Sel→Q
MR→Q
tsk(O)
Output–Output Skew
50
50
50
50
tsk(DC)
Duty Cycle Skew
|tPLH–tPHL|
50
50
50
50
VPP
Minimum Input Swing
(Note 1.)
VCMR
Common Mode Range
(Note 2.)
VPP < 500mV
VPP ≥ 500mV
Unit
ps
700
800
800
700
800
800
700
800
800
700
800
800
ps
ps
150
1000
150
1000
150
1000
150
1000
–2.0
–1.8
–0.4
–0.4
–2.1
–1.9
–0.4
–0.4
–2.1
–1.9
–0.4
–0.4
–2.1
–1.9
–0.4
–0.4
mV
V
tr
Output Rise/Fall Times Q
230
500
230
500
230
500
230
500
ps
tf
(20% – 80%)
1. Minimum input swing for which AC parameters guaranteed. The device has a DC gain of ≈40.
2. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within
the specified range and the peak-to-peak voltage lies between VPPmin and 1V. The lower end of the CMR range varies 1:1 with VEE. The
numbers in the spec table assume a nominal VEE = –3.3V. Note for PECL operation, the VCMR(min) will be fixed at 3.3V – |VCMR(min)|.
MOTOROLA
4–2
ECLinPS and ECLinPS Lite
DL140 — Rev 3
MC100LVEL37
OUTLINE DIMENSIONS
DW SUFFIX
PLASTIC SOIC WIDE PACKAGE
CASE 751D–04
ISSUE E
–A–
20
11
–B–
10X
P
0.010 (0.25)
1
M
B
M
10
20X
D
0.010 (0.25)
M
T A
B
S
J
S
F
R X 45 _
C
–T–
18X
G
SEATING
PLANE
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
12.65
12.95
7.40
7.60
2.35
2.65
0.35
0.49
0.50
0.90
1.27 BSC
0.25
0.32
0.10
0.25
0_
7_
10.05
10.55
0.25
0.75
INCHES
MIN
MAX
0.499
0.510
0.292
0.299
0.093
0.104
0.014
0.019
0.020
0.035
0.050 BSC
0.010
0.012
0.004
0.009
0_
7_
0.395
0.415
0.010
0.029
M
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◊
ECLinPS and ECLinPS Lite
DL140 — Rev 3
4–3
MC100LVEL37/D
MOTOROLA