PHILIPS BUK866

Philips Semiconductors
Product specification
Insulated Gate Bipolar Transistor
Protected Logic-Level IGBT
GENERAL DESCRIPTION
Protected N-channel logic-level
insulated gate bipolar power
transistor in a plastic envelope
suitable for surface mount
applications. It is intended for
automotive ignition applications, and
has integral zener diodes providing
active collector voltage clamping and
ESD protection up to 2 kV.
PINNING - SOT404
PIN
BUK866-400 IZ
QUICK REFERENCE DATA
SYMBOL PARAMETER
MIN. TYP. MAX. UNIT
Collector-emitter clamp voltage
Collector-emitter on-state voltage
Collector current (DC)
Total power dissipation
Clamped energy dissipation
V(CL)CER
VCEsat
IC
Ptot
ECERS
PIN CONFIGURATION
370
410
500
2.2
20
100
300
V
V
A
W
mJ
SYMBOL
DESCRIPTION
c
mb
1
gate
2
collector
3
emitter
tab
collector
g
2
1
3
e
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
VCE
Collecter-emitter voltage
tp ≤ 500 µs
VCE
±VGE
IC
IC
ICM
Collector-emitter voltage
Gate-emitter voltage
Collector current (DC)
Collector current (DC)
Collector current (pulsed peak value,
on-state)
Collector current (clamped inductive
load)
Clamped turn-off energy
(non-repetitive)
Clamped turn-off energy (repetitive)
Continuous
Tmb = 100 ˚C
Tmb = 25 ˚C
Tmb = 25 ˚C; tp ≤ 10 ms;
VCE ≤ 15 V
1 kΩ ≤ RG ≤ 10 kΩ
ICLM
ECERS
ECERR
EECR
Ptot
Tstg
Tj
Reverse avalanche energy
(repetitive)
Total power dissipation
Storage temperature
Operating Junction Temperature
Tmb = 25 ˚C; IC = 10 A; RG = 1 kΩ;
see Figs. 23,24
Tmb = 125 ˚C; IC = 8 A; RG = 1 kΩ;
f = 50 Hz; t = 60 min.
IE = 1 A; f = 50 Hz
Tmb = 25 ˚C
-
MIN.
MAX.
UNIT
-
500
V
-20
-
50
12
10
20
25
V
V
A
A
A
-
10
A
-
300
mJ
-
125
mJ
-
5
mJ
-55
-40
125
150
150
W
˚C
˚C
MIN.
MAX.
UNIT
-
2
kV
ESD LIMITING VALUE
SYMBOL
PARAMETER
CONDITIONS
VC
Electrostatic discharge capacitor
voltage
Human body model
(100 pF, 1.5 kΩ)
September 1998
1
Rev. 1.200
Philips Semiconductors
Product specification
Insulated Gate Bipolar Transistor
Protected Logic-Level IGBT
BUK866-400 IZ
THERMAL RESISTANCES
SYMBOL
PARAMETER
CONDITIONS
Rth j-mb
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
-
Rth j-a
minimum footprint,
FR4 board (see Fig. 26).
TYP.
MAX.
UNIT
-
1.0
K/W
50
-
K/W
STATIC CHARACTERISTICS
Tmb = 25 ˚C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V(BR)CG
Collector-gate zener
breakdown voltage
Reverse collector-emitter
breakdown voltage
Gate-emitter breakdown
voltage
Gate threshold voltage
Gate threshold voltage
2 mA ≤ -IG ≤ 5 mA; -40 ≤ Tj ≤150˚C
370
410
500
V
IE = 10 mA
20
30
50
V
IG = ± 1 mA
12
16
20
V
VCE = VGE; IC = 1 mA
VCE = VGE; IC = 1 mA;
-40 ≤ Tj ≤150˚C
VCE = 50 V; VGE = 0 V; Tj = 25 ˚C
1
0.6
1.5
-
2
2.4
V
V
-
0.01
10
µA
Tj = 125 ˚C
-
0.01
1
mA
VCE = -20 V
VCE = -20 V; Tj = 125˚C
VGE = ±6 V
Tj = 150˚C
VGE = 4.5 V; IC = 8 A
VGE = 3.5 V; IC = 6 A;
-40 ≤ Tj ≤150˚C
-
0.2
2
0.1
5
1.2
1.2
5
20
1
100
2.2
2.2
mA
mA
µA
µA
V
V
MIN.
TYP.
MAX.
UNIT
V(BR)EC
±V(BR)GES
VGE(TO)
VGE(TO)
ICES
ICES
IEC
IEC
IGES
VCEsat
Zero gate voltage collector
current
Zero gate voltage collector
current
Reverse collector current
Reverse collector current
Gate emitter leakage current
Collector-emitter on-state
voltage
DYNAMIC CHARACTERISTICS
Tmb = 25 ˚C unless otherwise specified
SYMBOL
PARAMETER
V(CL)CER
Collector-emitter clamp voltage RG = 1 kΩ; IC = 10 A;
(peak value)
-40 ≤ Tj ≤150˚C; Inductive load; see
Figs. 23,24
370
410
500
V
gfe
Forward transconductance
VCE = 15 V; IC = 4 A
5.5
15
20
S
Cies
Coes
Cres
Input capacitance
Output capacitance
Feedback capacitance
VGE = 0 V; VCE = 25 V; f = 1 MHz
-
940
95
30
1200
130
50
pF
pF
pF
td off
tf
tc
Eoff
Turn-off delay time
Fall time
Crossover Time
Turn-off Energy loss
IC = 8 A; VCL = 300 V; RG = 1 kΩ;
VGE = 5 V; Tj = 125˚C;
Inductive load; see Figs. 20,21
-
13
6
12
13
18
10
-
µs
µs
µs
mJ
September 1998
CONDITIONS
2
Rev. 1.200
Philips Semiconductors
Product specification
Insulated Gate Bipolar Transistor
Protected Logic-Level IGBT
BUK866-400 IZ
Zth(j-mb) / (K/W)
1E+01
120
Normalised Power Derating
PD%
110
100
90
D=
1E+00
1E-01
0.5
80
0.2
70
0.1
60
50
0.05
0.02
40
t
P
D
1E-02
p
t
D= p
T
30
t
20
10
0
T
0
1E-03
1E-07
1E-05
1E-03
t/s
1E-01
0
1E+01
40
60
80
100
Tmb / C
120
140
Fig.4. Normalised power dissipation.
PD% = 100.PD/PD 25˚C = f(Tmb)
Fig.1. Transient thermal impedance
Z th j-mb = f(t) ; parameter D = tp/T
IC / A
20
BUK8Y6-400IZ
15
ICLM / A
BUK8Y6-400IZ
I CLM
10
10
Self-clamped
1
5
0.1
0
200
400
0
600
0
50
100
150
dVCE/dt (V/us)
VCE / V
Fig.5. Derating of ICLM with turn-off dVCE/dt
conditions: VCE ≤ 500 V; Tj ≤ Tjmax.
Fig.2. Turn-off Safe Operating Area
conditions: Tj ≤ Tjmax. ; RG ≥ 1 kΩ
3
VCE / V
Tj / C =
200
PMG35A
2
VCE / V
150
25
-40
Tj / C =
PMG35A
150
25
-40
1.5
2
1
1
0.5
0
0
0
4
8
12
16
IC / A
20
0
24
Fig.3. Typical On-state Voltage
VCEsat = f(IC); parameter Tj; conditions: VGE = 3.5 V
September 1998
4
8
12
16
IC / A
20
24
Fig.6. Typical On-state Voltage
VCEsat = f(IC); parameter Tj; conditions: VGE = 5 V
3
Rev. 1.200
Philips Semiconductors
Product specification
Insulated Gate Bipolar Transistor
Protected Logic-Level IGBT
30
BUK866-400 IZ
PMG35A
IC / A
5
4
1E-2
VGE / V = 4
+/- IGES / A
PMG35A
1E-3
3
IE-4
20
2.8
10
1E-5
2.6
1E-6
2.4
1E-7
2.2
1E-8
2
0
1E-9
0
2
4
6
8
0
10
10
VGE / V
5
VCE / V
Fig.10. Typical gate-emitter charcteristics
IGES = f(VGE); conditions: VCE = 0 V; Tj = 25˚C
Fig.7. Typical Output Characteristics
IC = f(VCE); parameter VGE; conditions: Tj = 25˚C
30
IC / A
Tj / C =
20
15
PMG35A
10
150
25
-40
ICES / mA
PMG35A
150
Tj / C = 25
-40
20
1
10
0
0
1
2
VGE / V
3
0.1
350
4
Fig.8. Typical Transfer Characteristics
IC = f(VGE), parameter Tj; conditions: VCE = 10 V
35
gfe / S
370
390
410
VCE / V
430
450
Fig.11. Typical collector clamp characteristics
ICES = f(VCE); parameter Tj; conditions: VGE = 0 V
PMG35A
2.5
BUK856-400IZ
VGE(TO) / V
30
max.
2
25
20
1.5
typ.
1
min.
15
10
5
Tj / C =
0
0
10
150
25
-40
20
0.5
30
-40 -20
IC / A
Fig.9. Typical Forward Transconductance
gfe = f(IC); parameter Tj; conditions: VCE = 10 V
September 1998
0
20
40 60
Tj / C
80 100 120 140
Fig.12. Gate Threshold Voltage
VGE(TO) = f(Tj); conditions: IC = 1 mA; VCE = VGE
4
Rev. 1.200
Philips Semiconductors
Product specification
Insulated Gate Bipolar Transistor
Protected Logic-Level IGBT
SUB-THRESHOLD CONDUCTION
IC / A
1E-01
BUK866-400 IZ
t / us, E / mJ
100
PMG35A
1E-02
td(off)
E(off)
2%
1E-03
98 %
typ
10
1E-04
tf
1E-05
1
1E-06
0
0.4
0.8
1.2
VGE / V
1.6
2
0
2.4
VGE / V
4
5
Fig.16. Typical Switching Characteristics vs. RG
conditions: Tj=125 ˚C; IC=8 A; VCL=300 V; LC=5 mH.
Fig.13. Sub-threshold collector current
IC = f(VGE); Tj = 25˚C; VCE = VGE
6
2
3
Rg / kOhm
1
PMG35A
t / us, E / mJ
PMG35A
15
5
Vcc / V = 12
td(off)
4
10
300
E(off)
3
2
5
tf
1
0
0
0
10
20
Qg / nC
0
30
Fig.17. Typical Switching Characteristics vs. Tj
conditions: IC=8 A; VCL=300 V; RG=1 kΩ; LC=5 mH.
t / us, E / mJ
pmg35a
C / pf
150
Tj / C
Fig.14. Typical Turn-on Gate Charge Characteristics
VGE = f(QG); conditions: IC = 8 A.
10000
100
50
PMG35A
15
td(off)
1000
Cies
10
tf
100
5
Coes
Cres
10
0.01
0.1
1
10
VCE / V
100
0
2
4
6
8
10
IC / A
Fig.15. Typical Capacitances Cies, Coes, Cres
C = f(VCE); conditions: VGE = 0 V; f = 1 MHz
September 1998
E(off)
0
1000
Fig.18. Typical Switching Characteristics vs. IC
conditions: Tj=125 ˚C VCL=300 V; RG=1 kΩ; LC=5 mH.
5
Rev. 1.200
Philips Semiconductors
Product specification
Insulated Gate Bipolar Transistor
Protected Logic-Level IGBT
150
dVce/dt (V/us)
BUK866-400 IZ
PMG35A
35
V(BR)ECS / V
BUK856-400IZ
typ.
100
30
50
25
min.
0
0
1
2
3
Rg / kOhm
4
20
-50
5
Fig.19. Typical Turn-off dVCE/dt vs. RG
conditions: Tj=125 ˚C; IC=8 A; VCL=300 V; LC=5 mH.
0
50
Tj / degC
100
150
Fig.22. Reverse Breakdown Voltage
V(BR)ECS = f(Tj); conditions: IEC = 50 mA
Vcc
Vcc
Lc
Lc
t p : adjust for correct Ic
t p : adjust for correct Ic
V CL
D.U.T.
D.U.T.
RG
RG
VGE
VGE
IC measure
IC measure
0V
0V
0R1
0R1
Fig.20. Test circuit for inductive load switching times.
I
Fig.23. Test circuit for clamped turn-off energy test
I
C
Ic
90%
tf
td(off)
V
Vce
t
V(cl)cer
10%
t
90%
Vge
VCE
VGE
t
tc
P
Vce x Ic
Ecer
10%
t
t
Fig.21. Definitions of inductive load switching times.
September 1998
Fig.24. Definition of clamping energy ECER
6
Rev. 1.200
Philips Semiconductors
Product specification
Insulated Gate Bipolar Transistor
Protected Logic-Level IGBT
BUK866-400 IZ
MECHANICAL DATA
Plastic single-ended package (Philips version of D2-PAK); 2 leads
SOT404
A
A1
E
D1
D
HD
Lp
c
b
e
e
Q
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
b
c
D
D1
E
e
Lp
HD
Q
mm
4.5
4.1
1.40
1.27
0.85
0.60
0.64
0.46
9.65
8.65
1.6
1.2
10.3
9.7
2.54
2.9
2.1
15.4
14.8
2.60
2.20
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
97-06-16
SOT404
Fig.25. SOT404 surface mounting package. Centre pin connected to mounting base.
Notes
1. This product is supplied in anti-static packaging. The gate-source input must be protected against static
discharge during transport or handling.
2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.
3. Epoxy meets UL94 V0 at 1/8".
September 1998
7
Rev. 1.200
Philips Semiconductors
Product specification
Insulated Gate Bipolar Transistor
Protected Logic-Level IGBT
BUK866-400 IZ
MOUNTING INSTRUCTIONS
Dimensions in mm
11.5
9.0
17.5
2.0
3.8
5.08
Fig.26. SOT404 : soldering pattern for surface mounting.
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
 Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
September 1998
8
Rev. 1.200