QFET TM FQNL1N50B 500V N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switch mode power supply, power factor correction, electronic lamp ballast based on half bridge. • • • • • 0.27A, 500V, RDS(on) = 9.0Ω @VGS = 10 V Low gate charge ( typical 4.0 nC) Low Crss ( typical 3.0 pF) Fast switching Improved dv/dt capability D ! " G! ! " " " TO-92L ! FQNL Series GDS Absolute Maximum Ratings Symbol VDSS ID S TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current FQNL1N50B 500 Units V 0.27 A - Continuous (TC = 100°C) IDM Drain Current - Pulsed 0.17 A (Note 1) 1.08 A ± 30 V VGSS Gate-Source Voltage IAR Avalanche Current (Note 1) 0.27 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) (Note 1) 0.15 4.5 1.5 0.012 -55 to +150 mJ V/ns W W/°C °C 300 °C dv/dt PD TJ, TSTG TL (Note 2) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJA Parameter Thermal Resistance, Junction-to-Ambient ©2001 Fairchild Semiconductor Corporation Typ -- Max 83 Units °C/W Rev. A, March 2001 FQNL1N50B March 2001 Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units 500 -- -- V -- 0.5 -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C IDSS IGSSF IGSSR VDS = 500 V, VGS = 0 V -- -- 1 µA VDS = 400 V, TC = 125°C -- -- 10 µA Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA VDS = VGS, ID = 250 µA 2.3 3.0 3.7 V VDS = VGS, ID = 250 mA 3.6 4.3 5.0 V -- 6.8 9.0 Ω -- 0.55 -- S -- 115 150 pF -- 20 30 pF -- 3.0 4.0 pF -- 5 20 ns -- 25 60 ns Zero Gate Voltage Drain Current On Characteristics VGS(th) Gate Threshold Voltage RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 0.135 A gFS Forward Transconductance VDS = 50 V, ID = 0.135 A (Note 3) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 250 V, ID = 1.4 A, RG = 25 Ω (Note 3, 4) VDS = 400 V, ID = 1.4 A, VGS = 10 V (Note 3, 4) -- 8 25 ns -- 20 50 ns -- 4.0 5.5 nC -- 1.1 -- nC -- 2.2 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 0.27 A ISM -- -- 1.08 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 0.27 A Drain-Source Diode Forward Voltage trr Reverse Recovery Time --- -170 1.4 -- V ns Qrr Reverse Recovery Charge -- 0.4 -- µC VGS = 0 V, IS = 1.4 A, dIF / dt = 100 A/us (Note 3) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. ISD ≤ 1.4A, di/dt ≤ 200A/us, VDD ≤ BVDSS, Starting TJ = 25°C 3. Pulse Test : Pulse width ≤ 300us, Duty cycle ≤ 2% 4. Essentially independent of operating temperature ©2001 Fairchild Semiconductor Corporation Rev. A, March 2001 FQNL1N50B Electrical Characteristics FQNL1N50B Typical Characteristics 0 0 ID , Drain Current [A] Top : Bottom : 10 VGS 15 V 10 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V ID , Drain Current [A] 10 -1 10 150℃ -1 10 25℃ -55℃ ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ ※ Notes : 1. VDS = 50V 2. 250μ s Pulse Test -2 10 -2 -1 0 10 10 1 10 2 10 4 6 8 10 VGS , Gate-Source Voltage [V] VDS , Drain-Source Voltage [V] Figure 1. On-Region Characteristics. Figure 2. Transfer Characteristics. 24 0 10 VGS = 10V 16 IDR , Reverse Drain Current [A] RDS(on) , [ Ω ] Drain-Source On-Resistance 20 VGS = 20V 12 8 4 ※ Note : TJ = 25℃ 0 0.0 -1 10 150℃ ※ Note : 1. VGS = 0V 2. 250μ s Pulse Test -2 0.5 1.0 1.5 2.0 2.5 3.0 10 0.2 0.4 0.6 0.8 1.0 1.2 ID , Drain Current [A] VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage. Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature. 12 200 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd ※ Note ; 1. VGS = 0 V 2. f = 1 MHz Crss VGS, Gate-Source Voltage [V] Coss 100 50 VDS = 100V 10 VDS = 250V Ciss 150 Capacitances [pF] 25℃ VDS = 400V 8 6 4 2 ※ Notes : ID = 1.4 A 0 -1 10 0 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics. ©2001 Fairchild Semiconductor Corporation 0 1 2 3 4 5 QG, Total Gate Charge [nC] Figure 6. Gate -Charge Characteristics. Rev. A, March 2001 FQNL1N50B Typical Characteristics (Continued) 3.0 1.2 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 ※ Note : 1. VGS = 0 V 2. ID = 250 μ A 0.9 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 ※ Note : 1. VGS = 10 V 2. ID = 0.7 A 0.5 0.0 -100 200 -50 o 0 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs Temperature. Figure 8. On-Resistance Variation vs Temperature. 0.30 Operation in This Area is Limited by R DS(on) 0.25 0 100 µs 10 µs 1 ms 10 ms 100 ms -1 ID, Drain Current [A] ID, Drain Current [A] 10 10 DC -2 10 1s ※ Notes : o 1. TC = 25 C 0.20 0.15 0.10 0.05 o 2. TJ = 150 C 3. Single Pulse -3 10 0 1 10 2 10 0.00 25 3 10 10 50 Figure 9. Maximum Safe Operating Area. 100 125 150 Figure 10. Maximum Drain Current vs Case Temperature. 2 D = 0 .5 0 .2 10 1 0 .1 ※ N o te s : 1 . Z θ J C ( t) = 8 3 ℃ /W M a x . 2 . D u ty F a c t o r , D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C ( t) 0 .0 5 0 .0 2 10 PDM 0 .0 1 0 t1 t2 Z θ JC ( t) , T h e r m a l R e s p o n s e 10 75 TC, Case Temperature [℃] VDS, Drain-Source Voltage [V] s i n g l e p u ls e 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve. ©2001 Fairchild Semiconductor Corporation Rev. A, March 2001 FQNL1N50B Gate Charge Test Circuit & Waveform 50KΩ 12V VGS Same Type as DUT Qg 200nF 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL VDS 90% VDD VGS RG 10V DUT VGS 10% td(on) tr t on ©2001 Fairchild Semiconductor Corporation td(off) tf t off Rev. A, March 2001 FQNL1N50B Peak Diode Recovery dv/dt Test Circuit & Waveform DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2001 Fairchild Semiconductor Corporation Rev. A, March 2001 FQNL1N50B Package Dimensions TO-92L 0.70MAX. 1.00 ±0.10 1.70 ±0.20 13.50 ±0.40 8.00 ±0.20 4.90 ±0.20 0.80 ±0.10 1.00MAX. 0.50 ±0.10 1.27TYP [1.27 ±0.20] ©2001 Fairchild Semiconductor Corporation 0.45 ±0.10 3.90 ±0.20 0.45 ±0.10 3.90 ±0.20 1.45 ±0.20 2.54 TYP Rev. A, March 2001 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT™ FACT Quiet Series™ FAST® FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SLIENT SWITCHER® SMART START™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ UltraFET® VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2001 Fairchild Semiconductor Corporation Rev. H2