PI74ALVCH162820 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 3.3V 10-Bit Flip-Flop with Dual Outputs and 3-State Outputs Product Features Product Description • • • • Pericom Semiconductor’s PI74ALVCH series of logic circuits are produced in the Company’s advanced 0.5 micron CMOS technology, achieving industry leading speed. • • • • • PI74ALVCH162820 is designed for low voltage operation VCC = 2.3V to 3.6V Hysteresis on all inputs Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C Typical VOHV (Output VOH Undershoot) < 2.0V at VCC = 3.3V, TA = 25°C Output ports have equivalent 26Ω series resistors, no external resistors are required. Bus Hold retains last active bus state during 3-state eliminates the need for external pullup resistors Industrial operation at –40°C to +85°C Packages available: – 56-pin 240 mil wide plastic TSSOP (A) – 56-pin 300 mil wide plastic SSOP (V) The PI74ALVCH162820 is a 10-bit flip-flop designed for 2.3V to 3.3V VCC operation. The PI74ALVCH162820 is designed with edgetriggered D-type flip-flops. On the positive transition of clock (CLK) input, the device provides true data at the Q outputs. A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (HIGH or LOW level) or a highimpedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capacity to drive bus lines without the need for interface or pullup components. OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The outputs, which are designed to sink up to 12mA, include 26Ω resistors to reduce overshoot and undershoot. The PI74ALVCH162820 has “Bus Hold” which retains the data input’s last state whenever the data input goes to high-impedance preventing “floating” inputs and eliminating the need for pullup/ down resistors. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Logic Block Diagram 1 PS8094A 03/26/97 PI74ALVCH162820 3.3V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Truth Table(1) Product Pin Description Pin Name OE CLK Dx Qx GND VCC Description Output Enable Input (Active LOW) Clock Input (Active HIGH) Data Inputs 3-State Outputs Ground Power Inputs 1OE 1Q1 1 2 56 55 CLK 1Q2 2Q1 5 54 53 52 NC GND 3 4 2Q2 6 GND 11 4Q2 12 13 46 45 GND NC D5 NC 41 NC 17 18 40 39 D7 GND 19 20 21 38 37 36 NC 35 34 33 VCC 9Q2 22 23 24 GND 10Q1 25 26 32 31 GND 10Q2 27 28 30 29 NC GND 7Q2 8Q1 8Q2 VCC 9Q1 2OE H H L L L L L X Q0 H X X Z = = = = = = High Signal Level Low Signal Level Irrelevant High Impedance LOW-to-HIGH Transition 1,2 D4 43 42 7Q1 NC 44 6Q2 L D3 14 15 16 6Q1 Qn D2 4Q1 5Q1 5Q2 D GND NC VCC 3Q2 CLK D1 51 7 50 8 56-PIN 49 V56 48 9 A56 47 10 VCC 3Q1 OEn Note: 1. H L X Z ↑ n Product Pin Configuration Outputs D6 D8 NC D9 NC D10 NC 2 PS8094A 03/26/97 PI74ALVCH162820 3.3V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ........................................................... 65°C to +150°C Ambient Temperature with Power Applied ........................ 40°C to +85°C Input Voltage Range, VIN ...................................................... 0.5V to VCC +0.5V Output Voltage Range, VOUT ............................................... 0.5V to VCC +0.5V DC Input Voltage .................................................................... 0.5V to +5.0V DC Output Current ............................................................................ 100 mA Power Dissipation .................................................................................. 1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 3.3V ± 10%) Te s t Conditions (1) D e s cription VCC Supply Voltage VIH(3) Input HIGH Voltage VIL(3) Input LO W Voltage VIN(3) Input Voltage 0 VCC VOUT(3) O utput Voltage 0 VCC VOH VOL IOH(3) IOL(3) O utput HIGH Voltage O utput LO W Voltage O utput HIGH Current O utput LO W Current M in. Typ.(2) Parame te rs 2.3 VCC = 2.3V to 2.7V 1.7 VCC = 2.7V to 3.6V 2.0 M ax. 3.6 VCC = 2.3V to 2.7V 0.7 VCC = 2.7V to 3.6V 0.8 IOH = - 100mA, VCC = Min. to Max. VCC - 0.2 VIH = 1.7V, IOH = - 6mA, VCC = 2.3V 2.0 VIH = 1.7V, IOH = - 12mA, VCC = 2.3V 1.7 VIH = 2.0V, IOH = - 12mA, VCC = 2.7V 2.2 VIH = 2.0V, IOH = - 12mA, VCC = 3.0V 2.4 VIH = 2.0V, IOH = - 24mA, VCC = 3.0V 2.0 V IOL = 100mA, VIL = Min. to Max. 0.2 VIL = 0.7V, IOL = 6mA, VCC = 2.3V 0.4 VIL = 0.7V, IOL = 12mA, VCC = 2.3V 0.7 VIL = 0.8V, IOL = 12mA, VCC = 2.7V 0.4 VIL = 0.8V, IOL = 24mA, VCC = 3.0V 0.55 VCC = 2.3V - 12 VCC = 2.7V - 12 VCC = 3.0V - 24 VCC = 2.3V 12 VCC = 2.7V 12 VCC = 3.0V 24 3 Units mA PS8094A 03/26/97 PI74ALVCH162820 3.3V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 DC Electrical Characteristics-Continued (Over the Operating Range, TA = 40°C to +85°C, VCC = 3.3V ±10%) Parame te rs De s cription IIN Input Current IIN (HOLD) Te s t Conditions (1) M in. Typ.(2) VIN = VCC or GND, VCC = 3.6V Input Hold Current M ax. ±5 VIN = 0.7V, VCC = 2.3V 45 VIN = 1.7V, VCC = 2.3V - 45 VIN = 0.8V, VCC = 3.0V 75 VIN = 2.0V, VCC = 3.0V - 75 VIN = 0 to 3.6V, VCC = 3.6V ±500 IOZ Output Current (3- STATE Outputs) VOUT = VCC or GND, VCC = 3.6V ±10 ICC Supply Current VCC = 3.6V, IOUT = 0mA, VIN = GND or VCC 40 DICC Supply Current per Input @ TTL HIGH VCC = 3.0V to 3.6V One Input at VCC - 0.6V Other Inputs at VCC or GND 750 CI CO Control Inputs Data Inputs Outputs Units mA 3.5 VIN = VCC or GND, VCC = 3.3V 6 VO = VCC or GND, VCC = 3.3V pF 7 Notes: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading. 3. Unused Control Inputs must be held HIGH or LOW to prevent them from floating. Timing Requirements over Operating Range Parame te rs D e s cription fCLOCK VCC = 2.5V ± 0.2V VCC = 2.7V VCC = 3.3V ± 0.3V M in. M ax. M in. M ax. M in. M ax. 0 150 0 150 0 150 tW Pulse duration CLK HIGH or LO W 3.3 3.3 3.3 tSU Setup time, data before CLK 1.7 1.8 1.4 tH Hold time, data after CLK 1.1 1.1 1.0 Dt/Dv(3) Input Transition Rise or Fall 0 10 0 10 0 Units MHz ns 10 ns/V Note: 1. Unused control inputs must be held HIGH or LOW to prevent them from floating. 4 PS8094A 03/26/97 PI74ALVCH162820 3.3V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switching Characteristics over Operating Range(1) Parame te rs VCC = 2.5V ± 0.2V VCC = 2.7V From To (INPUT) (OUTPUT) M ax. M in.(2) M ax. M in.(2) fMAX 150 VCC = 3.3V ± 0.3V M in.(2) 150 Units M ax.(2) 150 tPD CLK Q 1.0 7.0 6.2 1.0 5.4 tEN OE Q 1.0 7.4 6.8 1.0 5.6 tDIS OE Q 1.3 6.4 5.5 1.0 5.0 ns Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. Operating Characteristics, TA = 25ºC Parame te r CPD Power Dissipation Capacitance Te s t Conditions Outputs Enabled Outputs Disabled CL = 50pF, f = 10 MHz VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V Typical 68 66 39 47 Units pF Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 5 PS8094A 03/26/97