INA271-HT www.ti.com SBOS521C – SEPTEMBER 2010 – REVISED APRIL 2012 VOLTAGE OUTPUT, UNIDIRECTIONAL MEASUREMENT CURRENT-SHUNT MONITOR Check for Samples: INA271-HT FEATURES DESCRIPTION • • • The INA271 is a current-shunt monitor with voltage output and can sense drops across current shunts at common-mode voltages from –16V to +80V, independent of the supply voltage. The INA271 pinouts readily enable filtering. 1 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 • • • • • Wide Common-Mode Range: –16V to +80V CMRR: 78dB Accuracy: ±10mV Offset (max) ±7.5% Gain Error (max) 100μV/°C Offset Drift (max) Bandwidth: Up to 130kHz Transfer Function: 20V/V Quiescent Current: 1300μA (max) Power Supply: +2.7V to +18V Provision for Filtering The INA271 is available with a 20V/V output voltage scale. The 130kHz bandwidth simplifies use in current-control loops. The INA271 operates from a single +2.7V to +18V supply, drawing a maximum of 1300μA of supply current. This device is specified over the extended operating temperature range of –55°C to +210°C. RS APPLICATIONS • • • • • • (1) Load Single-Pole Filter Capacitor Down-Hole Drilling High Temperature Environments SUPPORTS EXTREME TEMPERATURE APPLICATIONS • • • • -16V to +80V Supply Controlled Baseline One Assembly/Test Site One Fabrication Site Available in Extreme (–55°C/210°C) Temperature Range (1) Extended Product Life Cycle Extended Product-Change Notification Product Traceability Texas Instruments high temperature products utilize highly optimized silicon (die) solutions with design and process enhancements to maximize performance over extended temperatures. IN+ PRE OUT IN- 5kW +2.7V to +18V BUF IN V+ 5kW OUT A1 96kW A2 RL INA271 GND Custom temperature ranges available 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2010–2012, Texas Instruments Incorporated INA271-HT SBOS521C – SEPTEMBER 2010 – REVISED APRIL 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. BARE DIE INFORMATION DIE THICKNESS BACKSIDE FINISH BACKSIDE POTENTIAL BOND PAD METALLIZATION COMPOSITION BOND PAD THICKNESS 11 mils. Silicon with backgrind GND Al-Cu (0.5%) 598 nm ½ 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 ½ IN1 IN+ 8 GND 2 NC 7 3 PRE OUT 1278 mm ½ 762.3 mm V+ 6 40.5 mm BUF IN OUT 5 4 0.0 ½ 0.0 40.5 mm Table 1. Bond Pad Coordinates in Microns 2 DISCRIPTION PAD NUMBER X min Y min X max Y max IN- 1 64.35 1012.41 139.41 1087.47 GND 2 61.83 648.81 136.89 723.87 PRE OUT 3 61.83 520.29 136.89 595.35 BUF IN 4 70.92 152.37 145.98 227.43 OUT 5 616.32 152.37 691.38 227.43 461.61 V+ 6 621.99 386.55 697.05 NC 7 622.44 648.81 697.5 723.87 IN+ 8 622.89 1012.41 697.95 1087.47 Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): INA271-HT INA271-HT www.ti.com SBOS521C – SEPTEMBER 2010 – REVISED APRIL 2012 PIN CONFIGURATION HKQ PACKAGE (TOP VIEW) AHD OR HKJ PACKAGE (TOP VIEW) IN- 1 GND 2 1 8 IN- IN+ IN+ 7 NC NC GND V+ PRE OUT 8 INA271 PRE OUT 3 6 V+ BUF IN 4 5 OUT OUT 5 BUF IN 4 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 HKQ as formed or HKJ mounted dead bug NC denotes no internal connection ORDERING INFORMATION (1) TA PACKAGE –55°C to 175°C (2) ORDERABLE PART NUMBER TOP-SIDE MARKING INA271AHD AHD INA271AHD KGD (bare die) INA271SKGD1 NA HKJ INA271SHKJ INA271SHKJ HKQ INA271SHKQ INA271SHKQ –55°C to 210°C (1) (2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. ABSOLUTE MAXIMUM RATINGS (1) Supply Voltage (VS) UNIT +18 V Differential, (VIN+) – (VIN–) –18 to +18 V Common-Mode –16 to +80 V Analog Inputs, VIN+, VIN–: Analog Output: OUT and PRE OUT Pins GND – 0.3 to (V+) + 0.3 V 5 mA Operating Temperature –55 to +210 °C Storage Temperature –65 to +210 °C Junction Temperature +210 °C Human Body Model 3000 V Charged-Device Model 750 V Input Current Into Any Pin ESD Ratings: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. THERMAL CHARACTERISTICS FOR HKJ OR HKQ PACKAGE over operating free-air temperature range (unless otherwise noted) PARAMETER θJC Junction-to-case thermal resistance to ceramic side of case to top of case lid (metal side of case) MIN TYP MAX 5.7 13.7 Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): INA271-HT UNIT °C/W 3 INA271-HT SBOS521C – SEPTEMBER 2010 – REVISED APRIL 2012 www.ti.com ELECTRICAL CHARACTERISTICS At TA = +25°C, VS = +5V, VCM = +12V, VSENSE = 100mV, and PRE OUT connected to BUF IN, unless otherwise noted. TA = –55°C to 125°C PARAMETER CONDITIONS MIN TYP MAX 0.15 (VS – 0.2)/Gain TA = –55°C to 175°C MIN TYP MAX TA = 210°C MIN TYP MAX UNIT 0.15 (VS – 0.2)/Gain V 80 V INPUT VSENSE Common-Mode Input Range VCM Common-Mode Rejection Ratio CMRR Offset Voltage, RTI (1) VSENSE = (VIN+) + (VIN–) –16 80 –16 VIN+ = –16V to +80V 80 120 70 78 VIN+ = +12V to +80V 100 120 81 89 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Full-Scale Input Voltage vs Temperature VOS dVOS/dT vs Power-Supply PSR Input Bias Current, VIN– Pin VS = +2.7V to +18V, VCM = +18V IB dB ±0.6 ±3 ±5 ±10 mV 3.3 20 42 100 μV/°C 5 100 130 320 μV/V ±8 ±16 ±16 ±25 μA PRE OUT Output Impedance (2) 96 96 kΩ Buffer Input Bias Current –50 –50 nA ±0.03 ±0.03 nA/°C 20 20 V/V Buffer Input Bias Current Temperature Coefficient OUTPUT (VSENSE ≥ 20mV) (3) Gain: INA271 Total Gain G Output Buffer Gain GBUF Total Gain Error 2 VSENSE = 20mV to 100mV vs Temperature ±2 50 Total Output Error (4) ±1 Nonlinearity Error Output Impedance 2 ±0.2 VSENSE = 20mV to 100mV RO Maximum Capacitive Load No Sustained Oscillation VOLTAGE OUTPUT (5) ±1 V/V ±7.5 300 ±3 ±4.6 % ppm/°C ±11.5 % ±0.002 ±0.002 % 1.5 1.5 Ω 10 10 nF RL = 10kΩ to GND Swing to V+ Power-Supply Rail (V+) – 0.05 (V+) – 0.2 (V+) – 0.13 (V+) – 0.2 V Swing to GND (6) VGND + 0.003 VGND + 0.05 VGND + 0.22 VGND + 0.42 V FREQUENCY RESPONSE Bandwidth Phase Margin Slew Rate Settling Time (1%) (1) (2) (3) (4) (5) (6) 4 BW CLOAD = 5pF 130 130 kHz CLOAD < 10nF 40 40 degrees 1 1 V/μs 2 2 μs SR tS VSENSE = 10mV to 100mVPP, CLOAD = 5pF RTI means Referred-to-Input. Initial resistor variation is ±30% with an additional –2200ppm/°C temperature coefficient. For output behavior when VSENSE < 20mV, see the Application Information section Accuracy Variations as A Result of VSENSE and Common-Mode Voltage. Total output error includes effects of gain error and VOS. See typical characteristic curve Output Swing vs Output Current and Application Information section Accuracy Variations as A Result of VSENSE and Common-Mode Voltage. Ensured by design; not production tested. Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): INA271-HT INA271-HT www.ti.com SBOS521C – SEPTEMBER 2010 – REVISED APRIL 2012 ELECTRICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +5V, VCM = +12V, VSENSE = 100mV, and PRE OUT connected to BUF IN, unless otherwise noted. TA = –55°C to 125°C PARAMETER CONDITIONS MIN TYP MAX TA = –55°C to 175°C MIN TYP MAX TA = 210°C MIN TYP MAX UNIT NOISE < RTI (7) Voltage Noise Density en 40 40 nV/√Hz POWER SUPPLY Operating Range VS IQ 18 740 2.7 1200 18 1160 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Quiescent Current 2.7 VOUT = 2V VSENSE = 0mV 350 950 1300 895 1300 V μA TEMPERATURE RANGE Specified Temperature Range –55 125 –55 210 °C Operating Temperature Range –55 125 –55 210 °C (7) RTI means Referred-to-Input. 1000 Estimated Life - Years 100 10 Electromigration Fail Mode 1 0 110 130 150 170 190 210 230 Continuous TJ - °C (1) See datasheet for absolute maximum and minimum recommended operating conditions. (2) Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life). Figure 1. INA271SKGD1/INA271SHKJ/INA271SHKQ Operating Life Derating Chart Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): INA271-HT 5 INA271-HT SBOS521C – SEPTEMBER 2010 – REVISED APRIL 2012 www.ti.com TYPICAL CHARACTERISTICS At TA = +25°C, VS = +12V, VCM = 12V, and VSENSE = 100mV, unless otherwise noted. GAIN vs FREQUENCY CLOAD = 1000pF 40 35 35 30 Gain (dB) 40 G = 20 25 G = 14 20 15 CLOAD = 0pF 30 G = 20 25 G = 14 20 15 10 10 5 5 10k 10k 1M 14 Figure 2. Figure 3. GAIN PLOT COMMON-MODE AND POWER-SUPPLY REJECTION vs FREQUENCY 140 130 20V/V 12 10 8 14V/V 6 4 1M Frequency (Hz) Common-Mode and Power-Supply Rejection (dB) 16 100k Frequency (Hz) VS = 18V 120 CMRR 110 100 90 PSR 80 70 60 50 2 1300 1100 1200 900 1000 800 700 500 600 300 0 400 40 0 100 18 100k 200 20 VOUT (V) GAIN vs FREQUENCY 45 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Gain (dB) 45 10 100 1k 10k 100k Frequency (Hz) VSENSE (mV) Figure 5. TOTAL OUTPUT ERROR vs VSENSE OUTPUT ERROR vs COMMON-MODE VOLTAGE 0.10 0.09 3.5 0.08 3.0 Output Error (%) Total Output Error (% error of the ideal output value) 4.0 Figure 4. 2.5 2.0 1.5 1.0 0.07 0.06 0.05 0.04 0.03 0.02 0.5 0.01 0 0 50 100 150 200 250 300 350 400 450 500 0 -16 -12 -8 -4 VSENSE (mV) Figure 6. 6 0 4 8 12 16 20 ... 76 80 Common-Mode Voltage (V) Figure 7. Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): INA271-HT INA271-HT www.ti.com SBOS521C – SEPTEMBER 2010 – REVISED APRIL 2012 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +12V, VCM = 12V, and VSENSE = 100mV, unless otherwise noted. POSITIVE OUTPUT VOLTAGE SWING vs OUTPUT CURRENT QUIESCENT CURRENT vs OUTPUT VOLTAGE 1000 12 11 800 Sourcing Current 9 +25°C 8 700 -40°C +125°C 7 6 IQ (mA) Output Voltage (V) 900 VS = 12V 10 Sourcing Current +25°C 4 3 2 1 -40°C 0 400 300 Output stage is designed to source current. Current sinking capability is approximately 400mA. +125°C 0 500 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 VS = 3V 5 600 200 100 0 5 10 20 15 25 30 0 2 1 3 4 Output Current (mA) 775 IQ (mA) 675 575 475 275 175 7 8 Figure 9. QUIESCENT CURRENT vs COMMON-MODE VOLTAGE OUTPUT SHORT-CIRCUIT CURRENT vs SUPPLY VOLTAGE 34 VSENSE = 100mV: VS = 12V VS = 2.7V VS = 12V 375 6 Figure 8. VSENSE = 0mV: VS = 2.7V Output Short-Circuit Current (mA) 875 5 9 10 Output Voltage (V) -40°C 30 +25°C 26 +125°C 22 18 14 10 6 -16 -12 -8 -4 0 4 8 12 16 20 ... 76 80 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5 11.5 17 VCM (V) Supply Voltage (V) Figure 10. Figure 11. PREOUT OUTPUT RESISTANCE PRODUCTION DISTRIBUTION 18 BUFFER GAIN vs FREQUENCY 200 150 Gain (dB) Population Phase 100 50 Gain 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 0 -50 10 100 1k 10k 100k 1M 10M Frequency (Hz) RPREOUT (kW) Figure 12. Figure 13. Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): INA271-HT 7 INA271-HT SBOS521C – SEPTEMBER 2010 – REVISED APRIL 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +12V, VCM = 12V, and VSENSE = 100mV, unless otherwise noted. 8 500mV/div LARGE-SIGNAL STEP RESPONSE 10mV TO 100mV INPUT 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 50mV/div SMALL-SIGNAL STEP RESPONSE 10mV TO 20mV INPUT 10ms/div 10ms/div Figure 14. Figure 15. Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): INA271-HT INA271-HT www.ti.com SBOS521C – SEPTEMBER 2010 – REVISED APRIL 2012 APPLICATIONS INFORMATION BASIC CONNECTION POWER SUPPLY Figure 16 shows the basic connection of the IINA271. The input pins, IN+ and IN–, should be connected as closely as possible to the shunt resistor to minimize any resistance in series with the shunt resistance. The input circuitry of the INA271 can accurately measure beyond its power-supply voltage, V+. For example, the V+ power supply can be 5V, whereas the load power-supply voltage is up to +80V. The output voltage range of the OUT terminal, however, is limited by the voltages on the power-supply pin. 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Power-supply bypass capacitors are required for stability. Applications with noisy or high-impedance power supplies may require additional decoupling capacitors to reject power-supply noise. Minimum bypass capacitors of 0.01μF and 0.1μF in value should be placed close to the supply pins. Although not mandatory, an additional 10mF electrolytic capacitor placed in parallel with the other bypass capacitors may be useful in applications with particularly noisy supplies. SELECTING RS The value chosen for the shunt resistor, RS, depends on the application and is a compromise between small-signal accuracy and maximum permissible voltage loss in the measurement line. High values of RS provide better accuracy at lower currents by minimizing the effects of offset, while low values of RS minimize voltage loss in the supply line. For most applications, best performance is attained with an RS value that provides a full-scale shunt voltage range of 50mV to 100mV. Maximum input voltage for accurate measurements is (VS – 0.2)/Gain. RS -16V to +80V Supply Load Single-Pole Filter Capacitor +2.7V to +18V IN+ PRE OUT IN- 5kW BUF IN 0.01mF V+ 0.1mF 5kW OUT A1 96kW A2 RL INA271 GND Figure 16. INA271 Basic Connections Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): INA271-HT 9 INA271-HT SBOS521C – SEPTEMBER 2010 – REVISED APRIL 2012 www.ti.com TRANSIENT PROTECTION resistors in series with the inputs since the internal gain resistors can vary up to ±30%, but is tightly matched (if gain accuracy is not important, then resistors can be added in series with the INA271 inputs with two equal resistors on each input). The –16V to +80V common-mode range of the INA271 is ideal for withstanding automotive fault conditions ranging from 12V battery reversal up to +80V transients, since no additional protective components are needed up to those levels. In the event that the INA271 is exposed to transients on the inputs in excess of their ratings, external transient absorption with semiconductor transient absorbers (zeners or Transzorbs) will be necessary. OUTPUT VOLTAGE RANGE The output of the INA271 is accurate within the output voltage swing range set by the power-supply pin, V+. 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Use of MOVs or VDRs is not recommended except when they are used in addition to a semiconductor transient absorber. Select the transient absorber such that it will never allow the INA271 to be exposed to transients greater than 80V (that is, allow for transient absorber tolerance, as well as additional voltage because of transient absorber dynamic impedance). Despite the use of internal zener-type ESD protection, the INA271 is not suited to using external The INA271 readily enables the inclusion of filtering between the preamp output and buffer input. Singlepole filtering can be accomplished with a single capacitor because of the 96kΩ output impedance at PRE OUT on pin 3, as shown in Figure 17a. The INA271 readily lends itself to second-order Sallen-Key configurations, as shown in Figure 17b. When designing these configurations consider that the PRE OUT 96kΩ output impedance exhibits an initial variation of ±30% with the addition of a –2200ppm/°C temperature coefficient. RS Load Supply RS Load Supply Second-Order, Sallen-Key Filter Connection CFILT Single-Pole Filter Capacitor +2.7V to +18V IN+ PRE OUT IN- 5kW BUF IN V+ IN+ 5kW 5kW Output A1 +2.7V to +18V BUF IN V+ 5kW A1 96kW A2 PRE OUT IN- CFILT RS 96kW A2 RL Output RL INA271 INA271 GND a) Single-Pole Filter GND b) Second-Order, Sallen-Key Filter Figure 17. The INA271 can be easily connected for first- or second-order filtering. Remember to use the appropriate buffer gain of 2 when designing Sallen-Key configurations. 10 Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): INA271-HT INA271-HT www.ti.com SBOS521C – SEPTEMBER 2010 – REVISED APRIL 2012 ACCURACY VARIATIONS AS A RESULT OF VSENSE AND COMMON-MODE VOLTAGE The accuracy of the INA271 current shunt monitor is a function of two main variables: VSENSE (VIN+ – VIN–) and common-mode voltage, VCM, relative to the supply voltage, VS. VCM is expressed as (VIN+ + VIN–)/2; however, in practice, VCM is seen as the voltage at VIN+ because the voltage drop across VSENSE is usually small. This region of operation has slightly less accuracy than Normal Case 1 as a result of the common-mode operating area in which the part functions, as seen in the Output Error vs Common-Mode Voltage curve (Figure 7). As noted, for this graph VS = 12V; for VCM < 12V, the Output Error increases as VCM becomes less than 12V, with a typical maximum error of 0.005% at the most negative VCM = –16V. Low VSENSE Case 1: VSENSE < 20mV, –16V ≤ VCM < 0; and Low VSENSE Case 3: VSENSE < 20mV, VS < VCM ≤ 80V 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 This section addresses the accuracy of these specific operating regions: Normal Case 1: VSENSE ≥ 20mV, VCM ≥ VS Normal Case 2: VSENSE ≥ 20mV, VCM < VS Low VSENSE Case 1: VSENSE < 20mV, –16V ≤ VCM < 0 Low VSENSE Case 2: VSENSE < 20mV, 0V ≤ VCM ≤ VS Low VSENSE Case 3: VSENSE < 20mV, VS < VCM ≤ 80V Normal Case 2: VSENSE ≥ 20mV, VCM < VS Normal Case 1: VSENSE ≥ 20mV, VCM ≥ VS This region of operation provides the highest accuracy. Here, the input offset voltage is characterized and measured using a two-step method. First, the gain is determined by Equation 1. VOUT1 - VOUT2 G= 100mV - 20mV (1) Although the INA271 is not designed for accurate operation in either of these regions, some applications are exposed to these conditions. For example, when monitoring power supplies that are switched on and off while VS is still applied to the INA271, it is important to know what the behavior of the device will be in these regions. As VSENSE approaches 0mV, in these VCM regions, the device output accuracy degrades. A larger-thannormal offset can appear at the current shunt monitor output with a typical maximum value of VOUT = 60mV for VSENSE = 0mV. As VSENSE approaches 20mV, VOUT returns to the expected output value with accuracy as specified in the Electrical Characteristics. Figure 18 shows this effect (Gain = 20). 0.40 where: VOUT1 = Output Voltage with VSENSE = 100mV VOUT2 = Output Voltage with VSENSE = 20mV 0.36 0.32 (2) In the Typical Characteristics, the Output Error vs Common-Mode Voltage curve (Figure 7) shows the highest accuracy for the this region of operation. In this plot, VS = 12V; for VCM ≥ 12V, the output error is at its minimum. This case is also used to create the VSENSE ≥ 20mV output specifications in the Electrical Characteristics table. 0.28 VOUT (V) Then the offset voltage is measured at VSENSE = 100mV and referred to the input (RTI) of the current shunt monitor, as shown in Equation 2. VOUT1 VOSRTI (Referred-To-Input) = - 100mV G 0.24 Actual 0.20 0.16 Ideal 0.12 0.08 0.04 0 0 2 4 6 8 10 12 14 16 18 20 VSENSE (mV) Figure 18. Example for Low VSENSE Cases 1 and 3 (Gain = 20) Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): INA271-HT 11 INA271-HT SBOS521C – SEPTEMBER 2010 – REVISED APRIL 2012 www.ti.com SHUTDOWN This region of operation is the least accurate for the INA271. To achieve the wide input common-mode voltage range, this device uses two op amp front ends in parallel. One op amp front end operates in the positive input common-mode voltage range, and the other in the negative input region. For this case, neither of these two internal amplifiers dominates and overall loop gain is very low. Within this region, VOUT approaches voltages close to linear operation levels for Normal Case 2. The INA271 does not provide a shutdown pin; however, because it consumes a quiescent current less than 1mA, it can be powered by either the output of logic gates or by transistor switches to supply power. Driving the gate low shuts down the INA271. Use a totem-pole output buffer or gate that can provide sufficient drive along with 0.1μF bypass capacitor, preferably ceramic with good highfrequency characteristics. This gate should have a supply voltage of 3V or greater because the INA271 requires a minimum supply greater than 2.7V. In addition to eliminating quiescent current, this gate also turns off the 10μA bias current present at each of the inputs. Note that the IN+ and IN– inputs are able to withstand full common-mode voltage under all powered and under-powered conditions. An example shutdown circuit is illustrated in Figure 20. 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Low VSENSE Case 2: VSENSE < 20mV, 0V ≤ VCM ≤ VS This deviation from linear operation becomes greatest the closer VSENSE approaches 0V. Within this region, as VSENSE approaches 20mV, device operation is closer to that described by Normal Case 2. Figure 19 illustrates this behavior for the INA271. The VOUT maximum peak for this case is determined by maintaining a constant VS, setting VSENSE = 0mV, and sweeping VCM from 0V to VS. The exact VCM at which VOUT peaks during this case varies from part to part. The maximum peak voltage for the INA271 is 0.4V. 0.48 0.44 INA271 VOUT Limit 0.40 VCM1 Ideal 0.36 VCM2 0.32 VOUT (V) (1) 0.28 VCM3 0.24 0.20 0.16 VOUT limit at VSENSE = 0mV, 0 £ VCM1 £ VS VCM4 0.12 VCM2, VCM3, and VCM4 illustrate the variance from part to part of the VCM that can cause maximum VOUT with VSENSE < 20mV. 0.08 0.04 0 0 2 4 6 8 10 12 14 16 18 20 22 VSENSE (mV) NOTE: (1) INA271 VOUT Limit = 0.4V. INA270 VOUT Limit = 0.28V. Figure 19. Example for Low VSENSE Case 2 (Gain = 20) 12 24 RFI/EMI Attention to good layout practices is always recommended. Keep traces short and, when possible, use a printed circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible. Small ceramic capacitors placed directly across amplifier inputs can reduce RFI/EMI sensitivity. PCB layout should locate the amplifier as far away as possible from RFI sources. Sources can include other components in the same system as the amplifier itself, such as inductors (particularly switched inductors handling a lot of current and at high frequencies). RFI can generally be identified as a variation in offset voltage or dc signal levels with changes in the interfering RF signal. If the amplifier cannot be located away from sources of radiation, shielding may be needed. Twisting wire input leads makes them more resistant to RF fields. The difference in input pin location of the INA271 versus the INA193–INA198 may provide different EMI performance. Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): INA271-HT INA271-HT www.ti.com SBOS521C – SEPTEMBER 2010 – REVISED APRIL 2012 IL RS -16V to +80V Supply Single-Pole Filter Capacitor IN+ PRE OUT IN5kW BUF IN V+ 5kW 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Negative and Positive Common-Mode Voltage Load V+ > 3V OUT A1 74HC04 0.1mF 96kW A2 RL INA271 GND (1) 74HC04 is not tested or characterized at 210°C. Figure 20. INA271 Example Shutdown Circuit Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): INA271-HT 13 PACKAGE OPTION ADDENDUM www.ti.com 25-Apr-2012 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp INA271SHKJ ACTIVE CFP HKJ 8 25 TBD Call TI N / A for Pkg Type INA271SHKQ PREVIEW CFP HKQ 8 25 TBD Call TI Call TI INA271SKGD1 ACTIVE XCEPT KGD 0 252 TBD Call TI N / A for Pkg Type (1) (3) Samples (Requires Login) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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