® T UCT ROD ACEMEN at P E r T L e E P t en OL RE OBS ENDED upport C om/tsc lS MM sil.c ECO Technica w.inter R O w N Data r w December 1994, Rev A uSheet I L or act o cont -INTERS 8 1-88 Wideband Variable-Gain Amplifier with Gain of 10 The EL4452 is a complete variablegain circuit. It offers wide bandwidth and excellent linearity, while including a powerful output voltage amplifier, drawing modest current. The higher gain and lower input noise makes the EL4452 ideal for use in AGC systems. The EL4452 operates on ±5V to ±15V and has an analog input range of ±0.5V. AC characteristics do not change appreciably over the supply range. The circuit has an operational temperature of -40°C to +85°C and is packaged in 14-pin PDIP and SO-14. EL4452 FN7170 Features • Complete variable-gain amplifier complete with output amplifier • Compensated for Gain ≥ 10 • 50MHz signal bandwidth • 50MHz gain-control bandwidth • Low 29nV/√Hz input noise • Operates on ±5V to ±15V supplies • All inputs are differential • > 70dB attenuation @ 5MHz Applications The EL4452 is fabricated with Elantec’s proprietary complementary bipolar process which gives excellent signal symmetry and is very rugged. • AGC variable-gain amplifier Pinout • Transducer amplifier • IF amplifier Ordering Information EL4452 (14-PIN PDIP, SO) TOP VIEW 1 PART NUMBER TEMP. RANGE PACKAGE PKG. NO. EL4452CN -40°C to +85°C 14-Pin PDIP MDP0031 EL4452CS -40°C to +85°C 14-Pin SO MDP0027 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners. EL4452 Absolute Maximum Ratings (TA = 25°C) V+ VS VIN ∆VIN IIN Positive Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 16.5V V+ to V- Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .33V Voltage at any Input or Feedback . . . . . . . . . . . . . . . V+ to VDifference between Pairs of Inputs or Feedback. . . . . . . . .6V Current into any Input or Feedback Pin. . . . . . . . . . . . . . 4mA IOUT PD TA TS Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA Maximum Power Dissipation . . . . . . . . . . . . . . . . See Curves Operating Temperature Range . . . . . . . . . . . .-40°C to +85°C Storage Temperature Range. . . . . . . . . . . . .-60°C to +150°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Open-Loop DC Electrical Specifications PARAMETER VDIFF Power supplies at ±5V, TA = 25°C, RF = 910Ω, RG = 100Ω, RL = 500Ω DESCRIPTION Signal Input Differential Input Voltage Clipping MIN TYP 0.4 0.5 V 0.4 V ±2.0 ±2.8 V ±12.0 ±12.8 V 0.6% Nonlinearity VCM Common-Mode Range (All Inputs; VDIFF = 0) VS = ±5V VS = ±15V MAX UNITS VOS Input Offset Voltage 10 mV VOS, FB Output Offset Voltage 10 mV VG, 100% Extrapolated Voltage for 100% Gain VG, 0% Extrapolated Voltage for 0% Gain VG, 1V 1.8 2.1 2.2 V -0.16 -0.06 0.04 V Gain at VGAIN = 1 (RF = 910Ω, RG = 100Ω) 4.9 5.35 5.9 V/V IB Input Bias Current (All Inputs) -20 -9 0 µA IOS Input Offset Current Between VIN+ and VIN-, VGAIN+ and VGAIN- 0.5 4 µA FT Signal Feedthrough, VG = -1V -100 -70 dB RIN, Signal Input Resistance, Signal Input 25 60 kΩ RIN, Gain Input Resistance, Gain Input 50 120 kΩ RIN, FB Input Resistance, Feedback 25 60 kΩ CMRR Common-Mode Rejection Ratio, VIN 70 90 dB PSRR Power-Supply Rejection Ratio, VOS, FB; Supplies from ±5V to ±15V 65 83 dB EG Gain Error, Excluding Feedback Resistors, VGAIN = 2.5V -7 NL Nonlinearity, VIN from -0.25V to +0.25, VGAIN = 1V VO Output Voltage Swing (VIN = 0, VREF Varied) VS = ±5V ±2.5 ±2.8 V VS= ±15V ±12.5 ±12.8 V 40 85 mA ISC Output Short-Circuit Current IS Supply Current, VS = ±15V 2 0.3 15.5 +7 % 0.6 % 18 mA EL4452 Closed-Loop AC Electrical Specifications PARAMETER Power supplies at ±12V, TA = 25°C, RL = 500Ω, CL = 15pF DESCRIPTION MIN TYP MAX UNITS BW, -3dB -3dB Small-Signal Bandwidth, Signal Input 50 MHz BW, ±0.1dB 0.1dB Flatness Bandwidth, Signal Input 10 MHz Peaking Frequency Response Peaking 0.1 dB BW, Gain -3dB Small-Signal Bandwidth, Gain Input 50 MHz SR Slew Rate, VOUT between -2V and +2V VN Input-Referred Noise Voltage Density 350 Test Circuit Note: For typical performance curves, RF = 910Ω, RG = 100Ω, VGAIN = 1V, RL = 500Ω, and CL = 15pF unless otherwise noted. 3 400 29 550 V/µs nV/rt√Hz EL4452 Typical Performance Curves Frequency Response for Various Feedback Divider Ratios Frequency Response for Various Gains Frequency Response for Various RL, CL, VS = ±5V Frequency Response for Various RL, CL, VS = ±15V -3dB Bandwidth vs. Supply Voltage 4 -3dB Bandwidth vs. Die Temperature EL4452 Typical Performance Curves (Continued) Gain and -3dB Bandwidth vs. Load Resistance Slew Rate vs. Supply Voltage Input Voltage Noise vs. Frequency 5 Input Common-Mode Rejection Ratio vs. Frequency Slew Rate vs. Die Temperature Nonlinearity vs. Input Signal EL4452 Typical Performance Curves (Continued) Bias Current vs. Die Temperature Gain vs. VGAIN Change in VG, 100% and VG, 0% vs. Die Temperature VG, 0% and VG, 100% vs. Supply Voltage Common Mode Input Range vs. Supply Voltage Supply Current vs. Supply Voltage 6 EL4452 Typical Performance Curves (Continued) Supply Current vs. Die Temperature Applications Information The EL4452 is a complete two-quadrant multiplier/gain control with 50MHz bandwidth. It has three sets of inputs; a differential signal input VIN, a differential gain-controlling input VGAIN, and another differential input which is used to complete a feedback loop with the output. Here is a typical connection: The gain of the feedback divider is H. The transfer function of the part is: VOUT = AO × (((VIN+) - (VIN-)) × ((VGAIN+) - (VGAIN-)) + (VREF - VFB)). 14-Pin Package Power Dissipation vs. Ambient Temperature It is important to keep the feedback divider’s impedance at the FB terminal low so that stray capacitance does not diminish the loop’s phase margin. The pole caused by the parallel impedance of the feedback resistors and stray capacitance should be at least 130MHz; typical strays of 3pF thus require a feedback impedance of 400Ω or less. Alternatively, a small capacitor across RF can be used to create more of a frequency-compensated divider. The value of the capacitor should scale with the parasitic capacitance at the FB input. It is also practical to place small capacitors across both the feedback and the gain resistors (whose values maintain the desired gain) to swamp out parasitics. For instance, a 3pF capacitor across RF and 27pF to ground will dominate parasitic effects in a 1/10 divider and allow a higher divider resistance. The REF pin can be used as the output’s ground reference, for DC offsetting of the output, or it can be used to sum in another signal. Gain-Control Characteristics VOUT = (((VIN+) - (VIN-)) × 1/2 ((VGAIN+) - (VGAIN)) + VREF)/H, The quantity VGAIN in the above equations is bounded as 0 ≤ VGAIN ≤ 2, even though the externally applied voltages exceed this range. Actually, the gain transfer function around 0 and 2V is “soft”; that is, the gain does not clip abruptly below the 0%-VGAIN voltage nor above the 100%-VGAIN level. An overdrive of 0.3V must be applied to VGAIN to obtain truly 0% or 100%. Because the 0%- or 100%- VGAIN levels cannot be precisely determined, they are extrapolated from two points measured inside the slope of the gain transfer curve. Generally, an applied VGAIN range of -0.5V to +2.5V will assure the full numerical span of 0 ≤ VGAIN ≤ 2. VOUT = (VIN × 1/2 VGAIN + VREF)/H The gain control has a small-signal bandwidth equal to the VIN channel bandwidth, and overload recovery resolves in about 20nsec. VFB is connected to VOUT through a feedback network, so VFB = H × VOUT. AO is the open-loop gain of the amplifier, and is approximately 3300. The large value of AO drives: ((VIN+) - (VIN-)) × 1/2 ((VGAIN+) - (VGAIN-)) + (VREF VFB) → 0. Rearranging and substituting for VFB: or Thus the output is equal to the difference of the VIN’s times the difference of VGAIN’s and offset by VREF, all gained up by the feedback divider ratio. The EL4452 is stable for a divider ratio of 1/10, and the divider may be set for higher output gain, although with the traditional loss of bandwidth. 7 Input Connections The input transistors can be driven from resistive and capacitive sources, but are capable of oscillation when presented with an inductive input. It takes about 80nH of series inductance to make the inputs actually oscillate, EL4452 equivalent to four inches of unshielded wiring or 6 of unterminated input transmission line. The oscillation has a characteristic frequency of 500MHz. Often placing one’s finger (via a metal probe) or an oscilloscope probe on the input will kill the oscillation. Normal high-frequency construction obviates any such problems, where the input source is reasonably close to the input. If this is not possible, one can insert series resistors of around 51Ω to de-Q the inputs. For instance, the EL4452 draws a maximum of 18mA. With light loading, RPAR →∞ and the dissipation with ±5V supplies is 180mW. The maximum supply voltage that the device can run on for a given PD and other parameters is: VS, max=(PD+VO2/RPAR)/(2IS+VO/RPAR) The maximum dissipation a package can offer is: PD, max = (TJ, max-TA, max) / θJA Where Signal Amplitudes Signal input common-mode voltage must be between (V-) +2.5V and (V+)-2.5V to ensure linearity. Additionally, the differential voltage on any input stage must be limited to ±6V to prevent damage. The differential signal range is ±0.5V in the EL4452. The input range is substantially constant with temperature. The Ground Pin The ground pin draws only 6µA maximum DC current, and may be biased anywhere between (V-)+2.5V and (V+)-3.5V. The ground pin is connected to the IC’s substrate and frequency compensation components. It serves as a shield within the IC and enhances input stage CMRR and feedthrough over frequency, and if connected to a potential other than ground, it must be bypassed. Power Supplies The EL4452 operates with power supplies from ±3V to ±15V. The supplies may be of different voltages as long as the requirements of the ground pin are observed (see the Ground Pin section). The supplies should be bypassed close to the device with short leads. 4.7µF tantalum capacitors are very good, and no smaller bypasses need be placed in parallel. Capacitors as small as 0.01µF can be used if small load currents flow. Single-polarity supplies, such as +12V with +5V can be used, where the ground pin is connected to +5V and V- to ground. The inputs and outputs will have to have their levels shifted above ground to accommodate the lack of negative supply. The power dissipation of the EL4452 increases with power supply voltage, and this must be compatible with the package chosen. This is a close estimate for the dissipation of a circuit: PD=2×VS×IS, max+(VS-VO)×VO/RPAR where IS, max is the maximum supply current VS is the ± supply voltage (assumed equal) VO is the output voltage RPAR is the parallel of all resistors loading the output 8 TJ,max is the maximum die temperature, 150°C for reliability, less to retain optimum electrical performance TA,max is the ambient temperature, 70°C for commercial and 85°C for industrial range θJAis the thermal resistance of the mounted package, obtained from data sheet dissipation curves The more difficult case is the SO-14 package. With a maximum die temperature of 150°C and a maximum ambient temperature of 85°C, the 65°C temperature rise and package thermal resistance of 120°C/W gives a dissipation of 542mW at 85°C. This allows the full maximum operating supply voltage unloaded, but reduced if loaded. Output Loading The output stage of the EL4452 is very powerful. It can typically source 80mA and sink 120mA. Of course, this is too much current to sustain and the part will eventually be destroyed by excessive dissipation or by metal traces on the die opening. The metal traces are completely reliable while delivering the 30mA continuous output given in the Absolute Maximum Ratings table in this data sheet, or higher purely transient currents. Gain changes only 0.2% from no load to a 100Ω load. Heavy resistive loading will degrade frequency response and distortion for loads < 100Ω. Capacitive loads will cause peaking in the frequency response. If capacitive loads must be driven, a small-valued series resistor can be used to isolate it. 12Ω to 51Ω should suffice. A 22Ω series resistor will limit peaking to 1dB with even a 220pF load. EL4452 AGC Circuits The basic AGC (automatic gain control) loop is this: the EL4452. Bias current-induced offsets could increase this further. Depending on the nature of the signal, different level detector strategies will be employed. If the system goal is to prevent overload of subsequent stages, peak detectors are preferred. Other strategies use an RMS detector to maintain constant output power. Here is a simple AGC using peak detection (Figure 2). FIGURE 1. BASIC AGC LOOP A multiplier scales the input signal and provides necessary gain and buffers the signal presented to the output load, a level detector (shown schematically here as a diode) converts some measure of the output signal amplitude to a DC level, a low-pass filter attenuates any signal ripple present on that DC level, and an amplifier compares that level to a reference and amplifies the error to create a gaincontrol voltage for the multiplier. The circuitry is a servo that attempts to keep the output amplitude constant by continuously adjusting the multiplier’s gain control input. Most AGC’s deal with repetitive input signals that are capacitively coupled. It is generally desirable to keep DC offsets from mixing with AC signals and fooling the level detector into maintaining the DC output offset level constant, rather than a smaller AC component. To that end, either the level detector is AC-coupled, or the reference voltage must be made greater than the maximum multiplier gain times the input offset. For instance, if the level detector output equaled the reference voltage at 1V of EL4452 output, the 8mV of input offset would require a maximum gain of 125 through The output of the EL4452 drives a diode detector which is compared to VREF by an offset integrator. Its output feeds the gain-control input of the EL4452. The integrator’s output is attenuated by the 2kΩ and 2.7kΩ resistors to prevent the op-amp from overloading the gain-control pin during zero input conditions. The 510kΩ resistor provides a pull-down current to the peak level storage capacitor C1 to allow it to drift negative when output amplitude reduces. Thus the detector is of fast attack and slow decay design, able to reduce AGC gain rapidly when signal amplitude suddenly increases, and increases gain slowly when the input drops out momentarily. The value of C1 determines drop-out reaction rates, and the value of CF affects overall loop time constant as well as the amount of ripple on the gain-control line. C2 can be used to reduce this ripple further, although it contributes to loop overshoot when input amplitude changes suddenly. The op-amp can be any inexpensive lowfrequency type. The major problem with diode detectors is their large and variable forward voltage. They require at least a 2VP-P peak output signal to function reliably, and the forward voltage should be compensated by including a negative VD added to VREF. Even this is only moderately successful. At the expense of bandwidth, op-amp circuits can greatly improve diode rectifiers (see “An Improved Peak Detector”, an FIGURE 2. 9 EL4452 FIGURE 3. Elantec application note). Fortunately, the detector will see a constant amplitude of signal if the AGC is operating correctly. A better-calibrated method is to use a four-quadrant multiplier as a square-law detector. Here is a circuit employing the EL4450 (Figure 3). beyond the 10 of the EL4452, current feedback devices being the most flexible. The op-amp’s input should be capacitor coupled to prevent gained-up offsets from confusing the level detector during AGC control line variations. In this circuit, the EL4450 not only calculates the square of the input, but also provides the offset integrator function. The product of the two multiplier inputs adds to the -Reference input and are passed to the output amplifier, which through CF behaves as a pseudo-integrator. The “integrator” gain does not pass through zero at high frequencies but has a zero at 1/(2πCF × 1kΩ). This zero is cancelled by the pole caused by the second capacitor of value CF connected at the EL4452 -VGAIN input. The -Reference can be exchanged for a positive reference by connecting it to the ground return of the 1kΩ resistor at the FB terminal and grounding REF. As a general consideration, the input signal applied to an EL4452 should be kept below about 250mV peak for good linearity. If the AGC were designed to produce a 1V peak output, the input range would be 100mV–250mV peak when the EL4452 has a feedback network that establishes a maximum gain of 10. This is an input range of only 2.5:1 for precise output regulation. Raising the maximum gain to 25 allows a 40mV–250mV input range with the output still regulated, better than 6:1. Unfortunately, the bandwidth will be reduced. Bandwidth can be maintained by adding a high frequency op-amp cascaded with the output to make up gain All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10