ETC FST34X245QSPX

Revised December 2001
FST34X245
32-Bit Bus Switch
General Description
Features
The Fairchild Switch FST34X245 provides 32-bits of high
speed CMOS TTL-compatible bus switching in a standard
flow-through mode. The low On Resistance of the switch
allows inputs to be connected to outputs without adding
propagation delay or generating additional ground bounce
noise.
■ 4Ω switch connection between two ports
The device is organized as a 32-bit switch. When OE is
LOW, the switch is ON and Port A is connected to Port B.
When OE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports.
■ 32-bit version of FST3245
■ Minimal propagation delay through the switch
■ Low lCC
■ Zero bounce in flow-through mode
■ Control inputs compatible with TTL level
■ Packaged in 20.5mm 80-lead package
Ordering Code:
Order Number
FST34X245QSP
Package Number
MQA80A
Package Description
80-Lead, QVSOP, JEDEC MO-154, 0.150" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
© 2001 Fairchild Semiconductor Corporation
DS500554
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FST34X245 32-Bit Bus Switch
December 2001
FST34X245
Connection Diagram
Pin Descriptions
Pin Name
Description
OEn
Bus Switch Enable
An
Bus A
Bn
Bus B
NC
No Connect
Function Table
Input OEn
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2
Function
L
Connect
H
Disconnect
Recommended Operating
Conditions (Note 3)
Supply Voltage (VCC)
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN < 0V
−50 mA
Output Voltage (VOUT)
DC Output (IOUT) Sink Current
128 mA
Input Rise and Fall Time (tr, tf)
+/− 100 mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0 ns/V to 5 ns/V
Switch I/O
0 ns/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
Parameter
VCC
(V)
TA = −40 °C to +85 °C
Min
Typ
(Note 4)
Max
Units
−1.2
V
Conditions
IIN = −18 mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0 ≤ VIN ≤ 5.5V
0
10
µA
VIN = 5.5V
±1.0
µA
0 ≤ A, B ≤ VCC
7
Ω
VIN = 0V, IIN = 64 mA
VIN = 0V, IIN = 30 mA
4.5
IOZ
OFF-STATE Leakage Current
5.5
RON
Switch On Resistance
4.5
(Note 5)
2.0
V
4
4.5
4
7
Ω
4.5
8
15
Ω
VIN = 2.4V, IIN = 15 mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15 mA
ICC
Quiescent Supply Current (Note 6)
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One Input at 3.4V
(Note 7)
Other Inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and TA = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B) pins.
Note 6: Per VCC pin.
Note 7: Per TTL input, control pins only.
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FST34X245
Absolute Maximum Ratings(Note 1)
FST34X245
AC Electrical Characteristics
TA = −40 °C to +85 °C,
CL = 50pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 – 5.5V
Min
tPHL, tPLH
Propagation Delay Bus to Bus
(Note 8)
tPZH, tPZL
Output Enable Time
1.5
VCC = 4.0V
Max
Min
Units
Conditions
Figure
Number
Max
0.25
0.25
ns
VI = OPEN
Figures
1, 2
5.9
6.4
ns
VI = 7V for tPZL
Figures
1, 2
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time
1.5
6.0
5.7
ns
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figures
1, 2
Note 8: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
Symbol
(Note 9)
Parameter
Typ
Max
Units
Conditions
CIN
Control Pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
5
pF
VCC, OE = 5.0V
Note 9: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: CL includes load and stray capacitance
Note: Input PRR = 1.0 MHz tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
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FST34X245 32-Bit Bus Switch
Physical Dimensions inches (millimeters) unless otherwise noted
80-Lead, QVSOP, JEDEC MO-154, 0.150" Wide
Package Number MQA80A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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user.
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