HD74LVC2G66 2–channel Analog Switch REJ03D0024–0300 Rev.3.00 Jul.07.2005 Description The HD74LVC2G66 has 2–channel analog switch in an 8-pin package. Each switch section has its own enable input control (CONT). High-level voltage applied to CONT turns on associated switch section. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features • • • • • The basic gate function is lined up as renesas uni logic series. Supply voltage range: 1.65 to 5.5 V Operating temperature range: –40 to +85°C Control inputs: VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) Ordering Information Part Name Package Type HD74LVC2G66CPE WCSP-8 pin HD74LVC2G66CLE Package Code (Previous Code) SXBG0008KA-A (TBS-8V) SXBG0008KB-A (TBS-8AV) Package Abbreviation CP E (3,000 pcs/reel) CL Article Indication Marking Year code Month code E66YM Function Table Control Switch L H OFF ON H : High level L : Low level Rev.3.00 Jul 07, 2005 page 1 of 11 Taping Abbreviation (Quantity) HD74LVC2G66 Pin Arrangement 0.9 mm GND 4 5 IN/OUT2 CONT2 3 6 OUT/IN2 OUT/IN1 2 7 CONT1 IN/OUT1 1 8 VCC 1.9 mm Height 0.5 mm 0.5 mm pitch 0.17 mm 8–Ball (CP) 0.23 mm 8–Ball (CL) Pin#1 INDEX (Bottom view) (Top view) Logic Diagram IN/OUT1 OUT/IN1 CONT1 one of two switches Absolute Maximum Ratings Item Supply voltage range Input voltage range *1 Output voltage range *1, 2 Input clamp current Output clamp current Continuous output current Continuous current through VCC or GND Package Thermal impedance Symbol Ratings Unit VCC VI VO IIK IOK IO ICC or IGND –0.5 to 6.5 –0.5 to 6.5 –0.5 to VCC +0.5 –50 –50 ±50 ±100 V V V mA mA mA mA θja 140 102 –65 to 150 °C/W Storage temperature Notes: Tstg Test Conditions Output : H or L VI < 0 VO < 0 VO = 0 to VCC CP CL °C The absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. Rev.3.00 Jul 07, 2005 page 2 of 11 HD74LVC2G66 Recommended Operating Conditions Item Supply voltage range Input voltage range Output voltage range Input transition rise or fall rate Symbol Min Max Unit VCC VI VO ∆t / ∆v 1.65 0 0 0 5.5 5.5 VCC 20 V V V ns / V 10 10 85 °C 0 0 Operating free-air temperature Ta –40 Note: Unused or floating inputs must be held high or low. Rev.3.00 Jul 07, 2005 page 3 of 11 Conditions VCC = 1.65 to 1.95 V, 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V HD74LVC2G66 Electrical Characteristics • Ta = –40 to 85°C Item Input voltage Symbol VCC (V) Min VIH 1.65 to 1.95 VCC×0.65 2.3 to 2.7 VCC×0.7 3.0 to 3.6 VCC×0.7 — — 4.5 to 5.5 VCC×0.7 — — VIL On–state switch resistance Peak on resistance Difference of on-state resistance between switches RON RON(P) ∆RON Off-state switch leakage current IS (OFF) On-state switch leakage current IS (ON) Control input current IIN Quiescent supply current ICC Control input capacitance Switch terminal capacitance Note: Typ Max Unit — — V — — Test condition 1.65 to 1.95 — — VCC×0.35 2.3 to 2.7 — — VCC×0.3 3.0 to 3.6 — — VCC×0.3 4.5 to 5.5 — — VCC×0.3 1.65 — 12.5 30 2.3 — 9 20 IS = 8 mA 3.0 — 7.5 15 IS = 24 mA 4.5 — 6 10 IS = 32 mA Ω IS = 4 mA 1.65 — 85 120 IS = 4 mA 2.3 — 22 30 IS = 8 mA 3.0 — 12 20 IS = 24 mA 4.5 — 7.5 15 IS = 32 mA 1.65 — — 7 IS = 4 mA 2.3 — — 5 IS = 8 mA 3.0 — — 3 IS = 24 mA 4.5 — — 2 IS = 32 mA 5.5 — — ±1.0 — — ±0.1*1 — — ±1.0 5.5 5.5 5.5 — — ±0.1* — ±1.0 µA VI = VCC or GND, VC = VIH VO = Open µA VIN = VCC or GND µA VIN = VCC or GND VC = VCC–0.6 V 1 — — ±0.1* — — 10 1 — — 1.0* 5.5 — — 500 µA CIC 5.0 — 3.5 — pF CI/O(OFF) 5.0 — 6.0 — pF CI/O(ON) 5.0 — 14.0 — Rev.3.00 Jul 07, 2005 page 4 of 11 VI=VCC to GND VI = VCC and VO = GND or VI = GND and VO = VCC, VC = VIL ∆ICC 1. Ta = 25°C VI=VCC to GND µA 1 — VI=VCC or GND HD74LVC2G66 Switching Characteristics • VCC = 1.8 ± 0.15 V Enable time tZH, tZL 2.3 10.0 CL = 30 pF, RL = 1.0 kΩ FROM (Input) INOUT or OUTIN CONT Disable time tHZ, tLZ 2.5 10.5 CL = 30 pF, RL = 1.0 kΩ CONT Test Conditions CL = 30 pF, RL = 500 Ω Item Propagation delay time*1 Symbol tPLH, tPHL Ta = –40 to 85°C Min Max 2.0 Unit ns Test Conditions CL = 30 pF, RL = 1.0 kΩ TO (Output) OUTIN or INOUT INOUT or OUTIN INOUT or OUTIN • VCC = 2.5 ± 0.2 V Enable time tZH, tZL 1.6 5.6 CL = 30 pF, RL = 500 Ω FROM (Input) INOUT or OUTIN CONT Disable time tHZ, tLZ 1.2 6.9 CL = 30 pF, RL = 500 Ω CONT Test Conditions CL = 50 pF, RL = 500 Ω Item Propagation delay time*1 Symbol tPLH, tPHL Ta = –40 to 85°C Min Max 1.2 Unit ns TO (Output) OUTIN or INOUT INOUT or OUTIN INOUT or OUTIN • VCC = 3.3 ± 0.3 V Enable time tZH, tZL 1.5 4.4 CL = 50 pF, RL = 500 Ω FROM (Input) INOUT or OUTIN CONT Disable time tHZ, tLZ 2.0 7.2 CL = 50 pF, RL = 500 Ω CONT Test Conditions CL = 50 pF, RL = 500 Ω FROM (Input) INOUT or OUTIN CONT Item Propagation delay time*1 Symbol tPLH, tPHL Ta = –40 to 85°C Min Max 0.8 Unit ns TO (Output) OUTIN or INOUT INOUT or OUTIN INOUT or OUTIN • VCC = 5.0 ± 0.5 V TO (Output) OUTIN or INOUT Enable time tZH, tZL 1.3 3.9 CL = 50 pF, RL = 500 Ω INOUT or OUTIN Disable time tHZ, tLZ 1.1 6.3 CL = 50 pF, RL = 500 Ω CONT INOUT or OUTIN Notes: 1. The propagation delay is calculated RC time const constant of typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). Item Propagation delay time*1 Symbol tPLH, tPHL Rev.3.00 Jul 07, 2005 page 5 of 11 Ta = –40 to 85°C Min Max 0.6 Unit ns HD74LVC2G66 Analog Switch Characteristics Ta = 25°C Item VCC (V) 1.65 2.3 3.0 4.5 1.65 2.3 3.0 4.5 1.65 Crosstalk (between switches) 2.3 3.0 4.5 1.65 2.3 3.0 4.5 1.65 Crosstalk (Control input to signal 2.3 output) 3.0 4.5 1.65 Feed through attenuation 2.3 (Switch OFF) 3.0 4.5 1.65 2.3 3.0 4.5 Sine–wave distortion 1.65 2.3 3.0 4.5 1.65 2.3 3.0 4.5 Frequency response (Switch ON) Min — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — Typ 35 120 175 195 >300 >300 >300 >300 –58 –58 –58 –58 –42 –42 –42 –42 35 50 70 100 –58 –58 –58 –58 –42 –42 –42 –42 0.1 0.025 0.015 0.01 0.15 0.025 0.015 0.01 Max — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — FROM (Input) TO (Output) MHz CL = 50 pF, Adjust fin voltage to INOUT or RL = 600 Ω obtain 0dBm at output OUTIN when fin is 1MHz (sine wave). CL = 5 pF, Increase fin frequency until the dB–meter RL = 50 Ω reads –3 dBm. 20 log(VO/VI)= –3 dBm OUTIN or INOUT dB OUTIN or INOUT Unit Test conditions CL = 50 pF, Adjust fin voltage to INOUT or OUTIN RL = 600 Ω obtain 0dBm at input when fin is 1MHz (sine wave). CL = 5 pF, RL = 50 Ω mV CL = 50 pF, Adjust RL value to RL = 600 Ω obtain 0A at IIN/OUT when fin is 1MHz (square wave) CONT OUTIN or INOUT dB CL = 50 pF, Adjust fin voltage to RL = 600 Ω obtain 0dBm at input when fin is 1MHz (sine–wave) INOUT or OUTIN OUTIN or INOUT INOUT or OUTIN OUTIN or INOUT CL = 5 pF, RL = 50 Ω % CL = 50 pF, VI=1.4VP–P, VCC=1.65V RL = 10 kΩ VI=2.0VP–P, VCC=2.3V fin = 1kHz (sine–wave) VI=2.5VP–P, VCC=3.0V VI=4.0VP–P, VCC=4.5V CL = 50 pF, RL = 10 kΩ fin = 10kHz (sine–wave) Operating Characteristics Ta = 25°C Item Power dissipation capacitance Symbol VCC (V) Min Typ Max Unit CPD 1.8 — 8 — pF 2.5 — 9 — 3.3 — 9.5 — 5.0 — 11 — Rev.3.00 Jul 07, 2005 page 6 of 11 Test Conditions f = 10 MHz HD74LVC2G66 Test Circuit • RON VCC VC =VIH VCC VIN =VCC (ON) VOUT R ON = VIN–OUT IS GND IS + V (Ω) – VIN–OUT • I S (off), I S (on) VCC VCC VC =VIL VC =VIH VCC A VCC A (OFF) VIN =VCC or GND Rev.3.00 Jul 07, 2005 page 7 of 11 GND VOUT =GND or VCC VIN =VCC or GND (ON) GND VOUT OPEN HD74LVC2G66 Test Circuit (cont.) VTT RL From Output OPEN S1 t PLH / tPHL OPEN t ZH / t HZ GND t ZL / t LZ VTT GND RL CL TEST S1 Load circuit INPUTS VCC (V) 1.8±0.15 2.5±0.2 3.3±0.3 5.0±0.5 VI VCC VCC VCC VCC tr / tf ≤ 2 ns ≤ 2 ns ≤ 2.5 ns ≤ 2.5 ns Vref VTT CL RL ∆V VCC / 2 VCC / 2 VCC / 2 VCC / 2 2 × VCC 2 × VCC 2 × VCC 2 × VCC 30 pF 30 pF 50 pF 50 pF 1.0 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Vref Input Vref t PLH 0V t PHL V OH Output Vref Vref V OL VI Control Input Vref Vref t ZL 0V t LZ VOH Output (Waveform – A) Vref VOL + ∆V t ZH t HZ VOH – ∆V Output (Waveform – B) V OL V OH Vref VOL Notes: 1. CL includes probe and jig capacitance. 2. Waveform–A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform–B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10MHz, Zo = 50 Ω. 5. The output are measured one at a time with one transition per measurement. Rev.3.00 Jul 07, 2005 page 8 of 11 HD74LVC2G66 Frequency response (Switch ON) VCC VC = V IH f in = sine wave f in 0.1 µF VIN RL = 50 Ω VCC (ON) GND RL= 600 Ω or 50 Ω VOUT CL = 50 pF or 5 pF VCC /2 Crosstalk (Between any switches) VCC VC =VIH f in RL = 50 Ω 0.1 µF VIN RL = 600 Ω or 50 Ω VCC (ON) GND RL = 600 Ω or 50 Ω VOUT1 CL = 50 pF or 5 pF VCC /2 VCC VC =VIL VCC RL = 600 Ω or 50 Ω VCC /2 Rev.3.00 Jul 07, 2005 page 9 of 11 (OFF) GND VOUT2 RL = 600 Ω or 50 Ω VCC /2 CL = 50 pF or 5 pF HD74LVC2G66 Crosstalk (Control input to signal output) VCC RL = 50 Ω VC VCC VOUT RL = 600 Ω RL = 600 Ω GND VCC /2 CL = 50 pF VCC /2 Feedthrough attenuation (Switch OFF) VCC VC = VIL f in 0.1 µF VIN RL = 50 Ω VCC /2 RL = 600 Ω or 50 Ω VCC VOUT (OFF) GND VCC /2 RL = 600 Ω or 50 Ω CL = 50 pF or 5 pF Sine-wave distortion VCC VC = VIH f in 10 µF 600 Ω VIN VCC (ON) GND 10 µF RL = 10 k Ω VCC /2 Rev.3.00 Jul 07, 2005 page 10 of 11 VOUT CL = 50 pF HD74LVC2G66 Package Dimensions JEITA Package Code S-XFBGA8-0.9x1.9-0.50 RENESAS Code SXBG0008KA-A Previous Code TBS-8V MASS[Typ.] 0.0014g e D ZD ZE D C E B e B A Reference Symbol 1 2 Dimension in Millimeters Min Nom Pin#1 index area A y1 C A1 0.10 0.15 0.35 A2 8 × φb 0.15 b φ× M C A B φ× M C C 0.17 D 0.90 E 1.90 e 0.50 x JEITA Package Code S-XFBGA8-0.9x1.9-0.50 RENESAS Code SXBG0008KB-A y Previous Code TBS-8AV 0.19 0.05 0.05 y A C A2 y A1 Seating plane Max 0.50 A 0.20 1 ZD 0.20 ZE 0.20 MASS[Typ.] 0.0015g e D ZD ZE D C E B e B A Reference Symbol 1 2 Pin#1 index area A y1 C 8 × φb φ× M C A B φ× M C C * Reference value. Rev.3.00 Jul 07, 2005 page 11 of 11 A C A2 y A1 Seating plane Dimension in Millimeters Min Nom Max 0.50 A A1 0.155 0.185 (0.315) * A2 0.20 b 0.25 0.90 D E 1.90 e 0.50 x 0.05 y 0.05 y1 0.20 Z D 0.20 Z E 0.20 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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