HS-5104ARH-T Data Sheet July 1999 Radiation Hardened Low Noise Quad Operational Amplifier Intersil‘s Satellite Applications FlowTM (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of reliability. The HS-5104ARH-T is a radiation hardened, monolithic quad operational amplifier that provides highly reliable performance in harsh radiation environments. Its excellent noise characteristics coupled with a unique array of dynamic specifications make this amplifier well-suited for a variety of satellite system applications. Dielectrically isolated, bipolar processing makes this device immune to Single Event Latch-up. File Number 4606.1 Features • QML Class T, Per MIL-PRF-38535 • Radiation Performance - Gamma Dose (γ) 1 x 105 RAD(Si) - No Latch-Up, Dielectrically Isolated Device Islands • Low Noise - At 1kHz . . . . . . . . . . . . . . . . . . . . . . . . 4.3nV/√Hz (Typ) - At 1kHz . . . . . . . . . . . . . . . . . . . . . . . . 0.6pA/√Hz (Typ) • Low Offset Voltage . . . . . . . . . . . . . . . . . . . . 3.0mV (Max) • High Slew Rate . . . . . . . . . . . . . . . . . . . . . . 2.0V/µs (Typ) • Gain Bandwidth Product . . . . . . . . . . . . . . . 8.0MHz (Typ) Pinouts HS1-5104ARH-T (SBDIP), CDIP2-T14 TOP VIEW The HS-5104ARH-T shows almost no change in offset voltage after exposure to 100K RAD(Si) gamma radiation, with only a minor increase in current. Complementing these specifications is a post radiation open loop gain in excess of 40K. This quad operational amplifier is available in an industry standard pinout, allowing for immediate interchangeability with most other quad operational amplifiers. Specifications OUT 1 1 14 OUT 4 -IN1 2 13 -IN4 +IN1 3 12 +IN4 V+ 4 11 V- +IN2 5 10 +IN3 -IN2 6 9 -IN3 OUT 2 7 8 OUT 3 Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when ordering. Detailed Electrical Specifications for the HS-5104ARH-T are contained in SMD 5962-95690. A “hot-link” is provided from our website for downloading. www.intersil.com/spacedefense/newsafclasst.asp Intersil‘s Quality Management Plan (QM Plan), listing all Class T screening operations, is also available on our website. www.intersil.com/quality/manuals.asp Ordering Information ORDERING NUMBER PART NUMBER HS9-5104ARH-T (FLATPACK), CDFP3-F14 TOP VIEW OUT 1 1 14 OUT 4 -IN1 2 13 -IN4 +IN1 3 12 +IN4 V+ 4 11 V- +IN2 5 10 +IN3 -IN2 6 9 -IN3 OUT 2 7 8 OUT 3 TEMP. RANGE (oC) 5962R9569001TCC HS1-5104ARH-T -55 to 125 HS1-5104ARH/Proto HS1-5104ARH/Proto -55 to 125 5962R9569001TXC HS9-5104ARH-T -55 to 125 HS9-5104ARH/Proto HS9-5104ARH/Proto -55 to 125 NOTE: Minimum order quantity for -T is 150 units through distribution, or 450 units direct. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation. HS-5104ARH-T Die Characteristics DIE DIMENSIONS: PASSIVATION: (2420µm x 2530µm x 483µm ±25.4µm) Type: Nitride (Si3N4) over Silox (SiO2) 95 x 99 x 19mils ±1mil Nitride Thickness: 3.5kÅ ±1.5kÅ Silox Thickness: 12.0kÅ ±2kÅ METALLIZATION: WORST CASE CURRENT DENSITY: Type: Al Si Cu < 2.0e5 A/cm2 Thickness: 16.0kÅ ±2kÅ SUBSTRATE POTENTIAL: TRANSISTOR COUNT: Unbiased (DI) 175 BACKSIDE FINISH: PROCESS: Silicon Bipolar DI Metallization Mask Layout HS-5104ARH-T +IN2 V+ +IN1 -IN1 -IN2 OUT2 OUT1 OUT3 OUT4 -IN3 -IN4 +IN3 V- +IN4 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 2