HOLTEK HT1622_07

HT1622
RAM Mapping 32´8 LCD Controller for I/O MCU
Features
· Operating voltage: 2.7V~5.2V
· R/W address auto increment
· Built-in RC oscillator
· Two selectable buzzer frequencies (2kHz or 4kHz)
· 1/4 bias, 1/8 duty, frame frequency is 64Hz
· Power down command reduces power consumption
· Max. 32´8 patterns, 8 commons, 32 segments
· Software configuration feature
· Built-in internal resistor type bias generator
· Data mode and Command mode instructions
· 3-wire serial interface
· Three data accessing modes
· 8 kinds of time base or WDT selection
· VLCD pin to adjust LCD operating voltage
· Time base or WDT overflow output
· Cascade application
· Built-in LCD display RAM
· 64-pin QFP package
General Description
HT1622 make it suitable for multiple LCD applications
including LCD modules and display subsystems. Only
three lines are required for the interface between the
host controller and the HT1622. The HT162X series
have many kinds of products that match various applications.
HT1622 is a peripheral device specially designed for I/O
type MCU used to expand the display capability. The
max. display segment of the device are 256 patterns
(32´8). It also supports serial interface, buzzer sound,
Watchdog Timer or time base timer functions. The
HT1622 is a memory mapping and multi-function LCD
controller. The software configuration feature of the
Selection Table
HT162X
HT1620
HT1621
HT1622
HT16220
HT1623
HT1625
HT1626
COM
4
4
8
8
8
8
16
SEG
32
32
32
32
48
64
48
Built-in Osc.
¾
Ö
Ö
¾
Ö
Ö
Ö
Crystal Osc.
Ö
Ö
¾
Ö
Ö
Ö
Ö
Block Diagram
D is p la y R A M
O S C I
C S
R D
W R
C o n
a n
T im
C ir c
tro l
d
in g
u it
C O M 0
L C D D r iv e r /
B ia s C ir c u it
D A T A
S E G 0
V D D
S E G 3 1
V S S
V L C D
B Z
B Z
Rev. 1.40
C O M 7
T o n e F re q u e n c y
G e n e ra to r
W a tc h d o g T im e r
a n d
T im e B a s e G e n e r a to r
1
IR Q
February 6, 2007
HT1622
Pin Assignment
C
2
1
0
5 7
N
G 2
G 2
G 2
G 2
5 8
S E
S E
S E
S E
5
G 2
G 2
G 2
G 2
G 2
G 3
G 3
S E G 2 4
S E
S E
S E
S E
S E
S E
S E
1
0
9
8
7
6
3
5 2
5 3
5 4
5 5
5 6
5 1
5 0
N C
N C
3
4 9
4
4 8
5
4 7
6
4 6
7
4 5
8
4 4
9
4 3
1
2
3 5
N C
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
N C
1 8
3 4
N C
1 9
3 3
N C
H T 1 6 2 2
6 4 Q F P -A
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
4 2
4 1
4 0
3 9
3 8
3 7
3 6
3 2
3 1
3 0
2 9
2 8
2 7
2 6
2 5
2 4
2 3
2 2
2 1
2 0
C O M 1
N C
5 9
6 0
6 1
6 2
6 3
6 4
C S
N C
R D
W R
D A T A
V S S
O S C I
V D D
V L C D
IR Q
B Z
N C
B Z
T 1
T 2
T 3
C O M 0
G 1
G 1
G 1
G 1
G 1
G 1
G 1
G 1
G 1
G 1
G 9
G 8
G 7
9
8
7
6
5
4
3
2
1
0
S E G
S E G
S E G
S E G
S E G
S E G
S E G
C O M
C O M
C O M
6
5
4
3
2
1
0
7
6
S E G 2 5
S E G 2 4
S E G 2 3
S E G 2 2
S E G 2 1
S E G 2 0
5
C O M 4
C O M 3
C O M 2
4 8
4 7
4 6
4 5
4 4
4 3
Pad Assignment
S E G 2 9
S E G 2 8
S E G 2 7
S E G 2 6
R D
S E G 3 0
1
S E G 3 1
C S
5 4
5 3
5 2
5 1
5 0
4 9
2
W R
3
D A T A
4
4 2
S E G 1 9
4 1
S E G 1 8
4 0
S E G 1 7
3 9
S E G 1 6
3 8
S E G 1 5
3 7
S E G 1 4
V S S
3 6
S E G 1 3
5
3 5
S E G 1 2
O S C I
6
3 4
S E G 1 1
V D D
7
3 3
S E G 1 0
V L C D
8
3 2
S E G 9
IR Q
9
(0 ,0 )
B Z
1 0
B Z
1 1
2 2
2 3
2 4
2 5
2 6
2 7
2 8
2 9
S E G 4
S E G 5
S E G 6
2 1
S E G 3
2 0
S E G 2
1 9
S E G 1
1 8
S E G 0
1 7
C O M 7
1 6
C O M 6
1 5
C O M 1
C O M 5
1 4
C O M 0
C O M 4
1 3
T 3
C O M 3
1 2
C O M 2
T 1
T 2
3 1
S E G 8
3 0
S E G 7
Chip size: 149 ´ 155 (mil)2
* The IC substrate should be connected to VDD in the PCB layout artwork.
Rev. 1.40
2
February 6, 2007
HT1622
Pad Coordinates
Unit: mil
Pad No.
X
Y
Pad No.
X
Y
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
-68.43
-68.43
-68.43
-69.19
-69.36
-69.36
-69.36
-69.36
-69.36
-69.36
-69.36
-69.36
-69.36
-69.36
-69.36
-69.36
-39.23
-32.60
-20.19
-13.56
-1.15
5.48
15.00
21.63
28.26
34.89
41.52
71.78
59.46
52.83
39.14
23.89
16.32
9.69
3.06
-3.57
-16.92
-33.83
-43.52
-50.15
-56.78
-63.41
-70.04
-71.14
-71.14
-71.14
-71.14
-71.14
-71.14
-71.91
-71.91
-71.91
-71.91
-71.91
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
48.15
54.78
69.32
69.32
69.32
69.32
69.32
69.32
69.32
69.32
69.32
69.32
69.32
69.32
69.32
14.19
7.57
0.94
-5.70
-12.32
-18.95
-25.58
-32.22
-38.85
-45.47
-52.10
-58.74
-71.91
-71.91
-10.67
-4.04
2.59
9.22
15.85
22.48
29.11
35.74
42.37
49.00
55.63
62.26
68.89
71.78
71.78
71.78
71.78
71.78
71.78
71.78
71.78
71.78
71.78
71.78
71.78
Pad Description
Pad No.
1
Pad Name
CS
I/O
Description
I
Chip selection input with Pull-high resistor. When the CS is logic high, the
data and command read from or written to the HT1622 are disabled. The serial interface circuit is also reset. But if CS is at logic low level and is input to
the CS pad, the data and command transmission between the host controller
and the HT1622 are all enabled.
2
RD
I
READ clock input with Pull-high resistor. Data in the RAM of the HT1622 are
clocked out on the falling edge of the RD signal. The clocked out data will appear on the data line. The host controller can use the next rising edge to latch
the clocked out data.
3
WR
I
WRITE clock input with Pull-high resistor. Data on the DATA line are latched
into the HT1622 on the rising edge of the WR signal.
4
DATA
I/O
Serial data input or output with Pull-high resistor
5
VSS
¾
Negative power supply, ground
6
OSCI
I
7
VDD
¾
8
VLCD
I
LCD operating voltage input pad
9
IRQ
O
Time base or Watchdog Timer overflow flag, NMOS open drain output
10, 11
BZ, BZ
O
2kHz or 4kHz tone frequency output pair
12~14
T1~T3
I
Not connected
15~22
COM0~COM7
O
LCD common outputs
23~54
SEG0~SEG31
O
LCD segment outputs
Rev. 1.40
If the system clock comes from an external clock source, the external clock
source should be connected to the OSCI pad.
Positive power supply
3
February 6, 2007
HT1622
Absolute Maximum Ratings
Supply Voltage ...........................VSS-0.3V to VSS+5.5V
Storage Temperature ............................-50°C to 125°C
Input Voltage.............................VSS-0.3V to VDD+0.3V
Operating Temperature...........................-40°C to 85°C
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed
in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Symbol
Parameter
VDD
Operating Voltage
IDD1
Operating Current
Ta=25°C
Test Conditions
VDD
Conditions
¾
¾
3V
5V
IDD2
3V
Operating Current
5V
ISTB
No load or LCD ON
On-chip RC oscillator
No load or LCD OFF
On-chip RC oscillator
3V
Standby Current
No load, Power down mode
5V
VIL
3V
Input Low Voltage
3V
Input High Voltage
IOH1
IOL1
IOH1
IOL2
IOH2
IOL3
IOH3
RPH
Unit
2.7
¾
5.2
V
¾
80
210
mA
¾
135
415
mA
¾
8
30
mA
¾
20
55
mA
¾
1
8
mA
¾
2
16
mA
0
¾
0.6
V
0
¾
1.0
V
2.4
¾
3
V
4.0
¾
5
V
3V
VOL=0.3V
0.9
1.8
¾
mA
5V
VOL=0.5V
1.7
3
¾
mA
3V
VOH=2.7V
-0.9
-1.8
¾
mA
5V
VOH=4.5V
-1.7
-3
¾
mA
3V
VOL=0.3V
200
450
¾
mA
5V
VOL=0.5V
250
500
¾
mA
3V
VOH=2.7V
-200
-450
¾
mA
5V
VOH=4.5V
-250
-500
¾
mA
3V
VOL=0.3V
15
40
¾
mA
5V
VOL=0.5V
100
200
¾
mA
3V
VOH=2.7V
-15
-30
¾
mA
5V
VOH=4.5V
-45
-90
¾
mA
3V
VOL=0.3V
15
30
¾
mA
5V
VOL=0.5V
70
150
¾
mA
3V
VOH=2.7V
-6
-13
¾
mA
5V
VOH=4.5V
-20
-40
¾
mA
100
200
300
kW
50
100
150
kW
BZ, BZ, IRQ
BZ, BZ
DATA
DATA
LCD Common Sink Current
LCD Common Source Current
LCD Segment Sink Current
LCD Segment Source Current
3V
Pull-high Resistor
DATA, WR, CS, RD
5V
Rev. 1.40
Max.
DATA, WR, CS, RD
5V
IOL1
Typ.
DATA, WR, CS, RD
5V
VIH
Min.
4
February 6, 2007
HT1622
A.C. Characteristics
Symbol
fSYS1
fSYS2
Ta=25°C
VDD
System Clock
3V
System Clock
LCD Frame Frequency
fLCD2
LCD Frame Frequency
tCOM
LCD Common Period
On-chip RC oscillator
40
kHz
3V
¾
32
¾
kHz
External clock source
¾
5V
3V
th
Hold Time for DATA to WR, RD, Clock
Width (Figure 2)
3V
tsu1
Setup Time for CS to WR, RD Clock
Width (Figure 3)
3V
th1
Hold Time for CS to WR, RD Clock
Width (Figure 3)
3V
tf
W R , R D
C lo c k
tr
9 0 %
5 0 %
1 0 %
tC
V
W R , R D
C lo c k
5 0 %
F IR S T
C lo c k
¾
¾
64
¾
¾
¾
n/fLCD
¾
sec
¾
¾
150
kHz
¾
¾
300
kHz
¾
¾
75
kHz
¾
¾
150
kHz
¾
250
¾
ns
Write mode
3.34
¾
¾
Read mode
6.67
¾
¾
Write mode
1.67
¾
¾
Read mode
3.34
¾
¾
¾
¾
120
¾
ns
¾
¾
120
¾
ns
¾
¾
120
¾
ns
¾
¾
100
¾
ns
¾
¾
100
¾
ns
5V
5V
5V
ms
ms
V A L ID D A T A
D B
V
D D
5 0 %
G N D
th
tsu
W R , R D
C lo c k
th
5 0 %
V
D D
G N D
Figure 2
S
V
D D
G N D
1
V
L A S T
C lo c k
64
¾
D D
5 0 %
1
¾
L K
tC
tsu
Hz
5V
Figure 1
C S
80
5V
G N D
tC
L K
64
CS
WR, RD Input Pulse Width (Figure 1)
Setup Time for DATA to WR, RD Clock
Width (Figure 2)
Hz
48
Duty cycle 50%
5V
tsu
kHz
Duty cycle 50%
3V
3V
¾
80
n: Number of COM
5V
Rise/Fall Time Serial Data Clock Width
(Figure 1)
32
64
External clock source
¾
tr, tf
¾
44
On-chip RC oscillator
3V
tCLK
kHz
40
3V
tCS
Unit
32
3V
Serial Interface Reset Pulse Width
(Figure 3)
Max.
32
5V
Serial Data Clock (RD pin)
Typ.
24
5V
fCLK2
Min.
22
3V
Serial Data Clock (WR pin)
Conditions
5V
5V
fLCD1
fCLK1
Test Conditions
Parameter
D D
G N D
Figure 3
Rev. 1.40
5
February 6, 2007
HT1622
RC Oscillator Frequency Deviation
Operating Temperature
-40°C
0°C
25°C
70°C
75°C
80°C
85°C
Average Deviation
19.85%
2.98%
0
-21.14%
-22.50%
-23.82%
-25.35%
Functional Description
Display Memory - RAM Structure
remain at logic low level until the CLR WDT or the IRQ
DIS command is issued.
The static display RAM is organized into 64´4 bits and
stores the display data. The contents of the RAM are directly mapped to the contents of the LCD driver. Data in
the RAM can be accessed by the READ, WRITE and
READ-MODIFY-WRITE commands. The following is a
mapping from the RAM to the LCD patterns.
If an external clock is selected as the source of system
frequency, the SYS DIS command turns out invalid and
the power down mode fails to be carried out until the external clock source is removed.
Buzzer Tone Output
Time Base and Watchdog Timer (WDT)
A simple tone generator is implemented in the HT1622.
The tone generator can output a pair of differential driving signals on the BZ and BZ which are used to generate
a single tone.
The time base generator and WDT share the same divided (¸256) counter. TIMER DIS/EN/CLR, WDT
DIS/EN/CLR and IRQ EN/DIS are independent from each
other. Once the WDT time-out occurs, the IRQ pin will
C O M 7
C O M 6
C O M 5
C O M 3
C O M 4
C O M 2
C O M 1
C O M 0
S E G 0
1
0
S E G 1
3
2
S E G 2
5
4
S E G 3
7
6
S E G 3 1
6 3
6 2
D 3
D 2
D 1
D 0
A d d r
D a ta
D 3
D 2
D 1
D 0
A d d r e s s 6 B its
(A 5 , A 4 , ...., A 0 )
A d d r
D a ta
D a ta 4 B its
(D 3 , D 2 , D 1 , D 0 )
RAM Mapping
T im e B a s e
V
C L R
T im e r
IR Q
T IM E R E N /D IS
¸ 2 5 6
C lo c k S o u r c e
W D T
¸ 4
W D T E N /D IS
D D
Q
D
C K
C L R
IR Q
E N /D IS
R
W D T
Timer and WDT Configurations
Rev. 1.40
6
February 6, 2007
HT1622
Command Format
If successive commands have been issued, the command mode ID can be omitted. While the system is ope r a t i n g i n a n o n - su cce ssi ve co m m a n d o r a
non-successive address data mode, the CS pin should
be set to ²1² and the previous operation mode will be reset also. The CS pin returns to ²0², a new operation
mode ID should be issued first.
The HT1622 can be configured by the software setting.
There are two mode commands to configure the
HT1622 resource and to transfer the LCD display data.
The following are the data mode ID and the command
mode ID:
Mode
ID
READ
Operation
Data
110
WRITE
Data
101
READ-MODIFY-WRITE
COMMAND
Name
Data
101
Command
100
Command Code
Function
TONE OFF
0000-1000-X
Turn-off tone output
TONE 4K
010X-XXXX-X
Turn-on tone output, tone frequency is 4kHz
TONE 2K
0110-XXXX-X
Turn-on tone output, tone frequency is 2kHz
Timing Diagrams
READ Mode (Command Code : 1 1 0)
C S
W R
R D
D A T A
1
0
1
A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3
M e m o ry A d d re s s 1 (M A 1 ) D a ta (M A 1 )
1
1
0
A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3
M e m o r y A d d r e s s 2 ( M A 2 )D a t a ( M A 2 )
READ Mode (Successive Address Reading)
C S
W R
R D
D A T A
Rev. 1.40
1
1
0
A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0
D a ta (M A + 1 ) D a ta (M A + 2 ) D a ta (M A + 3 )
M e m o ry A d d re s s (M A ) D a ta (M A )
7
February 6, 2007
HT1622
WRITE Mode (Command Code : 1 0 1)
C S
W R
1
D A T A
1
0
A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3
M e m o r y A d d r e s s 1 ( M A 1 )D a t a ( M A 1 )
1
1
0
A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3
M e m o r y A d d r e s s 2 ( M A 2 )D a t a ( M A 2 )
WRITE Mode (Successive Address Writing)
C S
W R
1
D A T A
1
0
A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0
D a ta (M A + 1 ) D a ta (M A + 2 ) D a ta (M A + 3 )
M e m o ry A d d re s s (M A ) D a ta (M A )
READ-MODIFY-WRITE Mode (Command Code : 1 0 1)
C S
W R
R D
D A T A
1
1
0
A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3
M e m o r y A d d r e s s 1 ( M A 1 )D a t a ( M A 1 )
D a ta (M A 1 )
1
0
1
A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3
M e m o r y A d d r e s s 2 ( M A 2 )D a t a ( M A 2 )
EAD-MODIFY-WRITE Mode (Successive Address Accessing)
C S
W R
R D
D A T A
Rev. 1.40
1
0
1
A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0
D a ta (M A )
D a ta (M A + 1 ) D a ta (M A + 1 ) D a ta (M A + 2 )
M e m o ry A d d re s s (M A ) D a ta (M A )
8
February 6, 2007
HT1622
Command Mode (Command Code : 1 0 0)
C S
W R
D A T A
1
0
0
C 8 C 7 C 6 C 5 C 4 C 3 C 2 C 1 C 0
C 8 C 7 C 6 C 5 C 4 C 3 C 2 C 1 C 0
C o m m a n d 1
C o m m a n d ...
C o m m a n d i
C o m m a n d
o r
D a ta M o d e
Mode (Data and Command Mode)
C S
W R
D A T A
C o m m a n d
o r
D a ta M o d e
A d d re s s a n d D a ta
C o m m a n d
o r
D a ta M o d e
A d d re s s a n d D a ta
C o m m a n d
o r
D a ta M o d e
A d d re s s a n d D a ta
R D
Rev. 1.40
9
February 6, 2007
HT1622
Application Circuits
C S
*
V D D
R D
H T 1 6 2 2
D A T A
*
V R
V L C D
W R
M C U
*
B Z
P ie z o
R
IR Q
B Z
C O M 0 ~ C O M 7
S E G 0 ~ S E G 3 1
1 /4 B ia s , 1 /8 D u ty
L C D
Note:
P a n e l
The connection of IRQ and RD pin can be selected depending on the requirement of the MCU.
The voltage applied to VLCD pin must be lower than VDD.
Adjust VR to fit LCD display, at VDD=5V, VLCD=4V, VR=15kW±20%.
Adjust R (external pull-high resistance) to fit user¢s time base clock.
Command Summary
Name
ID
Command Code
D/C
Function
Def.
READ
1 1 0 A5A4A3A2A1A0D0D1D2D3
D
Read data from the RAM
WRITE
1 0 1 A5A4A3A2A1A0D0D1D2D3
D
Write data to the RAM
READ-MODIFYWRITE
1 0 1 A5A4A3A2A1A0D0D1D2D3
D
Read and Write data to the RAM
SYS DIS
1 0 0 0000-0000-X
C
Turn off both system oscillator and LCD bias
Yes
generator
SYS EN
1 0 0 0000-0001-X
C
Turn on system oscillator
LCD OFF
1 0 0 0000-0010-X
C
Turn off LCD display
LCD ON
1 0 0 0000-0011-X
C
Turn on LCD display
TIMER DIS
1 0 0 0000-0100-X
C
Disable time base output
Yes
WDT DIS
1 0 0 0000-0101-X
C
Disable WDT time-out flag output
Yes
TIMER EN
1 0 0 0000-0110-X
C
Enable time base output
WDT EN
1 0 0 0000-0111-X
C
Enable WDT time-out flag output
TONE OFF
1 0 0 0000-1000-X
C
Turn off tone outputs
CLR TIMER
1 0 0 0000-1101-X
C
Clear the contents of the time base generator
CLR WDT
1 0 0 0000-1111-X
C
Clear the contents of WDT stage
RC 32K
1 0 0 0001-10XX-X
C
System clock source, on-chip RC oscillator
EXT 32K
1 0 0 0001-11XX-X
C
System clock source, external clock source
TONE 4K
1 0 0 010X-XXXX-X
C
Tone frequency output: 4kHz
TONE 2K
1 0 0 0110-XXXX-X
C
Tone frequency output: 2kHz
IRQ DIS
1 0 0 100X-0XXX-X
C
Disable IRQ output
IRQ EN
1 0 0 100X-1XXX-X
C
Enable IRQ output
Rev. 1.40
10
Yes
Yes
Yes
Yes
February 6, 2007
HT1622
Name
ID
Command Code
D/C
Function
Def.
F1
1 0 0 101X-0000-X
C
Time base clock output: 1Hz
The WDT time-out flag after: 4s
F2
1 0 0 101X-0001-X
C
Time base clock output: 2Hz
The WDT time-out flag after: 2s
F4
1 0 0 101X-0010-X
C
Time base clock output: 4Hz
The WDT time-out flag after: 1s
F8
1 0 0 101X-0011-X
C
Time base clock output: 8Hz
The WDT time-out flag after: 1/2s
F16
1 0 0 101X-0100-X
C
Time base clock output: 16Hz
The WDT time-out flag after: 1/4s
F32
1 0 0 101X-0101-X
C
Time base clock output: 32Hz
The WDT time-out flag after: 1/8s
F64
1 0 0 101X-0110-X
C
Time base clock output: 64Hz
The WDT time-out flag after: 1/16s
F128
1 0 0 101X-0111-X
C
Time base clock output: 128Hz
The WDT time-out flag after: 1/32s
TEST
1 0 0 1110-0000-X
C
Test mode, user don¢t use.
NORMAL
1 0 0 1110-0011-X
C
Normal mode
Note:
Yes
Yes
X : Don¢t care
A5~A0 : RAM address
D3~D0 : RAM data
D/C : Data/Command mode
Def. : Power on reset default
All the bold forms, namely 1 1 0, 1 0 1, and 1 0 0, are mode commands. Of these, 1 0 0 indicates the command
mode ID. If successive commands have been issued, the command mode ID except for the first command will
be omitted. The source of the tone frequency and of the time base or WDT clock frequency can be derived from
an on-chip 32kHz RC oscillator or an external 32kHz clock. Calculation of the frequency is based on the system frequency sources as stated above. It is recommended that the host controller should initialize the HT1622
after power on reset, for power on reset may fail, which in turn leads to the malfunctioning of the HT1622.
Rev. 1.40
11
February 6, 2007
HT1622
Package Information
64-pin QFP (14´20) Outline Dimensions
C
H
D
5 1
G
3 3
I
5 2
3 2
F
A
B
E
2 0
6 4
K
a
J
1
Symbol
Rev. 1.40
1 9
Dimensions in mm
Min.
Nom.
Max.
A
18.80
¾
19.20
B
13.90
¾
14.10
C
24.80
¾
25.20
D
19.90
¾
20.10
E
¾
1
¾
F
¾
0.40
¾
G
2.50
¾
3.10
H
¾
¾
3.40
I
¾
0.10
¾
J
1.15
¾
1.45
K
0.10
¾
0.20
a
0°
¾
7°
12
February 6, 2007
HT1622
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No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan
Tel: 886-3-563-1999
Fax: 886-3-563-1189
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Fax: 86-21-6485-0313
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Tel: 86-755-8616-9908, 86-755-8616-9722
Fax: 86-755-8616-9533
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Tel: 86-10-6641-0030, 86-10-6641-7751, 86-10-6641-7752
Fax: 86-10-6641-0125
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Tel: 1-510-252-9880
Fax: 1-510-252-9885
http://www.holmate.com
Copyright Ó 2007 by HOLTEK SEMICONDUCTOR INC.
The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used
solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable
without further modification, nor recommends the use of its products for application that may present a risk to human life
due to malfunction or otherwise. Holtek¢s products are not authorized for use as critical components in life support devices
or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information,
please visit our web site at http://www.holtek.com.tw.
Rev. 1.40
13
February 6, 2007